MLK-24337-8 clk: imx8qxp: Support module build

Export APIs and add module author, description and license to
support module build.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>

drivers/clk/imx/Kconfig

@@ -33,7 +33,7 @@ config CLK_IMX8MQ
 	    Build the driver for i.MX8MQ CCM Clock Driver
 
 config CLK_IMX8QXP
-	bool "IMX8QXP SCU Clock"
+	tristate "IMX8QXP SCU Clock"
 	depends on ARCH_MXC && IMX_SCU && ARM64
 	select MXC_CLK_SCU
 	help

drivers/clk/imx/clk-imx-acm-utils.c

@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 // Copyright 2020 NXP
 
+#include <linux/module.h>
 #include <linux/pm_runtime.h>
 #include <linux/pm_domain.h>
 #include "clk-imx-acm-utils.h"
@@ -57,6 +58,7 @@ detach_pm:
 	}
 	return ret;
 }
+EXPORT_SYMBOL_GPL(clk_imx_acm_attach_pm_domains);
 
 /**
  * fsl_dev_detach_pm_domains
@@ -76,3 +78,5 @@ int clk_imx_acm_detach_pm_domains(struct device *dev,
 
 	return 0;
 }
+EXPORT_SYMBOL_GPL(clk_imx_acm_detach_pm_domains);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8dxl-acm.c

@@ -233,3 +233,4 @@ static int __init imx8dxl_acm_init(void)
 	return platform_driver_register(&imx8dxl_acm_clk_driver);
 }
 fs_initcall(imx8dxl_acm_init);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8dxl-rsrc.c

@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/firmware/imx/rsrc.h>
+#include <linux/module.h>
 
 #include "clk-scu.h"
 
@@ -64,3 +65,5 @@ const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8dxl = {
 	.rsrc = imx8dxl_clk_scu_rsrc_table,
 	.num = ARRAY_SIZE(imx8dxl_clk_scu_rsrc_table),
 };
+EXPORT_SYMBOL_GPL(imx_clk_scu_rsrc_imx8dxl);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8qm-acm.c

@@ -296,3 +296,4 @@ static int __init imx8qm_acm_init(void)
 	return platform_driver_register(&imx8qm_acm_clk_driver);
 }
 fs_initcall(imx8qm_acm_init);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8qm-rsrc.c

@@ -5,6 +5,7 @@
  */
 
 #include <dt-bindings/firmware/imx/rsrc.h>
+#include <linux/module.h>
 
 #include "clk-scu.h"
 
@@ -116,3 +117,5 @@ const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qm = {
 	.rsrc = imx8qm_clk_scu_rsrc_table,
 	.num = ARRAY_SIZE(imx8qm_clk_scu_rsrc_table),
 };
+EXPORT_SYMBOL_GPL(imx_clk_scu_rsrc_imx8qm);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8qxp-acm.c

@@ -256,3 +256,4 @@ static int __init imx8qxp_acm_init(void)
 	return platform_driver_register(&imx8qxp_acm_clk_driver);
 }
 fs_initcall(imx8qxp_acm_init);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8qxp-lpcg.c

@@ -123,3 +123,4 @@ static struct platform_driver imx8qxp_lpcg_clk_driver = {
 };
 
 builtin_platform_driver(imx8qxp_lpcg_clk_driver);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8qxp-rsrc.c

@@ -5,6 +5,7 @@
  */
 
 #include <dt-bindings/firmware/imx/rsrc.h>
+#include <linux/module.h>
 
 #include "clk-scu.h"
 
@@ -89,3 +90,5 @@ const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp = {
 	.rsrc = imx8qxp_clk_scu_rsrc_table,
 	.num = ARRAY_SIZE(imx8qxp_clk_scu_rsrc_table),
 };
+EXPORT_SYMBOL_GPL(imx_clk_scu_rsrc_imx8qxp);
+MODULE_LICENSE("GPL v2");

drivers/clk/imx/clk-imx8qxp.c

@@ -90,6 +90,7 @@ static const struct of_device_id imx8qxp_match[] = {
 	{ .compatible = "fsl,imx8dxl-clk", &imx_clk_scu_rsrc_imx8dxl, },
 	{ /* sentinel */ }
 };
+MODULE_DEVICE_TABLE(of, imx8qxp_match);
 
 static int imx8qxp_clk_probe(struct platform_device *pdev)
 {
@@ -291,3 +292,6 @@ static int __init imx8qxp_clk_driver_init(void)
 	return platform_driver_register(&imx8qxp_clk_driver);
 }
 subsys_initcall_sync(imx8qxp_clk_driver_init);
+MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
+MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");
+MODULE_LICENSE("GPL v2");