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clocksource: qcom: split building of legacy vs multiplatform support

The majority of the clocksource code for the Qualcomm platform is shared
between newer (multiplatform) and older platforms.  However there is a bit
of code that isn't, so only build it for the appropriate config.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
hifive-unleashed-5.1
Kumar Gala 2014-01-29 17:01:37 -06:00
parent 8fc1b0f87d
commit 7d6d45f869
1 changed files with 12 additions and 11 deletions

View File

@ -106,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
return readl_relaxed(source_base + TIMER_COUNT_VAL);
}
static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
{
/*
* Shift timer count down by a constant due to unreliable lower bits
* on some targets.
*/
return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
}
static struct clocksource msm_clocksource = {
.name = "dg_timer",
.rating = 300,
@ -228,7 +219,7 @@ err:
sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
}
#ifdef CONFIG_OF
#ifdef CONFIG_ARCH_QCOM
static void __init msm_dt_timer_init(struct device_node *np)
{
u32 freq;
@ -281,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np)
}
CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
#endif
#else
static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
u32 sts)
@ -301,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
return 0;
}
static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
{
/*
* Shift timer count down by a constant due to unreliable lower bits
* on some targets.
*/
return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
}
void __init msm7x01_timer_init(void)
{
struct clocksource *cs = &msm_clocksource;
@ -327,3 +327,4 @@ void __init qsd8x50_timer_init(void)
return;
msm_timer_init(19200000 / 4, 32, 7, false);
}
#endif