redonkable/alistair23-linux
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Chris Metcalf 2010-08-13 19:59:15 -04:00
parent ba00376b0b 2be1f3a73d
commit 7d72e6fa56
1214 changed files with 45869 additions and 13762 deletions
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4
Documentation/00-INDEX
View file

@ -130,8 +130,6 @@ edac.txt
- information on EDAC - Error Detection And Correction
eisa.txt
- info on EISA bus support.
exception.txt
- how Linux v2.2 handles exceptions without verify_area etc.
fault-injection/
- dir with docs about the fault injection capabilities infrastructure.
fb/
@ -234,6 +232,8 @@ memory.txt
- info on typical Linux memory problems.
mips/
- directory with info about Linux on MIPS architecture.
mmc/
- directory with info about the MMC subsystem
mono.txt
- how to execute Mono-based .NET binaries with the help of BINFMT_MISC.
mutex-design.txt

10
Documentation/DMA-API-HOWTO.txt
View file

@ -753,6 +753,16 @@ to "Closing".
alignment constraints (e.g. the alignment constraints about 64-bit
objects).
3) Supporting multiple types of IOMMUs
If your architecture needs to support multiple types of IOMMUs, you
can use include/linux/asm-generic/dma-mapping-common.h. It's a
library to support the DMA API with multiple types of IOMMUs. Lots
of architectures (x86, powerpc, sh, alpha, ia64, microblaze and
sparc) use it. Choose one to see how it can be used. If you need to
support multiple types of IOMMUs in a single system, the example of
x86 or powerpc helps.
Closing
This document, and the API itself, would not be in its current

6
Documentation/DMA-API.txt
View file

@ -455,12 +455,6 @@ Free memory allocated by the nonconsistent API. All parameters must
be identical to those passed in (and returned by
dma_alloc_noncoherent()).
int
dma_is_consistent(struct device *dev, dma_addr_t dma_handle)
Returns true if the device dev is performing consistent DMA on the memory
area pointed to by the dma_handle.
int
dma_get_cache_alignment(void)

4
Documentation/DocBook/Makefile
View file

@ -35,7 +35,7 @@ PS_METHOD = $(prefer-db2x)
PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs xmldoclinks
BOOKS := $(addprefix $(obj)/,$(DOCBOOKS))
xmldocs: $(BOOKS) xmldoclinks
xmldocs: $(BOOKS)
sgmldocs: xmldocs
PS := $(patsubst %.xml, %.ps, $(BOOKS))
@ -95,7 +95,7 @@ define rule_docproc
) > $(dir $@).$(notdir $@).cmd
endef
%.xml: %.tmpl FORCE
%.xml: %.tmpl xmldoclinks FORCE
$(call if_changed_rule,docproc)
###

1
Documentation/DocBook/kernel-api.tmpl
View file

@ -132,7 +132,6 @@ X!Ilib/string.c
<title>FIFO Buffer</title>
<sect1><title>kfifo interface</title>
!Iinclude/linux/kfifo.h
!Ekernel/kfifo.c
</sect1>
</chapter>

2
Documentation/cpu-hotplug.txt
View file

@ -2,7 +2,7 @@
Maintainers:
CPU Hotplug Core:
Rusty Russell <rusty@rustycorp.com.au>
Rusty Russell <rusty@rustcorp.com.au>
Srivatsa Vaddagiri <vatsa@in.ibm.com>
i386:
Zwane Mwaikambo <zwane@arm.linux.org.uk>

1
Documentation/devices.txt
View file

@ -445,6 +445,7 @@ Your cooperation is appreciated.
233 = /dev/kmview View-OS A process with a view
234 = /dev/btrfs-control Btrfs control device
235 = /dev/autofs Autofs control device
236 = /dev/mapper/control Device-Mapper control device
240-254 Reserved for local use
255 Reserved for MISC_DYNAMIC_MINOR

17
Documentation/feature-removal-schedule.txt
View file

@ -547,3 +547,20 @@ Why: superseded by acpi_sleep=nonvs
Who: Rafael J. Wysocki <rjw@sisk.pl>
----------------------------
What: PCI DMA unmap state API
When: August 2012
Why: PCI DMA unmap state API (include/linux/pci-dma.h) was replaced
with DMA unmap state API (DMA unmap state API can be used for
any bus).
Who: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
----------------------------
What: DMA_xxBIT_MASK macros
When: Jun 2011
Why: DMA_xxBIT_MASK macros were replaced with DMA_BIT_MASK() macros.
Who: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
----------------------------

2
Documentation/filesystems/squashfs.txt
View file

@ -2,7 +2,7 @@ SQUASHFS 4.0 FILESYSTEM
=======================
Squashfs is a compressed read-only filesystem for Linux.
It uses zlib compression to compress files, inodes and directories.
It uses zlib/lzo compression to compress files, inodes and directories.
Inodes in the system are very small and all blocks are packed to minimise
data overhead. Block sizes greater than 4K are supported up to a maximum
of 1Mbytes (default block size 128K).

35
Documentation/gpio.txt
View file

@ -158,10 +158,11 @@ and configure pullups/pulldowns appropriately.)
Spinlock-Safe GPIO access
-------------------------
Most GPIO controllers can be accessed with memory read/write instructions.
That doesn't need to sleep, and can safely be done from inside IRQ handlers.
(That includes hardirq contexts on RT kernels.)
Those don't need to sleep, and can safely be done from inside hard
(nonthreaded) IRQ handlers and similar contexts.
Use these calls to access such GPIOs:
Use the following calls to access such GPIOs,
for which gpio_cansleep() will always return false (see below):
/* GPIO INPUT: return zero or nonzero */
int gpio_get_value(unsigned gpio);
@ -210,9 +211,31 @@ To access such GPIOs, a different set of accessors is defined:
/* GPIO OUTPUT, might sleep */
void gpio_set_value_cansleep(unsigned gpio, int value);
Other than the fact that these calls might sleep, and will not be ignored
for GPIOs that can't be accessed from IRQ handlers, these calls act the
same as the spinlock-safe calls.
Accessing such GPIOs requires a context which may sleep, for example
a threaded IRQ handler, and those accessors must be used instead of
spinlock-safe accessors without the cansleep() name suffix.
Other than the fact that these accessors might sleep, and will work
on GPIOs that can't be accessed from hardIRQ handlers, these calls act
the same as the spinlock-safe calls.
** IN ADDITION ** calls to setup and configure such GPIOs must be made
from contexts which may sleep, since they may need to access the GPIO
controller chip too: (These setup calls are usually made from board
setup or driver probe/teardown code, so this is an easy constraint.)
gpio_direction_input()
gpio_direction_output()
gpio_request()
## gpio_request_one()
## gpio_request_array()
## gpio_free_array()
gpio_free()
gpio_set_debounce()
Claiming and Releasing GPIOs

2
Documentation/i2c/instantiating-devices
View file

@ -102,7 +102,7 @@ static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev)
memset(&i2c_info, 0, sizeof(struct i2c_board_info));
strlcpy(i2c_info.name, "isp1301_pnx", I2C_NAME_SIZE);
isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info,
normal_i2c);
normal_i2c, NULL);
i2c_put_adapter(i2c_adap);
(...)
}

3
Documentation/kernel-parameters.txt
View file

@ -915,9 +915,6 @@ and is between 256 and 4096 characters. It is defined in the file
controller
i8042.nopnp [HW] Don't use ACPIPnP / PnPBIOS to discover KBD/AUX
controllers
i8042.panicblink=
[HW] Frequency with which keyboard LEDs should blink
when kernel panics (default is 0.5 sec)
i8042.reset [HW] Reset the controller during init and cleanup
i8042.unlock [HW] Unlock (ignore) the keylock

4
Documentation/mmc/00-INDEX Normal file
View file

@ -0,0 +1,4 @@
00-INDEX
- this file
mmc-dev-attrs.txt
- info on SD and MMC device attributes

56
Documentation/mmc/mmc-dev-attrs.txt Normal file
View file

@ -0,0 +1,56 @@
SD and MMC Device Attributes
============================
All attributes are read-only.
cid Card Identifaction Register
csd Card Specific Data Register
scr SD Card Configuration Register (SD only)
date Manufacturing Date (from CID Register)
fwrev Firmware/Product Revision (from CID Register) (SD and MMCv1 only)
hwrev Hardware/Product Revision (from CID Register) (SD and MMCv1 only)
manfid Manufacturer ID (from CID Register)
name Product Name (from CID Register)
oemid OEM/Application ID (from CID Register)
serial Product Serial Number (from CID Register)
erase_size Erase group size
preferred_erase_size Preferred erase size
Note on Erase Size and Preferred Erase Size:
"erase_size" is the minimum size, in bytes, of an erase
operation. For MMC, "erase_size" is the erase group size
reported by the card. Note that "erase_size" does not apply
to trim or secure trim operations where the minimum size is
always one 512 byte sector. For SD, "erase_size" is 512
if the card is block-addressed, 0 otherwise.
SD/MMC cards can erase an arbitrarily large area up to and
including the whole card. When erasing a large area it may
be desirable to do it in smaller chunks for three reasons:
1. A single erase command will make all other I/O on
the card wait. This is not a problem if the whole card
is being erased, but erasing one partition will make
I/O for another partition on the same card wait for the
duration of the erase - which could be a several
minutes.
2. To be able to inform the user of erase progress.
3. The erase timeout becomes too large to be very
useful. Because the erase timeout contains a margin
which is multiplied by the size of the erase area,
the value can end up being several minutes for large
areas.
"erase_size" is not the most efficient unit to erase
(especially for SD where it is just one sector),
hence "preferred_erase_size" provides a good chunk
size for erasing large areas.
For MMC, "preferred_erase_size" is the high-capacity
erase size if a card specifies one, otherwise it is
based on the capacity of the card.
For SD, "preferred_erase_size" is the allocation unit
size specified by the card.
"preferred_erase_size" is in bytes.

74
Documentation/networking/wavelan.txt
View file

@ -1,74 +0,0 @@
The Wavelan drivers saga
------------------------
By Jean Tourrilhes <jt@hpl.hp.com>
The Wavelan is a Radio network adapter designed by
Lucent. Under this generic name is hidden quite a variety of hardware,
and many Linux driver to support it.
The get the full story on Wireless LANs, please consult :
http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/
"wavelan" driver (old ISA Wavelan)
----------------
o Config : Network device -> Wireless LAN -> AT&T WaveLAN
o Location : .../drivers/net/wireless/wavelan*
o in-line doc : .../drivers/net/wireless/wavelan.p.h
o on-line doc :
http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
This is the driver for the ISA version of the first generation
of the Wavelan, now discontinued. The device is 2 Mb/s, composed of a
Intel 82586 controller and a Lucent Modem, and is NOT 802.11 compliant.
The driver has been tested with the following hardware :
o Wavelan ISA 915 MHz (full length ISA card)
o Wavelan ISA 915 MHz 2.0 (half length ISA card)
o Wavelan ISA 2.4 GHz (full length ISA card, fixed frequency)
o Wavelan ISA 2.4 GHz 2.0 (half length ISA card, frequency selectable)
o Above cards with the optional DES encryption feature
"wavelan_cs" driver (old Pcmcia Wavelan)
-------------------
o Config : Network device -> PCMCIA network ->
Pcmcia Wireless LAN -> AT&T/Lucent WaveLAN
o Location : .../drivers/net/pcmcia/wavelan*
o in-line doc : .../drivers/net/pcmcia/wavelan_cs.h
o on-line doc :
http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
This is the driver for the PCMCIA version of the first
generation of the Wavelan, now discontinued. The device is 2 Mb/s,
composed of a Intel 82593 controller (totally different from the 82586)
and a Lucent Modem, and NOT 802.11 compatible.
The driver has been tested with the following hardware :
o Wavelan Pcmcia 915 MHz 2.0 (Pcmcia card + separate
modem/antenna block)
o Wavelan Pcmcia 2.4 GHz 2.0 (Pcmcia card + separate
modem/antenna block)
"wvlan_cs" driver (Wavelan IEEE, GPL)
-----------------
o Config : Not yet in kernel
o Location : Pcmcia package 3.1.10+
o on-line doc :
http://web.archive.org/web/*/http://www.fasta.fh-dortmund.de/users/andy/wvlan/
This is the driver for the current generation of Wavelan IEEE,
which is 802.11 compatible. Depending on version, it is 2 Mb/s or 11
Mb/s, with or without encryption, all implemented in Lucent specific
DSP (the Hermes).
This is a GPL full source PCMCIA driver (ISA is just a Pcmcia
card with ISA-Pcmcia bridge).
"wavelan2_cs" driver (Wavelan IEEE, binary)
--------------------
o Config : Not yet in kernel
o Location : ftp://sourceforge.org/pcmcia/contrib/
This driver support exactly the same hardware as the previous
driver, the main difference is that it is based on a binary library
and supported by Lucent.
I hope it clears the confusion ;-)
Jean

24
Documentation/padata.txt
View file

@ -19,7 +19,7 @@ overall control of how tasks are to be run:
The pcpumask describes which processors will be used to execute work
submitted to this instance in parallel. The cbcpumask defines which
processors are allowed to use as the serialization callback processor.
processors are allowed to be used as the serialization callback processor.
The workqueue wq is where the work will actually be done; it should be
a multithreaded queue, naturally.
@ -30,10 +30,10 @@ cpumasks this helper function can be used:
Note: Padata maintains two kinds of cpumasks internally. The user supplied
cpumasks, submitted by padata_alloc/padata_alloc_possible and the 'usable'
cpumasks. The usable cpumasks are always the subset of active cpus in the
user supplied cpumasks, these are the cpumasks padata actually use. So
it is legal to supply a cpumask to padata that contains offline cpus.
Once a offline cpu in the user supplied cpumask comes online, padata
cpumasks. The usable cpumasks are always a subset of active CPUs in the
user supplied cpumasks; these are the cpumasks padata actually uses. So
it is legal to supply a cpumask to padata that contains offline CPUs.
Once an offline CPU in the user supplied cpumask comes online, padata
is going to use it.
There are functions for enabling and disabling the instance:
@ -44,7 +44,7 @@ There are functions for enabling and disabling the instance:
These functions are setting or clearing the "PADATA_INIT" flag;
if that flag is not set, other functions will refuse to work.
padata_start returns zero on success (flag set) or -EINVAL if the
padata cpumask contains no active cpu (flag not set).
padata cpumask contains no active CPU (flag not set).
padata_stop clears the flag and blocks until the padata instance
is unused.
@ -63,11 +63,11 @@ done with great frequency.
It's possible to change both cpumasks of a padata instance with
padata_set_cpumasks by specifying the cpumasks for parallel execution (pcpumask)
and for the serial callback function (cbcpumask). padata_set_cpumask is to
and for the serial callback function (cbcpumask). padata_set_cpumask is used to
change just one of the cpumasks. Here cpumask_type is one of PADATA_CPU_SERIAL,
PADATA_CPU_PARALLEL and cpumask specifies the new cpumask to use.
To simply add or remove one cpu from a certain cpumask the functions
padata_add_cpu/padata_remove_cpu are used. cpu specifies the cpu to add or
To simply add or remove one CPU from a certain cpumask the functions
padata_add_cpu/padata_remove_cpu are used. cpu specifies the CPU to add or
remove and mask is one of PADATA_CPU_SERIAL, PADATA_CPU_PARALLEL.
If a user is interested in padata cpumask changes, he can register to
@ -82,7 +82,7 @@ To unregister from that notifier:
struct notifier_block *nblock);
The padata cpumask change notifier notifies about changes of the usable
cpumasks, i.e. the subset of active cpus in the user supplied cpumask.
cpumasks, i.e. the subset of active CPUs in the user supplied cpumask.
Padata calls the notifier chain with:
@ -92,7 +92,7 @@ Padata calls the notifier chain with:
Here cpumask_change_notifier is registered notifier, notification_mask
is one of PADATA_CPU_SERIAL, PADATA_CPU_PARALLEL and cpumask is a pointer
to a struct padata_cpumask that contains the new cpumask informations.
to a struct padata_cpumask that contains the new cpumask information.
Actually submitting work to the padata instance requires the creation of a
padata_priv structure:
@ -104,7 +104,7 @@ padata_priv structure:
};
This structure will almost certainly be embedded within some larger
structure specific to the work to be done. Most its fields are private to
structure specific to the work to be done. Most of its fields are private to
padata, but the structure should be zeroed at initialisation time, and the
parallel() and serial() functions should be provided. Those functions will
be called in the process of getting the work done as we will see

2
Documentation/powerpc/dts-bindings/fsl/esdhc.txt
View file

@ -14,6 +14,8 @@ Required properties:
reports inverted write-protect state;
- sdhci,1-bit-only : (optional) specifies that a controller can
only handle 1-bit data transfers.
- sdhci,auto-cmd12: (optional) specifies that a controller can
only handle auto CMD12.
Example:

13
Documentation/sound/alsa/HD-Audio-Models.txt
View file

@ -83,8 +83,8 @@ ALC269
======
basic Basic preset
quanta Quanta FL1
eeepc-p703 ASUS Eeepc P703 P900A
eeepc-p901 ASUS Eeepc P901 S101
laptop-amic Laptops with analog-mic input
laptop-dmic Laptops with digital-mic input
fujitsu FSC Amilo
lifebook Fujitsu Lifebook S6420
auto auto-config reading BIOS (default)
@ -109,6 +109,8 @@ ALC662/663/272
asus-mode4 ASUS
asus-mode5 ASUS
asus-mode6 ASUS
asus-mode7 ASUS
asus-mode8 ASUS
dell Dell with ALC272
dell-zm1 Dell ZM1 with ALC272
samsung-nc10 Samsung NC10 mini notebook
@ -295,8 +297,10 @@ Conexant 5066
=============
laptop Basic Laptop config (default)
dell-laptop Dell laptops
dell-vostro Dell Vostro
olpc-xo-1_5 OLPC XO 1.5
ideapad Lenovo IdeaPad U150
thinkpad Lenovo Thinkpad
STAC9200
========
@ -404,6 +408,7 @@ STAC92HD83*
mic-ref Reference board with power management for ports
dell-s14 Dell laptop
hp HP laptops with (inverted) mute-LED
hp-dv7-4000 HP dv-7 4000
auto BIOS setup (default)
STAC9872
@ -416,3 +421,7 @@ Cirrus Logic CS4206/4207
mbp55 MacBook Pro 5,5
imac27 IMac 27 Inch
auto BIOS setup (default)
VIA VT17xx/VT18xx/VT20xx
========================
auto BIOS setup (default)

21
MAINTAINERS
View file

@ -616,10 +616,10 @@ M: Richard Purdie <rpurdie@rpsys.net>
S: Maintained
ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
M: Hans Ulli Kroll <ulli.kroll@googlemail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://gitorious.org/linux-gemini/mainline.git
S: Odd Fixes
T: git git://git.berlios.de/gemini-board
S: Maintained
F: arch/arm/mach-gemini/
ARM/EBSA110 MACHINE SUPPORT
@ -641,9 +641,10 @@ T: topgit git://git.openezx.org/openezx.git
F: arch/arm/mach-pxa/ezx.c
ARM/FARADAY FA526 PORT
M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
M: Hans Ulli Kroll <ulli.kroll@googlemail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Odd Fixes
S: Maintained
T: git://git.berlios.de/gemini-board
F: arch/arm/mm/*-fa*
ARM/FOOTBRIDGE ARCHITECTURE
@ -692,6 +693,13 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kristoffer/linux-hpc.git
F: arch/arm/mach-sa1100/jornada720.c
F: arch/arm/mach-sa1100/include/mach/jornada720.h
ARM/INCOME PXA270 SUPPORT
M: Marek Vasut <marek.vasut@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/income.c
F: arch/arm/mach-pxa/include/mach-pxa/income.h
ARM/INTEL IOP32X ARM ARCHITECTURE
M: Lennert Buytenhek <kernel@wantstofly.org>
M: Dan Williams <dan.j.williams@intel.com>
@ -947,8 +955,9 @@ ARM/SHMOBILE ARM ARCHITECTURE
M: Paul Mundt <lethal@linux-sh.org>
M: Magnus Damm <magnus.damm@gmail.com>
L: linux-sh@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git
W: http://oss.renesas.com
Q: http://patchwork.kernel.org/project/linux-sh/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git
S: Supported
F: arch/arm/mach-shmobile/
F: drivers/sh/

2
arch/alpha/include/asm/dma-mapping.h
View file

@ -41,9 +41,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
#define dma_is_consistent(d, h) (1)
#define dma_cache_sync(dev, va, size, dir) ((void)0)
#define dma_get_cache_alignment() L1_CACHE_BYTES
#endif /* _ALPHA_DMA_MAPPING_H */

51
arch/arm/Kconfig
View file

@ -644,6 +644,7 @@ config ARCH_S3C2410
select ARCH_HAS_CPUFREQ
select HAVE_CLK
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C
help
Samsung S3C2410X CPU based systems, such as the Simtec Electronics
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@ -673,6 +674,8 @@ config ARCH_S3C64XX
select S3C_DEV_NAND
select USB_ARCH_HAS_OHCI
select SAMSUNG_GPIOLIB_4BIT
select HAVE_S3C2410_I2C
select HAVE_S3C2410_WATCHDOG
help
Samsung S3C64XX series based systems
@ -681,7 +684,10 @@ config ARCH_S5P6440
select CPU_V6
select GENERIC_GPIO
select HAVE_CLK
select HAVE_S3C2410_WATCHDOG
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C
select HAVE_S3C_RTC
help
Samsung S5P6440 CPU based systems
@ -691,6 +697,7 @@ config ARCH_S5P6442
select GENERIC_GPIO
select HAVE_CLK
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_WATCHDOG
help
Samsung S5P6442 CPU based systems
@ -701,6 +708,9 @@ config ARCH_S5PC100
select CPU_V7
select ARM_L1_CACHE_SHIFT_6
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C
select HAVE_S3C_RTC
select HAVE_S3C2410_WATCHDOG
help
Samsung S5PC100 series based systems
@ -711,9 +721,21 @@ config ARCH_S5PV210
select HAVE_CLK
select ARM_L1_CACHE_SHIFT_6
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C
select HAVE_S3C_RTC
select HAVE_S3C2410_WATCHDOG
help
Samsung S5PV210/S5PC110 series based systems
config ARCH_S5PV310
bool "Samsung S5PV310/S5PC210"
select CPU_V7
select GENERIC_GPIO
select HAVE_CLK
select GENERIC_CLOCKEVENTS
help
Samsung S5PV310 series based systems
config ARCH_SHARK
bool "Shark"
select CPU_SA110
@ -915,6 +937,8 @@ source "arch/arm/mach-s5pc100/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig"
source "arch/arm/mach-s5pv310/Kconfig"
source "arch/arm/mach-shmobile/Kconfig"
source "arch/arm/plat-stmp3xxx/Kconfig"
@ -1040,6 +1064,18 @@ config PL310_ERRATA_588369
is not correctly implemented in PL310 as clean lines are not
invalidated as a result of these operations. Note that this errata
uses Texas Instrument's secure monitor api.
config ARM_ERRATA_720789
bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
depends on CPU_V7 && SMP
help
This option enables the workaround for the 720789 Cortex-A9 (prior to
r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
As a consequence of this erratum, some TLB entries which should be
invalidated are not, resulting in an incoherency in the system page
tables. The workaround changes the TLB flushing routines to invalidate
entries regardless of the ASID.
endmenu
source "arch/arm/common/Kconfig"
@ -1108,11 +1144,11 @@ config SMP
bool "Symmetric Multi-Processing (EXPERIMENTAL)"
depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
depends on GENERIC_CLOCKEVENTS
select USE_GENERIC_SMP_HELPERS
select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || \
ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
@ -1182,10 +1218,10 @@ config LOCAL_TIMERS
bool "Use local timer interrupts"
depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
default y
select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || \\
ARCH_U8500 || ARCH_TEGRA
select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
help
Enable support for local timers on SMP platforms, rather then the
legacy IPI broadcast method. Local timers allows the system
@ -1196,7 +1232,8 @@ source kernel/Kconfig.preempt
config HZ
int
default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE

1
arch/arm/Makefile
View file

@ -174,6 +174,7 @@ machine-$(CONFIG_ARCH_S5P6440) := s5p6440
machine-$(CONFIG_ARCH_S5P6442) := s5p6442
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
machine-$(CONFIG_ARCH_S5PV310) := s5pv310
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE) := shmobile

2
arch/arm/boot/compressed/Makefile
View file

@ -33,7 +33,7 @@ ifeq ($(CONFIG_CPU_XSCALE),y)
OBJS += head-xscale.o
endif
ifeq ($(CONFIG_PXA_SHARPSL),y)
ifeq ($(CONFIG_PXA_SHARPSL_DETECT_MACH_ID),y)
OBJS += head-sharpsl.o
endif

5
arch/arm/boot/compressed/head.S
View file

@ -170,9 +170,8 @@ not_angel:
.text
adr r0, LC0
ARM( ldmia r0, {r1, r2, r3, r5, r6, r11, ip, sp})
THUMB( ldmia r0, {r1, r2, r3, r5, r6, r11, ip} )
THUMB( ldr sp, [r0, #32] )
ldmia r0, {r1, r2, r3, r5, r6, r11, ip}
ldr sp, [r0, #28]
#ifdef CONFIG_AUTO_ZRELADDR
@ determine final kernel image address
and r4, pc, #0xf8000000

8
arch/arm/common/it8152.c
View file

@ -263,14 +263,6 @@ static int it8152_pci_platform_notify_remove(struct device *dev)
return 0;
}
int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
{
dev_dbg(dev, "%s: dma_addr %08x, size %08x\n",
__func__, dma_addr, size);
return (dev->bus == &pci_bus_type) &&
((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
}
int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
{
it8152_io.start = IT8152_IO_BASE + 0x12000;

66
arch/arm/configs/s5pc110_defconfig
View file

@ -1,66 +0,0 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_S5PV210=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
CONFIG_MACH_SMDKC110=y
CONFIG_VMSPLIT_2G=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
# CONFIG_MISC_DEVICES is not set
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_HW_RANDOM=y
# CONFIG_HWMON is not set
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_INOTIFY=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CRAMFS=y
CONFIG_ROMFS_FS=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_RT_MUTEXES=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_SPINLOCK_SLEEP=y
CONFIG_DEBUG_INFO=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_S3C_UART=1
CONFIG_CRC_CCITT=y

5
arch/arm/configs/s5pv210_defconfig
View file

@ -7,6 +7,11 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_S5PV210=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
CONFIG_S3C_DEV_FB=y
CONFIG_S5PV210_SETUP_FB_24BPP=y
CONFIG_MACH_AQUILA=y
CONFIG_MACH_GONI=y
CONFIG_MACH_SMDKC110=y
CONFIG_MACH_SMDKV210=y
CONFIG_VMSPLIT_2G=y
CONFIG_PREEMPT=y

2
arch/arm/include/asm/cache.h
View file

@ -14,7 +14,7 @@
* cache before the transfer is done, causing old data to be seen by
* the CPU.
*/
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/*
* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.

18
arch/arm/include/asm/dma-mapping.h
View file

@ -144,16 +144,6 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
return 0;
}
static inline int dma_get_cache_alignment(void)
{
return 32;
}
static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
{
return !!arch_is_coherent();
}
/*
* DMA errors are defined by all-bits-set in the DMA address.
*/
@ -298,7 +288,15 @@ extern void dmabounce_unregister_dev(struct device *);
* DMA access and 1 if the buffer needs to be bounced.
*
*/
#ifdef CONFIG_SA1111
extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
#else
static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr,
size_t size)
{
return 0;
}
#endif
/*
* The DMA API, implemented by dmabounce.c. See below for descriptions.

2
arch/arm/include/asm/elf.h
View file

@ -59,6 +59,8 @@ typedef struct user_fp elf_fpregset_t;
#define R_ARM_THM_CALL 10
#define R_ARM_THM_JUMP24 30
#define R_ARM_THM_MOVW_ABS_NC 47
#define R_ARM_THM_MOVT_ABS 48
/*
* These are used to set parameters in the core dumps.

8
arch/arm/include/asm/hardware/coresight.h
View file

@ -48,8 +48,6 @@ struct tracectx {
/* CoreSight Component Registers */
#define CSCR_CLASS 0xff4
#define CSCR_PRSR 0x314
#define UNLOCK_MAGIC 0xc5acce55
/* ETM control register, "ETM Architecture", 3.3.1 */
@ -132,6 +130,12 @@ struct tracectx {
ETMCTRL_BRANCH_OUTPUT | \
ETMCTRL_DO_CONTEXTID)
/* ETM management registers, "ETM Architecture", 3.5.24 */
#define ETMMR_OSLAR 0x300
#define ETMMR_OSLSR 0x304
#define ETMMR_OSSRR 0x308
#define ETMMR_PDSR 0x314
/* ETB registers, "CoreSight Components TRM", 9.3 */
#define ETBR_DEPTH 0x04
#define ETBR_STATUS 0x0c

29
arch/arm/include/asm/hardware/scoop.h
View file

@ -22,18 +22,23 @@
#define SCOOP_GPWR 0x24
#define SCOOP_GPRR 0x28
#define SCOOP_GPCR_PA22 ( 1 << 12 )
#define SCOOP_GPCR_PA21 ( 1 << 11 )
#define SCOOP_GPCR_PA20 ( 1 << 10 )
#define SCOOP_GPCR_PA19 ( 1 << 9 )
#define SCOOP_GPCR_PA18 ( 1 << 8 )
#define SCOOP_GPCR_PA17 ( 1 << 7 )
#define SCOOP_GPCR_PA16 ( 1 << 6 )
#define SCOOP_GPCR_PA15 ( 1 << 5 )
#define SCOOP_GPCR_PA14 ( 1 << 4 )
#define SCOOP_GPCR_PA13 ( 1 << 3 )
#define SCOOP_GPCR_PA12 ( 1 << 2 )
#define SCOOP_GPCR_PA11 ( 1 << 1 )
#define SCOOP_CPR_OUT (1 << 7)
#define SCOOP_CPR_SD_3V (1 << 2)
#define SCOOP_CPR_CF_XV (1 << 1)
#define SCOOP_CPR_CF_3V (1 << 0)
#define SCOOP_GPCR_PA22 (1 << 12)
#define SCOOP_GPCR_PA21 (1 << 11)
#define SCOOP_GPCR_PA20 (1 << 10)
#define SCOOP_GPCR_PA19 (1 << 9)
#define SCOOP_GPCR_PA18 (1 << 8)
#define SCOOP_GPCR_PA17 (1 << 7)
#define SCOOP_GPCR_PA16 (1 << 6)
#define SCOOP_GPCR_PA15 (1 << 5)
#define SCOOP_GPCR_PA14 (1 << 4)
#define SCOOP_GPCR_PA13 (1 << 3)
#define SCOOP_GPCR_PA12 (1 << 2)
#define SCOOP_GPCR_PA11 (1 << 1)
struct scoop_config {
unsigned short io_out;

8
arch/arm/include/asm/tlbflush.h
View file

@ -378,7 +378,11 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
if (tlb_flag(TLB_V6_I_ASID))
asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
if (tlb_flag(TLB_V7_UIS_ASID))
#ifdef CONFIG_ARM_ERRATA_720789
asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
#else
asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
#endif
if (tlb_flag(TLB_BTB)) {
/* flush the branch target cache */
@ -424,7 +428,11 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
if (tlb_flag(TLB_V6_I_PAGE))
asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
if (tlb_flag(TLB_V7_UIS_PAGE))
#ifdef CONFIG_ARM_ERRATA_720789
asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc");
#else
asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
#endif
if (tlb_flag(TLB_BTB)) {
/* flush the branch target cache */

124
arch/arm/kernel/entry-common.S
View file

@ -92,75 +92,111 @@ ENDPROC(ret_from_fork)
#define CALL(x) .long x
#ifdef CONFIG_FUNCTION_TRACER
/*
* When compiling with -pg, gcc inserts a call to the mcount routine at the
* start of every function. In mcount, apart from the function's address (in
* lr), we need to get hold of the function's caller's address.
*
* Older GCCs (pre-4.4) inserted a call to a routine called mcount like this:
*
* bl mcount
*
* These versions have the limitation that in order for the mcount routine to
* be able to determine the function's caller's address, an APCS-style frame
* pointer (which is set up with something like the code below) is required.
*
* mov ip, sp
* push {fp, ip, lr, pc}
* sub fp, ip, #4
*
* With EABI, these frame pointers are not available unless -mapcs-frame is
* specified, and if building as Thumb-2, not even then.
*
* Newer GCCs (4.4+) solve this problem by introducing a new version of mcount,
* with call sites like:
*
* push {lr}
* bl __gnu_mcount_nc
*
* With these compilers, frame pointers are not necessary.
*
* mcount can be thought of as a function called in the middle of a subroutine
* call. As such, it needs to be transparent for both the caller and the
* callee: the original lr needs to be restored when leaving mcount, and no
* registers should be clobbered. (In the __gnu_mcount_nc implementation, we
* clobber the ip register. This is OK because the ARM calling convention
* allows it to be clobbered in subroutines and doesn't use it to hold
* parameters.)
*/
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(mcount)
stmdb sp!, {r0-r3, lr}
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
stmdb sp!, {r0-r3, lr}
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
.globl mcount_call
mcount_call:
bl ftrace_stub
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
bl ftrace_stub
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
ENTRY(ftrace_caller)
stmdb sp!, {r0-r3, lr}
ldr r1, [fp, #-4]
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
stmdb sp!, {r0-r3, lr}
ldr r1, [fp, #-4]
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
.globl ftrace_call
ftrace_call:
bl ftrace_stub
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
bl ftrace_stub
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
#else
ENTRY(__gnu_mcount_nc)
stmdb sp!, {r0-r3, lr}
ldr r0, =ftrace_trace_function
ldr r2, [r0]
adr r0, ftrace_stub
cmp r0, r2
bne gnu_trace
ldmia sp!, {r0-r3, ip, lr}
mov pc, ip
stmdb sp!, {r0-r3, lr}
ldr r0, =ftrace_trace_function
ldr r2, [r0]
adr r0, ftrace_stub
cmp r0, r2
bne gnu_trace
ldmia sp!, {r0-r3, ip, lr}
mov pc, ip
gnu_trace:
ldr r1, [sp, #20] @ lr of instrumented routine
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
mov pc, r2
ldmia sp!, {r0-r3, ip, lr}
mov pc, ip
ldr r1, [sp, #20] @ lr of instrumented routine
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
mov pc, r2
ldmia sp!, {r0-r3, ip, lr}
mov pc, ip
ENTRY(mcount)
stmdb sp!, {r0-r3, lr}
ldr r0, =ftrace_trace_function
ldr r2, [r0]
adr r0, ftrace_stub
cmp r0, r2
bne trace
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
stmdb sp!, {r0-r3, lr}
ldr r0, =ftrace_trace_function
ldr r2, [r0]
adr r0, ftrace_stub
cmp r0, r2
bne trace
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
trace:
ldr r1, [fp, #-4] @ lr of instrumented routine
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
mov pc, r2
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
ldr r1, [fp, #-4] @ lr of instrumented routine
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
mov pc, r2
ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
#endif /* CONFIG_DYNAMIC_FTRACE */
.globl ftrace_stub
ftrace_stub:
mov pc, lr
mov pc, lr
#endif /* CONFIG_FUNCTION_TRACER */

4
arch/arm/kernel/etm.c
View file

@ -543,7 +543,9 @@ static int __init etm_probe(struct amba_device *dev, struct amba_id *id)
t->etm_portsz = 1;
etm_unlock(t);
ret = etm_readl(t, CSCR_PRSR);
(void)etm_readl(t, ETMMR_PDSR);
/* dummy first read */
(void)etm_readl(&tracer, ETMMR_OSSRR);
t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf;
etm_writel(t, 0x440, ETMR_CTRL);

34
arch/arm/kernel/module.c
View file

@ -102,7 +102,9 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
unsigned long loc;
Elf32_Sym *sym;
s32 offset;
#ifdef CONFIG_THUMB2_KERNEL
u32 upper, lower, sign, j1, j2;
#endif
offset = ELF32_R_SYM(rel->r_info);
if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
@ -185,6 +187,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
(offset & 0x0fff);
break;
#ifdef CONFIG_THUMB2_KERNEL
case R_ARM_THM_CALL:
case R_ARM_THM_JUMP24:
upper = *(u16 *)loc;
@ -233,9 +236,40 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
*(u16 *)(loc + 2) = (u16)((lower & 0xd000) |
(j1 << 13) | (j2 << 11) |
((offset >> 1) & 0x07ff));
break;
case R_ARM_THM_MOVW_ABS_NC:
case R_ARM_THM_MOVT_ABS:
upper = *(u16 *)loc;
lower = *(u16 *)(loc + 2);
/*
* MOVT/MOVW instructions encoding in Thumb-2:
*
* i = upper[10]
* imm4 = upper[3:0]
* imm3 = lower[14:12]
* imm8 = lower[7:0]
*
* imm16 = imm4:i:imm3:imm8
*/
offset = ((upper & 0x000f) << 12) |
((upper & 0x0400) << 1) |
((lower & 0x7000) >> 4) | (lower & 0x00ff);
offset = (offset ^ 0x8000) - 0x8000;
offset += sym->st_value;
if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
offset >>= 16;
*(u16 *)loc = (u16)((upper & 0xfbf0) |
((offset & 0xf000) >> 12) |
((offset & 0x0800) >> 1));
*(u16 *)(loc + 2) = (u16)((lower & 0x8f00) |
((offset & 0x0700) << 4) |
(offset & 0x00ff));
break;
#endif
default:
printk(KERN_ERR "%s: unknown relocation: %u\n",

6
arch/arm/mach-at91/board-cam60.c
View file

@ -75,7 +75,7 @@ static struct at91_usbh_data __initdata cam60_usbh_data = {
* SPI devices.
*/
#if defined(CONFIG_MTD_DATAFLASH)
static struct mtd_partition __initdata cam60_spi_partitions[] = {
static struct mtd_partition cam60_spi_partitions[] = {
{
.name = "BOOT1",
.offset = 0,
@ -98,14 +98,14 @@ static struct mtd_partition __initdata cam60_spi_partitions[] = {
},
};
static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
static struct flash_platform_data cam60_spi_flash_platform_data = {
.name = "spi_flash",
.parts = cam60_spi_partitions,
.nr_parts = ARRAY_SIZE(cam60_spi_partitions)
};
#endif
static struct spi_board_info cam60_spi_devices[] = {
static struct spi_board_info cam60_spi_devices[] __initdata = {
#if defined(CONFIG_MTD_DATAFLASH)
{ /* DataFlash chip */
.modalias = "mtd_dataflash",

7
arch/arm/mach-clps711x/include/mach/hardware.h
View file

@ -69,13 +69,6 @@
#define SYSPLD_VIRT_BASE 0xfe000000
#define SYSPLD_BASE SYSPLD_VIRT_BASE
#ifndef __ASSEMBLER__
#define PCIO_BASE IO_BASE
#endif
#if defined (CONFIG_ARCH_AUTCPU12)
#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE

21
arch/arm/mach-gemini/Kconfig
View file

@ -2,6 +2,13 @@ if ARCH_GEMINI
menu "Cortina Systems Gemini Implementations"
config MACH_NAS4220B
bool "Raidsonic NAS-4220-B"
select GEMINI_MEM_SWAP
help
Say Y here if you intend to run this kernel on a
Raidsonic NAS-4220-B.
config MACH_RUT100
bool "Teltonika RUT100"
select GEMINI_MEM_SWAP
@ -9,6 +16,20 @@ config MACH_RUT100
Say Y here if you intend to run this kernel on a
Teltonika 3G Router RUT100.
config MACH_WBD111
bool "Wiliboard WBD-111"
select GEMINI_MEM_SWAP
help
Say Y here if you intend to run this kernel on a
Wiliboard WBD-111.
config MACH_WBD222
bool "Wiliboard WBD-222"
select GEMINI_MEM_SWAP
help
Say Y here if you intend to run this kernel on a
Wiliboard WBD-222.
endmenu
config GEMINI_MEM_SWAP

3
arch/arm/mach-gemini/Makefile
View file

@ -7,4 +7,7 @@
obj-y := irq.o mm.o time.o devices.o gpio.o
# Board-specific support
obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o
obj-$(CONFIG_MACH_RUT100) += board-rut1xx.o
obj-$(CONFIG_MACH_WBD111) += board-wbd111.o
obj-$(CONFIG_MACH_WBD222) += board-wbd222.o

111
arch/arm/mach-gemini/board-nas4220b.c Normal file
View file

@ -0,0 +1,111 @@
/*
* Support for Raidsonic NAS-4220-B
*
* Copyright (C) 2009 Janos Laube <janos.dev@gmail.com>
*
* based on rut1xx.c
* Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/mdio-gpio.h>
#include <linux/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <mach/global_reg.h>
#include "common.h"
static struct sys_timer ib4220b_timer = {
.init = gemini_timer_init,
};
static struct gpio_led ib4220b_leds[] = {
{
.name = "nas4220b:orange:hdd",
.default_trigger = "none",
.gpio = 60,
},
{
.name = "nas4220b:green:os",
.default_trigger = "heartbeat",
.gpio = 62,
},
};
static struct gpio_led_platform_data ib4220b_leds_data = {
.num_leds = ARRAY_SIZE(ib4220b_leds),
.leds = ib4220b_leds,
};
static struct platform_device ib4220b_led_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &ib4220b_leds_data,
},
};
static struct gpio_keys_button ib4220b_keys[] = {
{
.code = KEY_SETUP,
.gpio = 61,
.active_low = 1,
.desc = "Backup Button",
.type = EV_KEY,
},
{
.code = KEY_RESTART,
.gpio = 63,
.active_low = 1,
.desc = "Softreset Button",
.type = EV_KEY,
},
};
static struct gpio_keys_platform_data ib4220b_keys_data = {
.buttons = ib4220b_keys,
.nbuttons = ARRAY_SIZE(ib4220b_keys),
};
static struct platform_device ib4220b_key_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &ib4220b_keys_data,
},
};
static void __init ib4220b_init(void)
{
gemini_gpio_init();
platform_register_uart();
platform_register_pflash(SZ_16M, NULL, 0);
platform_device_register(&ib4220b_led_device);
platform_device_register(&ib4220b_key_device);
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
.phys_io = 0x7fffc000,
.io_pg_offst = ((0xffffc000) >> 18) & 0xfffc,
.boot_params = 0x100,
.map_io = gemini_map_io,
.init_irq = gemini_init_irq,
.timer = &ib4220b_timer,
.init_machine = ib4220b_init,
MACHINE_END

143
arch/arm/mach-gemini/board-wbd111.c Normal file
View file

@ -0,0 +1,143 @@
/*
* Support for Wiliboard WBD-111
*
* Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/input.h>
#include <linux/skbuff.h>
#include <linux/gpio_keys.h>
#include <linux/mdio-gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include "common.h"
static struct gpio_keys_button wbd111_keys[] = {
{
.code = KEY_SETUP,
.gpio = 5,
.active_low = 1,
.desc = "reset",
.type = EV_KEY,
},
};
static struct gpio_keys_platform_data wbd111_keys_data = {
.buttons = wbd111_keys,
.nbuttons = ARRAY_SIZE(wbd111_keys),
};
static struct platform_device wbd111_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &wbd111_keys_data,
},
};
static struct gpio_led wbd111_leds[] = {
{
.name = "L3red",
.gpio = 1,
},
{
.name = "L4green",
.gpio = 2,
},
{
.name = "L4red",
.gpio = 3,
},
{
.name = "L3green",
.gpio = 5,
},
};
static struct gpio_led_platform_data wbd111_leds_data = {
.num_leds = ARRAY_SIZE(wbd111_leds),
.leds = wbd111_leds,
};
static struct platform_device wbd111_leds_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &wbd111_leds_data,
},
};
static struct sys_timer wbd111_timer = {
.init = gemini_timer_init,
};
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition wbd111_partitions[] = {
{
.name = "RedBoot",
.offset = 0,
.size = 0x020000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "kernel",
.offset = 0x020000,
.size = 0x100000,
} , {
.name = "rootfs",
.offset = 0x120000,
.size = 0x6a0000,
} , {
.name = "VCTL",
.offset = 0x7c0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "cfg",
.offset = 0x7d0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "FIS",
.offset = 0x7e0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}
};
#define wbd111_num_partitions ARRAY_SIZE(wbd111_partitions)
#else
#define wbd111_partitions NULL
#define wbd111_num_partitions 0
#endif /* CONFIG_MTD_PARTITIONS */
static void __init wbd111_init(void)
{
gemini_gpio_init();
platform_register_uart();
platform_register_pflash(SZ_8M, wbd111_partitions,
wbd111_num_partitions);
platform_device_register(&wbd111_leds_device);
platform_device_register(&wbd111_keys_device);
}
MACHINE_START(WBD111, "Wiliboard WBD-111")
.phys_io = 0x7fffc000,
.io_pg_offst = ((0xffffc000) >> 18) & 0xfffc,
.boot_params = 0x100,
.map_io = gemini_map_io,
.init_irq = gemini_init_irq,
.timer = &wbd111_timer,
.init_machine = wbd111_init,
MACHINE_END

143
arch/arm/mach-gemini/board-wbd222.c Normal file
View file

@ -0,0 +1,143 @@
/*
* Support for Wiliboard WBD-222
*
* Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/input.h>
#include <linux/skbuff.h>
#include <linux/gpio_keys.h>
#include <linux/mdio-gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include "common.h"
static struct gpio_keys_button wbd222_keys[] = {
{
.code = KEY_SETUP,
.gpio = 5,
.active_low = 1,
.desc = "reset",
.type = EV_KEY,
},
};
static struct gpio_keys_platform_data wbd222_keys_data = {
.buttons = wbd222_keys,
.nbuttons = ARRAY_SIZE(wbd222_keys),
};
static struct platform_device wbd222_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &wbd222_keys_data,
},
};
static struct gpio_led wbd222_leds[] = {
{
.name = "L3red",
.gpio = 1,
},
{
.name = "L4green",
.gpio = 2,
},
{
.name = "L4red",
.gpio = 3,
},
{
.name = "L3green",
.gpio = 5,
},
};
static struct gpio_led_platform_data wbd222_leds_data = {
.num_leds = ARRAY_SIZE(wbd222_leds),
.leds = wbd222_leds,
};
static struct platform_device wbd222_leds_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &wbd222_leds_data,
},
};
static struct sys_timer wbd222_timer = {
.init = gemini_timer_init,
};
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition wbd222_partitions[] = {
{
.name = "RedBoot",
.offset = 0,
.size = 0x020000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "kernel",
.offset = 0x020000,
.size = 0x100000,
} , {
.name = "rootfs",
.offset = 0x120000,
.size = 0x6a0000,
} , {
.name = "VCTL",
.offset = 0x7c0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "cfg",
.offset = 0x7d0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "FIS",
.offset = 0x7e0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}
};
#define wbd222_num_partitions ARRAY_SIZE(wbd222_partitions)
#else
#define wbd222_partitions NULL
#define wbd222_num_partitions 0
#endif /* CONFIG_MTD_PARTITIONS */
static void __init wbd222_init(void)
{
gemini_gpio_init();
platform_register_uart();
platform_register_pflash(SZ_8M, wbd222_partitions,
wbd222_num_partitions);
platform_device_register(&wbd222_leds_device);
platform_device_register(&wbd222_keys_device);
}
MACHINE_START(WBD222, "Wiliboard WBD-222")
.phys_io = 0x7fffc000,
.io_pg_offst = ((0xffffc000) >> 18) & 0xfffc,
.boot_params = 0x100,
.map_io = gemini_map_io,
.init_irq = gemini_init_irq,
.timer = &wbd222_timer,
.init_machine = wbd222_init,
MACHINE_END

2
arch/arm/mach-h720x/include/mach/hardware.h
View file

@ -182,8 +182,6 @@
#define SERIAL_ENABLE_EN (1<<0)
/* General defines to pacify gcc */
#define PCIO_BASE (0) /* for inb, outb and friends */
#define PCIO_VIRT PCIO_BASE
#define __ASM_ARCH_HARDWARE_INCMACH_H
#include "boards.h"

2
arch/arm/mach-imx/mach-pca100.c
View file

@ -408,7 +408,7 @@ static void __init pca100_init(void)
mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
spi_register_board_info(pca100_spi_board_info,
ARRAY_SIZE(pca100_spi_board_info));
imx27_add_spi_imx0(&pca100_spi_0_data);
imx27_add_spi_imx0(&pca100_spi0_data);
#endif
gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");

1
arch/arm/mach-integrator/include/mach/hardware.h
View file

@ -32,7 +32,6 @@
#define IO_SIZE 0x0B000000 // How much?
#define IO_START INTEGRATOR_HDR_BASE // PA of IO
#define PCIO_BASE PCI_IO_VADDR
#define PCIMEM_BASE PCI_MEMORY_VADDR
#define pcibios_assign_all_busses() 1

1
arch/arm/mach-ixp23xx/include/mach/hardware.h
View file

@ -15,7 +15,6 @@
#define __ASM_ARCH_HARDWARE_H
/* PCI IO info */
#define PCIO_BASE IXP23XX_PCI_IO_VIRT
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0xe0000000

8
arch/arm/mach-ixp4xx/Kconfig
View file

@ -140,6 +140,14 @@ config MACH_FSG
FSG-3 device. For more information on this platform,
see http://www.nslu2-linux.org/wiki/FSG3/HomePage
config MACH_ARCOM_VULCAN
bool
prompt "Arcom/Eurotech Vulcan"
select PCI
help
Say 'Y' here if you want your kernel to support Arcom's
Vulcan board.
#
# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
#

2
arch/arm/mach-ixp4xx/Makefile
View file

@ -16,6 +16,7 @@ obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o
obj-y += common.o
@ -31,6 +32,7 @@ obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
obj-$(CONFIG_MACH_FSG) += fsg-setup.o
obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o
obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o
obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o

2
arch/arm/mach-ixp4xx/include/mach/debug-macro.S
View file

@ -16,8 +16,10 @@
moveq \rx, #0xc8000000
movne \rx, #0xff000000
orrne \rx, \rx, #0x00b00000
#ifdef __ARMEB__
add \rx,\rx,#3 @ Uart regs are at off set of 3 if
@ byte writes used - Big Endian.
#endif
.endm
#define UART_SHIFT 2

6
arch/arm/mach-ixp4xx/include/mach/io.h
View file

@ -353,7 +353,7 @@ static inline unsigned int ioread8(const void __iomem *addr)
return (unsigned int)inb(port & PIO_MASK);
else
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
return (unsigned int)__raw_readb(port);
return (unsigned int)__raw_readb(addr);
#else
return (unsigned int)__indirect_readb(addr);
#endif
@ -381,7 +381,7 @@ static inline unsigned int ioread16(const void __iomem *addr)
return (unsigned int)inw(port & PIO_MASK);
else
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
return le16_to_cpu(__raw_readw((u32)port));
return le16_to_cpu((__force __le16)__raw_readw(addr));
#else
return (unsigned int)__indirect_readw(addr);
#endif
@ -440,7 +440,7 @@ static inline void iowrite8(u8 value, void __iomem *addr)
outb(value, port & PIO_MASK);
else
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
__raw_writeb(value, port);
__raw_writeb(value, addr);
#else
__indirect_writeb(value, addr);
#endif

73
arch/arm/mach-ixp4xx/vulcan-pci.c Normal file
View file

@ -0,0 +1,73 @@
/*
* arch/arch/mach-ixp4xx/vulcan-pci.c
*
* Vulcan board-level PCI initialization
*
* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
*
* based on ixdp425-pci.c:
* Copyright (C) 2002 Intel Corporation.
* Copyright (C) 2003-2004 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/* PCI controller GPIO to IRQ pin mappings */
#define INTA 2
#define INTB 3
void __init vulcan_pci_preinit(void)
{
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
/*
* Cardbus bridge wants way more than the SoC can actually offer,
* and leaves the whole PCI bus in a mess. Artificially limit it
* to 8MB per region. Of course indirect mode doesn't have this
* limitation...
*/
pci_cardbus_mem_size = SZ_8M;
pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
(int)(pci_cardbus_mem_size >> 20));
#endif
set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}
static int __init vulcan_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
if (slot == 1)
return IXP4XX_GPIO_IRQ(INTA);
if (slot == 2)
return IXP4XX_GPIO_IRQ(INTB);
return -1;
}
struct hw_pci vulcan_pci __initdata = {
.nr_controllers = 1,
.preinit = vulcan_pci_preinit,
.swizzle = pci_std_swizzle,
.setup = ixp4xx_setup,
.scan = ixp4xx_scan_bus,
.map_irq = vulcan_map_irq,
};
int __init vulcan_pci_init(void)
{
if (machine_is_arcom_vulcan())
pci_common_init(&vulcan_pci);
return 0;
}
subsys_initcall(vulcan_pci_init);

246
arch/arm/mach-ixp4xx/vulcan-setup.c Normal file
View file

@ -0,0 +1,246 @@
/*
* arch/arm/mach-ixp4xx/vulcan-setup.c
*
* Arcom/Eurotech Vulcan board-setup
*
* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
*
* based on fsg-setup.c:
* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
*/
#include <linux/if_ether.h>
#include <linux/irq.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/io.h>
#include <linux/w1-gpio.h>
#include <linux/mtd/plat-ram.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
static struct flash_platform_data vulcan_flash_data = {
.map_name = "cfi_probe",
.width = 2,
};
static struct resource vulcan_flash_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device vulcan_flash = {
.name = "IXP4XX-Flash",
.id = 0,
.dev = {
.platform_data = &vulcan_flash_data,
},
.resource = &vulcan_flash_resource,
.num_resources = 1,
};
static struct platdata_mtd_ram vulcan_sram_data = {
.mapname = "Vulcan SRAM",
.bankwidth = 1,
};
static struct resource vulcan_sram_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device vulcan_sram = {
.name = "mtd-ram",
.id = 0,
.dev = {
.platform_data = &vulcan_sram_data,
},
.resource = &vulcan_sram_resource,
.num_resources = 1,
};
static struct resource vulcan_uart_resources[] = {
[0] = {
.start = IXP4XX_UART1_BASE_PHYS,
.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IXP4XX_UART2_BASE_PHYS,
.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
.flags = IORESOURCE_MEM,
},
[2] = {
.flags = IORESOURCE_MEM,
},
};
static struct plat_serial8250_port vulcan_uart_data[] = {
[0] = {
.mapbase = IXP4XX_UART1_BASE_PHYS,
.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
.irq = IRQ_IXP4XX_UART1,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = IXP4XX_UART_XTAL,
},
[1] = {
.mapbase = IXP4XX_UART2_BASE_PHYS,
.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
.irq = IRQ_IXP4XX_UART2,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = IXP4XX_UART_XTAL,
},
[2] = {
.irq = IXP4XX_GPIO_IRQ(4),
.irqflags = IRQF_TRIGGER_LOW,
.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.uartclk = 1843200,
},
[3] = {
.irq = IXP4XX_GPIO_IRQ(4),
.irqflags = IRQF_TRIGGER_LOW,
.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.uartclk = 1843200,
},
{ }
};
static struct platform_device vulcan_uart = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = vulcan_uart_data,
},
.resource = vulcan_uart_resources,
.num_resources = ARRAY_SIZE(vulcan_uart_resources),
};
static struct eth_plat_info vulcan_plat_eth[] = {
[0] = {
.phy = 0,
.rxq = 3,
.txreadyq = 20,
},
[1] = {
.phy = 1,
.rxq = 4,
.txreadyq = 21,
},
};
static struct platform_device vulcan_eth[] = {
[0] = {
.name = "ixp4xx_eth",
.id = IXP4XX_ETH_NPEB,
.dev = {
.platform_data = &vulcan_plat_eth[0],
},
},
[1] = {
.name = "ixp4xx_eth",
.id = IXP4XX_ETH_NPEC,
.dev = {
.platform_data = &vulcan_plat_eth[1],
},
},
};
static struct resource vulcan_max6369_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device vulcan_max6369 = {
.name = "max6369_wdt",
.id = -1,
.resource = &vulcan_max6369_resource,
.num_resources = 1,
};
static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
.pin = 14,
};
static struct platform_device vulcan_w1_gpio = {
.name = "w1-gpio",
.id = 0,
.dev = {
.platform_data = &vulcan_w1_gpio_pdata,
},
};
static struct platform_device *vulcan_devices[] __initdata = {
&vulcan_uart,
&vulcan_flash,
&vulcan_sram,
&vulcan_max6369,
&vulcan_eth[0],
&vulcan_eth[1],
&vulcan_w1_gpio,
};
static void __init vulcan_init(void)
{
ixp4xx_sys_init();
/* Flash is spread over both CS0 and CS1 */
vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_STROBE_T(3) |
IXP4XX_EXP_BUS_SIZE(0xF) |
IXP4XX_EXP_BUS_BYTE_RD16 |
IXP4XX_EXP_BUS_WR_EN;
*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
/* SRAM on CS2, (256kB, 8bit, writable) */
vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2);
vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_STROBE_T(1) |
IXP4XX_EXP_BUS_HOLD_T(2) |
IXP4XX_EXP_BUS_SIZE(9) |
IXP4XX_EXP_BUS_SPLT_EN |
IXP4XX_EXP_BUS_WR_EN |
IXP4XX_EXP_BUS_BYTE_EN;
/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3);
vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start;
vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8;
*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_STROBE_T(3) |
IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
IXP4XX_EXP_BUS_WR_EN |
IXP4XX_EXP_BUS_BYTE_EN;
/* GPIOS on CS4 (512 bytes, 8bits, writable) */
*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_WR_EN |
IXP4XX_EXP_BUS_BYTE_EN;
/* max6369 on CS5 (512 bytes, 8bits, writable) */
vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5);
vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5);
*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_WR_EN |
IXP4XX_EXP_BUS_BYTE_EN;
platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
}
MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
/* Maintainer: Marc Zyngier <maz@misterjones.org> */
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
.init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer,
.boot_params = 0x0100,
.init_machine = vulcan_init,
MACHINE_END

6
arch/arm/mach-mmp/aspenite.c
View file

@ -150,9 +150,8 @@ static void __init common_init(void)
MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = pxa168_init_irq,
.timer = &pxa168_timer,
.init_machine = common_init,
@ -160,9 +159,8 @@ MACHINE_END
MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = pxa168_init_irq,
.timer = &pxa168_timer,
.init_machine = common_init,

3
arch/arm/mach-mmp/avengers_lite.c
View file

@ -42,9 +42,8 @@ static void __init avengers_lite_init(void)
MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = pxa168_init_irq,
.timer = &pxa168_timer,
.init_machine = avengers_lite_init,

2
arch/arm/mach-mmp/common.c
View file

@ -31,7 +31,7 @@ static struct map_desc standard_io_desc[] __initdata = {
},
};
void __init pxa_map_io(void)
void __init mmp_map_io(void)
{
iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
}

11
arch/arm/mach-mmp/common.h
View file

@ -3,15 +3,6 @@
struct sys_timer;
extern void timer_init(int irq);
extern void mmp2_clear_pmic_int(void);
extern struct sys_timer pxa168_timer;
extern struct sys_timer pxa910_timer;
extern struct sys_timer mmp2_timer;
extern void __init pxa168_init_irq(void);
extern void __init pxa910_init_irq(void);
extern void __init mmp2_init_icu(void);
extern void __init mmp2_init_irq(void);
extern void __init icu_init_irq(void);
extern void __init pxa_map_io(void);
extern void __init mmp_map_io(void);

3
arch/arm/mach-mmp/flint.c
View file

@ -114,9 +114,8 @@ static void __init flint_init(void)
MACHINE_START(FLINT, "Flint Development Platform")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = mmp2_init_irq,
.timer = &mmp2_timer,
.init_machine = flint_init,

4
arch/arm/mach-mmp/include/mach/devices.h
View file

@ -1,3 +1,6 @@
#ifndef __MACH_DEVICE_H
#define __MACH_DEVICE_H
#include <linux/types.h>
#define MAX_RESOURCE_DMA 2
@ -47,3 +50,4 @@ struct pxa_device_desc mmp2_device_##_name __initdata = { \
}
extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
#endif /* __MACH_DEVICE_H */

7
arch/arm/mach-mmp/include/mach/mmp2.h
View file

@ -1,6 +1,13 @@
#ifndef __ASM_MACH_MMP2_H
#define __ASM_MACH_MMP2_H
struct sys_timer;
extern struct sys_timer mmp2_timer;
extern void __init mmp2_init_icu(void);
extern void __init mmp2_init_irq(void);
extern void mmp2_clear_pmic_int(void);
#include <linux/i2c.h>
#include <mach/devices.h>
#include <plat/i2c.h>

5
arch/arm/mach-mmp/include/mach/pxa168.h
View file

@ -1,6 +1,11 @@
#ifndef __ASM_MACH_PXA168_H
#define __ASM_MACH_PXA168_H
struct sys_timer;
extern struct sys_timer pxa168_timer;
extern void __init pxa168_init_irq(void);
#include <linux/i2c.h>
#include <mach/devices.h>
#include <plat/i2c.h>

5
arch/arm/mach-mmp/include/mach/pxa910.h
View file

@ -1,6 +1,11 @@
#ifndef __ASM_MACH_PXA910_H
#define __ASM_MACH_PXA910_H
struct sys_timer;
extern struct sys_timer pxa910_timer;
extern void __init pxa910_init_irq(void);
#include <linux/i2c.h>
#include <mach/devices.h>
#include <plat/i2c.h>

1
arch/arm/mach-mmp/irq-mmp2.c
View file

@ -16,6 +16,7 @@
#include <linux/io.h>
#include <mach/regs-icu.h>
#include <mach/mmp2.h>
#include "common.h"

3
arch/arm/mach-mmp/jasper.c
View file

@ -135,9 +135,8 @@ static void __init jasper_init(void)
MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = mmp2_init_irq,
.timer = &mmp2_timer,
.init_machine = jasper_init,

22
arch/arm/mach-mmp/mmp2.c
View file

@ -17,6 +17,7 @@
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/time.h>
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
#include <mach/regs-apmu.h>
@ -26,6 +27,7 @@
#include <mach/mfp.h>
#include <mach/gpio.h>
#include <mach/devices.h>
#include <mach/mmp2.h>
#include "common.h"
#include "clock.h"
@ -158,6 +160,26 @@ static int __init mmp2_init(void)
}
postcore_initcall(mmp2_init);
static void __init mmp2_timer_init(void)
{
unsigned long clk_rst;
__raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
/*
* enable bus/functional clock, enable 6.5MHz (divider 4),
* release reset
*/
clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
__raw_writel(clk_rst, APBC_MMP2_TIMERS);
timer_init(IRQ_MMP2_TIMER1);
}
struct sys_timer mmp2_timer = {
.init = mmp2_timer_init,
};
/* on-chip devices */
MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);

3
arch/arm/mach-mmp/tavorevb.c
View file

@ -100,9 +100,8 @@ static void __init tavorevb_init(void)
MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = pxa910_init_irq,
.timer = &pxa910_timer,
.init_machine = tavorevb_init,

21
arch/arm/mach-mmp/time.c
View file

@ -200,24 +200,3 @@ void __init timer_init(int irq)
clocksource_register(&cksrc);
clockevents_register_device(&ckevt);
}
static void __init mmp2_timer_init(void)
{
unsigned long clk_rst;
__raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
/*
* enable bus/functional clock, enable 6.5MHz (divider 4),
* release reset
*/
clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
__raw_writel(clk_rst, APBC_MMP2_TIMERS);
timer_init(IRQ_MMP2_TIMER1);
}
struct sys_timer mmp2_timer = {
.init = mmp2_timer_init,
};

3
arch/arm/mach-mmp/ttc_dkb.c
View file

@ -123,9 +123,8 @@ static void __init ttc_dkb_init(void)
MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
.phys_io = APB_PHYS_BASE,
.boot_params = 0x00000100,
.io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
.map_io = pxa_map_io,
.map_io = mmp_map_io,
.init_irq = pxa910_init_irq,
.timer = &pxa910_timer,
.init_machine = ttc_dkb_init,

2
arch/arm/mach-msm/Makefile
View file

@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
obj-$(CONFIG_MSM_SMD) += last_radio_log.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o devices-msm7x00.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o
obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o

1
arch/arm/mach-msm/acpuclock-arm11.c
View file

@ -17,7 +17,6 @@
*
*/
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>

115
arch/arm/mach-msm/board-trout-gpio.c
View file

@ -15,10 +15,20 @@
#include <linux/module.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include "board-trout.h"
static uint8_t trout_int_mask[2] = {
[0] = 0xff, /* mask all interrupts */
[1] = 0xff,
};
static uint8_t trout_sleep_int_mask[] = {
[0] = 0xff,
[1] = 0xff,
};
struct msm_gpio_chip {
struct gpio_chip chip;
void __iomem *reg; /* Base of register bank */
@ -95,16 +105,121 @@ static struct msm_gpio_chip msm_gpio_banks[] = {
TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0),
};
static void trout_gpio_irq_ack(unsigned int irq)
{
int bank = TROUT_INT_TO_BANK(irq);
uint8_t mask = TROUT_INT_TO_MASK(irq);
int reg = TROUT_BANK_TO_STAT_REG(bank);
/*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/
writeb(mask, TROUT_CPLD_BASE + reg);
}
static void trout_gpio_irq_mask(unsigned int irq)
{
unsigned long flags;
uint8_t reg_val;
int bank = TROUT_INT_TO_BANK(irq);
uint8_t mask = TROUT_INT_TO_MASK(irq);
int reg = TROUT_BANK_TO_MASK_REG(bank);
local_irq_save(flags);
reg_val = trout_int_mask[bank] |= mask;
/*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n",
irq, bank, reg_val);*/
writeb(reg_val, TROUT_CPLD_BASE + reg);
local_irq_restore(flags);
}
static void trout_gpio_irq_unmask(unsigned int irq)
{
unsigned long flags;
uint8_t reg_val;
int bank = TROUT_INT_TO_BANK(irq);
uint8_t mask = TROUT_INT_TO_MASK(irq);
int reg = TROUT_BANK_TO_MASK_REG(bank);
local_irq_save(flags);
reg_val = trout_int_mask[bank] &= ~mask;
/*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n",
irq, bank, reg_val);*/
writeb(reg_val, TROUT_CPLD_BASE + reg);
local_irq_restore(flags);
}
int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on)
{
unsigned long flags;
int bank = TROUT_INT_TO_BANK(irq);
uint8_t mask = TROUT_INT_TO_MASK(irq);
local_irq_save(flags);
if(on)
trout_sleep_int_mask[bank] &= ~mask;
else
trout_sleep_int_mask[bank] |= mask;
local_irq_restore(flags);
return 0;
}
static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
{
int j, m;
unsigned v;
int bank;
int stat_reg;
int int_base = TROUT_INT_START;
uint8_t int_mask;
for (bank = 0; bank < 2; bank++) {
stat_reg = TROUT_BANK_TO_STAT_REG(bank);
v = readb(TROUT_CPLD_BASE + stat_reg);
int_mask = trout_int_mask[bank];
if (v & int_mask) {
writeb(v & int_mask, TROUT_CPLD_BASE + stat_reg);
printk(KERN_ERR "trout_gpio_irq_handler: got masked "
"interrupt: %d:%02x\n", bank, v & int_mask);
}
v &= ~int_mask;
while (v) {
m = v & -v;
j = fls(m) - 1;
/*printk(KERN_INFO "msm_gpio_irq_handler %d:%02x %02x b"
"it %d irq %d\n", bank, v, m, j, int_base + j);*/
v &= ~m;
generic_handle_irq(int_base + j);
}
int_base += TROUT_INT_BANK0_COUNT;
}
desc->chip->ack(irq);
}
static struct irq_chip trout_gpio_irq_chip = {
.name = "troutgpio",
.ack = trout_gpio_irq_ack,
.mask = trout_gpio_irq_mask,
.unmask = trout_gpio_irq_unmask,
.set_wake = trout_gpio_irq_set_wake,
};
/*
* Called from the processor-specific init to enable GPIO pin support.
*/
int __init trout_init_gpio(void)
{
int i;
for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
set_irq_chip(i, &trout_gpio_irq_chip);
set_irq_handler(i, handle_edge_irq);
set_irq_flags(i, IRQF_VALID);
}
for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
gpiochip_add(&msm_gpio_banks[i].chip);
set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
set_irq_wake(MSM_GPIO_TO_INT(17), 1);
return 0;
}

186
arch/arm/mach-msm/board-trout-mmc.c Normal file
View file

@ -0,0 +1,186 @@
/* linux/arch/arm/mach-msm/board-trout-mmc.c
** Author: Brian Swetland <swetland@google.com>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sdio_ids.h>
#include <linux/err.h>
#include <linux/debugfs.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <mach/vreg.h>
#include <mach/mmc.h>
#include "devices.h"
#include "board-trout.h"
#include "proc_comm.h"
#define DEBUG_SDSLOT_VDD 1
/* ---- COMMON ---- */
static void config_gpio_table(uint32_t *table, int len)
{
int n;
unsigned id;
for(n = 0; n < len; n++) {
id = table[n];
msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0);
}
}
/* ---- SDCARD ---- */
static uint32_t sdcard_on_gpio_table[] = {
PCOM_GPIO_CFG(62, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), /* CLK */
PCOM_GPIO_CFG(63, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* CMD */
PCOM_GPIO_CFG(64, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT3 */
PCOM_GPIO_CFG(65, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT2 */
PCOM_GPIO_CFG(66, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT1 */
PCOM_GPIO_CFG(67, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT0 */
};
static uint32_t sdcard_off_gpio_table[] = {
PCOM_GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CLK */
PCOM_GPIO_CFG(63, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CMD */
PCOM_GPIO_CFG(64, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT3 */
PCOM_GPIO_CFG(65, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT2 */
PCOM_GPIO_CFG(66, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT1 */
PCOM_GPIO_CFG(67, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT0 */
};
static uint opt_disable_sdcard;
static int __init trout_disablesdcard_setup(char *str)
{
int cal = simple_strtol(str, NULL, 0);
opt_disable_sdcard = cal;
return 1;
}
__setup("board_trout.disable_sdcard=", trout_disablesdcard_setup);
static struct vreg *vreg_sdslot; /* SD slot power */
struct mmc_vdd_xlat {
int mask;
int level;
};
static struct mmc_vdd_xlat mmc_vdd_table[] = {
{ MMC_VDD_165_195, 1800 },
{ MMC_VDD_20_21, 2050 },
{ MMC_VDD_21_22, 2150 },
{ MMC_VDD_22_23, 2250 },
{ MMC_VDD_23_24, 2350 },
{ MMC_VDD_24_25, 2450 },
{ MMC_VDD_25_26, 2550 },
{ MMC_VDD_26_27, 2650 },
{ MMC_VDD_27_28, 2750 },
{ MMC_VDD_28_29, 2850 },
{ MMC_VDD_29_30, 2950 },
};
static unsigned int sdslot_vdd = 0xffffffff;
static unsigned int sdslot_vreg_enabled;
static uint32_t trout_sdslot_switchvdd(struct device *dev, unsigned int vdd)
{
int i, rc;
BUG_ON(!vreg_sdslot);
if (vdd == sdslot_vdd)
return 0;
sdslot_vdd = vdd;
if (vdd == 0) {
#if DEBUG_SDSLOT_VDD
printk("%s: Disabling SD slot power\n", __func__);
#endif
config_gpio_table(sdcard_off_gpio_table,
ARRAY_SIZE(sdcard_off_gpio_table));
vreg_disable(vreg_sdslot);
sdslot_vreg_enabled = 0;
return 0;
}
if (!sdslot_vreg_enabled) {
rc = vreg_enable(vreg_sdslot);
if (rc) {
printk(KERN_ERR "%s: Error enabling vreg (%d)\n",
__func__, rc);
}
config_gpio_table(sdcard_on_gpio_table,
ARRAY_SIZE(sdcard_on_gpio_table));
sdslot_vreg_enabled = 1;
}
for (i = 0; i < ARRAY_SIZE(mmc_vdd_table); i++) {
if (mmc_vdd_table[i].mask == (1 << vdd)) {
#if DEBUG_SDSLOT_VDD
printk("%s: Setting level to %u\n",
__func__, mmc_vdd_table[i].level);
#endif
rc = vreg_set_level(vreg_sdslot,
mmc_vdd_table[i].level);
if (rc) {
printk(KERN_ERR
"%s: Error setting vreg level (%d)\n",
__func__, rc);
}
return 0;
}
}
printk(KERN_ERR "%s: Invalid VDD %d specified\n", __func__, vdd);
return 0;
}
static unsigned int trout_sdslot_status(struct device *dev)
{
unsigned int status;
status = (unsigned int) gpio_get_value(TROUT_GPIO_SDMC_CD_N);
return (!status);
}
#define TROUT_MMC_VDD MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \
| MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \
| MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \
| MMC_VDD_28_29 | MMC_VDD_29_30
static struct msm_mmc_platform_data trout_sdslot_data = {
.ocr_mask = TROUT_MMC_VDD,
.status = trout_sdslot_status,
.translate_vdd = trout_sdslot_switchvdd,
};
int __init trout_init_mmc(unsigned int sys_rev)
{
sdslot_vreg_enabled = 0;
vreg_sdslot = vreg_get(0, "gp6");
if (IS_ERR(vreg_sdslot))
return PTR_ERR(vreg_sdslot);
set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
if (!opt_disable_sdcard)
msm_add_sdcc(2, &trout_sdslot_data,
TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 0);
else
printk(KERN_INFO "trout: SD-Card interface disabled\n");
return 0;
}

11
arch/arm/mach-msm/board-trout.c
View file

@ -30,6 +30,8 @@
#include "devices.h"
#include "board-trout.h"
extern int trout_init_mmc(unsigned int);
static struct platform_device *devices[] __initdata = {
&msm_device_uart3,
&msm_device_smd,
@ -55,7 +57,16 @@ static void __init trout_fixup(struct machine_desc *desc, struct tag *tags,
static void __init trout_init(void)
{
int rc;
platform_add_devices(devices, ARRAY_SIZE(devices));
#ifdef CONFIG_MMC
rc = trout_init_mmc(system_rev);
if (rc)
printk(KERN_CRIT "%s: MMC init failure (%d)\n", __func__, rc);
#endif
}
static struct map_desc trout_io_desc[] __initdata = {

1
arch/arm/mach-msm/clock.c
View file

@ -14,7 +14,6 @@
*
*/
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>

3
arch/arm/mach-msm/devices-msm7x00.c
View file

@ -322,7 +322,8 @@ static struct platform_device *msm_sdcc_devices[] __initdata = {
&msm_device_sdc4,
};
int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat,
int __init msm_add_sdcc(unsigned int controller,
struct msm_mmc_platform_data *plat,
unsigned int stat_irq, unsigned long stat_irq_flags)
{
struct platform_device *pdev;

4
arch/arm/mach-msm/include/mach/board.h
View file

@ -18,6 +18,7 @@
#define __ASM_ARCH_MSM_BOARD_H
#include <linux/types.h>
#include <mach/mmc.h>
/* platform device data structures */
@ -40,5 +41,8 @@ void __init msm_init_irq(void);
void __init msm_init_gpio(void);
void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks);
void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *);
int __init msm_add_sdcc(unsigned int controller,
struct msm_mmc_platform_data *plat,
unsigned int stat_irq, unsigned long stat_irq_flags);
#endif

2
arch/arm/mach-msm/include/mach/mmc.h
View file

@ -15,7 +15,7 @@ struct embedded_sdio_data {
int num_funcs;
};
struct mmc_platform_data {
struct msm_mmc_platform_data {
unsigned int ocr_mask; /* available voltages */
u32 (*translate_vdd)(struct device *, unsigned int);
unsigned int (*status)(struct device *);

2
arch/arm/mach-msm/smd.c
View file

@ -997,7 +997,7 @@ int smd_core_init(void)
return 0;
}
static int __init msm_smd_probe(struct platform_device *pdev)
static int __devinit msm_smd_probe(struct platform_device *pdev)
{
pr_info("smd_init()\n");

16
arch/arm/mach-omap2/board-omap3pandora.c
View file

@ -32,6 +32,7 @@
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio_keys.h>
#include <linux/mmc/card.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -258,6 +259,20 @@ static struct platform_device pandora_dss_device = {
},
};
static void pandora_wl1251_init_card(struct mmc_card *card)
{
/*
* We have TI wl1251 attached to MMC3. Pass this information to
* SDIO core because it can't be probed by normal methods.
*/
card->quirks |= MMC_QUIRK_NONSTD_SDIO;
card->cccr.wide_bus = 1;
card->cis.vendor = 0x104c;
card->cis.device = 0x9066;
card->cis.blksize = 512;
card->cis.max_dtr = 20000000;
}
static struct omap2_hsmmc_info omap3pandora_mmc[] = {
{
.mmc = 1,
@ -279,6 +294,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
.wires = 4,
.gpio_cd = -EINVAL,
.gpio_wp = -EINVAL,
.init_card = pandora_wl1251_init_card,
},
{} /* Terminator */
};

1
arch/arm/mach-omap2/hsmmc.c
View file

@ -268,6 +268,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
mmc->slots[0].gpio_wp = c->gpio_wp;
mmc->slots[0].remux = c->remux;
mmc->slots[0].init_card = c->init_card;
if (c->cover_only)
mmc->slots[0].cover = 1;

4
arch/arm/mach-omap2/hsmmc.h
View file

@ -6,6 +6,8 @@
* published by the Free Software Foundation.
*/
struct mmc_card;
struct omap2_hsmmc_info {
u8 mmc; /* controller 1/2/3 */
u8 wires; /* 1/4/8 wires */
@ -23,6 +25,8 @@ struct omap2_hsmmc_info {
int ocr_mask; /* temporary HACK */
/* Remux (pad configuation) when powering on/off */
void (*remux)(struct device *dev, int slot, int power_on);
/* init some special card */
void (*init_card)(struct mmc_card *card);
};
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)

80
arch/arm/mach-pxa/Kconfig
View file

@ -238,6 +238,17 @@ config MACH_COLIBRI
bool "Toradex Colibri PXA270"
select PXA27x
config MACH_COLIBRI_PXA270_EVALBOARD
bool "Toradex Colibri Evaluation Carrier Board support (PXA270)"
depends on MACH_COLIBRI
config MACH_COLIBRI_PXA270_INCOME
bool "Income s.r.o. PXA270 SBC"
depends on MACH_COLIBRI
select PXA27x
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_COLIBRI300
bool "Toradex Colibri PXA300/310"
select PXA3xx
@ -336,6 +347,9 @@ config ARCH_PXA_PALM
bool "PXA based Palm PDAs"
select HAVE_PWM
config MACH_PALM27X
bool
config MACH_PALMTE2
bool "Palm Tungsten|E2"
default y
@ -360,6 +374,7 @@ config MACH_PALMT5
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select MACH_PALM27X
help
Say Y here if you intend to run this kernel on a Palm Tungsten|T5
handheld computer.
@ -370,6 +385,7 @@ config MACH_PALMTX
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select MACH_PALM27X
help
Say Y here if you intend to run this kernel on a Palm T|X
handheld computer.
@ -380,6 +396,7 @@ config MACH_PALMZ72
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select MACH_PALM27X
help
Say Y here if you intend to run this kernel on Palm Zire 72
handheld computer.
@ -390,6 +407,7 @@ config MACH_PALMLD
depends on ARCH_PXA_PALM
select PXA27x
select IWMMXT
select MACH_PALM27X
help
Say Y here if you intend to run this kernel on a Palm LifeDrive
handheld computer.
@ -447,16 +465,13 @@ config PXA_SHARPSL
SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
handheld computer.
config SHARPSL_PM
bool
select APM_EMULATION
select SHARPSL_PM_MAX1111
config SHARPSL_PM_MAX1111
bool
depends on !CORGI_SSP_DEPRECATED
select HWMON
select SENSORS_MAX1111
config PXA_SHARPSL_DETECT_MACH_ID
bool "Detect machine ID at run-time in the decompressor"
depends on PXA_SHARPSL
help
Say Y here if you want the zImage decompressor to detect
the Zaurus machine ID at run-time. For latest kexec-based
boot loader, this is not necessary.
config MACH_POODLE
bool "Enable Sharp SL-5600 (Poodle) Support"
@ -510,6 +525,25 @@ config MACH_TOSA
select PXA25x
select PXA_HAVE_BOARD_IRQS
config TOSA_BT
tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
depends on MACH_TOSA
select RFKILL
help
This is a simple driver that is able to control
the state of built in bluetooth chip on tosa.
config TOSA_USE_EXT_KEYCODES
bool "Tosa keyboard: use extended keycodes"
depends on MACH_TOSA
default n
help
Say Y here to enable the tosa keyboard driver to generate extended
(>= 127) keycodes. Be aware, that they can't be correctly interpreted
by either console keyboard driver or by Kdrive keybd driver.
Say Y only if you know, what you are doing!
config MACH_ICONTROL
bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM"
select CPU_PXA320
@ -648,25 +682,15 @@ config PXA_SHARP_Cxx00
help
Enable common support for Sharp Cxx00 models
config TOSA_BT
tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
depends on MACH_TOSA
select RFKILL
help
This is a simple driver that is able to control
the state of built in bluetooth chip on tosa.
config TOSA_USE_EXT_KEYCODES
bool "Tosa keyboard: use extended keycodes"
depends on MACH_TOSA
default n
help
Say Y here to enable the tosa keyboard driver to generate extended
(>= 127) keycodes. Be aware, that they can't be correctly interpreted
by either console keyboard driver or by Kdrive keybd driver.
Say Y only if you know, what you are doing!
config SHARPSL_PM
bool
select APM_EMULATION
select SHARPSL_PM_MAX1111
config SHARPSL_PM_MAX1111
bool
select HWMON
select SENSORS_MAX1111
config PXA_HAVE_BOARD_IRQS
bool

13
arch/arm/mach-pxa/Makefile
View file

@ -51,14 +51,16 @@ obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o
obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o
obj-$(CONFIG_MACH_INTELMOTE2) += stargate2.o
obj-$(CONFIG_MACH_STARGATE2) += stargate2.o
obj-$(CONFIG_MACH_XCEP) += xcep.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_PCM027) += pcm027.o
obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) += colibri-pxa270-evalboard.o
obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o
obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
obj-$(CONFIG_MACH_VPAC270) += vpac270.o
@ -73,6 +75,7 @@ obj-$(CONFIG_PXA_EZX) += ezx.o
obj-$(CONFIG_MACH_MP900C) += mp900.o
obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
obj-$(CONFIG_MACH_PALMTC) += palmtc.o
obj-$(CONFIG_MACH_PALM27X) += palm27x.o
obj-$(CONFIG_MACH_PALMT5) += palmt5.o
obj-$(CONFIG_MACH_PALMTX) += palmtx.o
obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
@ -84,12 +87,6 @@ obj-$(CONFIG_MACH_POODLE) += poodle.o
obj-$(CONFIG_MACH_TOSA) += tosa.o
obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o
obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
obj-$(CONFIG_MACH_E330) += e330.o
obj-$(CONFIG_MACH_E350) += e350.o
obj-$(CONFIG_MACH_E740) += e740.o
obj-$(CONFIG_MACH_E750) += e750.o
obj-$(CONFIG_MACH_E400) += e400.o
obj-$(CONFIG_MACH_E800) += e800.o
obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o
obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o
obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o

758
arch/arm/mach-pxa/balloon3.c
View file

@ -22,9 +22,14 @@
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/ioport.h>
#include <linux/ucb1400.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/types.h>
#include <linux/i2c/pcf857x.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/max1586.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@ -51,6 +56,59 @@
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long balloon3_pin_config[] __initdata = {
/* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* Reset, configured as GPIO wakeup source */
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
/* LEDs */
GPIO9_GPIO, /* NAND activity LED */
GPIO10_GPIO, /* Heartbeat LED */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO113_AC97_nRESET,
GPIO95_GPIO,
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
/* USB Host */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
/* PC Card */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
};
/******************************************************************************
* Compatibility: Parameter parsing
******************************************************************************/
static unsigned long balloon3_irq_enabled;
static unsigned long balloon3_features_present =
@ -73,6 +131,321 @@ int __init parse_balloon3_features(char *arg)
}
early_param("balloon3_features", parse_balloon3_features);
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition balloon3_nor_partitions[] = {
{
.name = "Flash",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
}
};
static struct physmap_flash_data balloon3_flash_data[] = {
{
.width = 2, /* bankwidth in bytes */
.parts = balloon3_nor_partitions,
.nr_parts = ARRAY_SIZE(balloon3_nor_partitions)
}
};
static struct resource balloon3_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device balloon3_flash = {
.name = "physmap-flash",
.id = 0,
.resource = &balloon3_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = balloon3_flash_data,
},
};
static void __init balloon3_nor_init(void)
{
platform_device_register(&balloon3_flash);
}
#else
static inline void balloon3_nor_init(void) {}
#endif
/******************************************************************************
* Audio and Touchscreen
******************************************************************************/
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static struct ucb1400_pdata vpac270_ucb1400_pdata = {
.irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ),
};
static struct platform_device balloon3_ucb1400_device = {
.name = "ucb1400_core",
.id = -1,
.dev = {
.platform_data = &vpac270_ucb1400_pdata,
},
};
static void __init balloon3_ts_init(void)
{
if (!balloon3_has(BALLOON3_FEATURE_AUDIO))
return;
pxa_set_ac97_info(NULL);
platform_device_register(&balloon3_ucb1400_device);
}
#else
static inline void balloon3_ts_init(void) {}
#endif
/******************************************************************************
* Framebuffer
******************************************************************************/
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info balloon3_lcd_modes[] = {
{
.pixclock = 38000,
.xres = 480,
.yres = 640,
.bpp = 16,
.hsync_len = 8,
.left_margin = 8,
.right_margin = 8,
.vsync_len = 2,
.upper_margin = 4,
.lower_margin = 5,
.sync = 0,
},
};
static struct pxafb_mach_info balloon3_lcd_screen = {
.modes = balloon3_lcd_modes,
.num_modes = ARRAY_SIZE(balloon3_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
static void balloon3_backlight_power(int on)
{
gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
}
static void __init balloon3_lcd_init(void)
{
int ret;
if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY))
return;
ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON");
if (ret) {
pr_err("Requesting BKL-ON GPIO failed!\n");
goto err;
}
ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
if (ret) {
pr_err("Setting BKL-ON GPIO direction failed!\n");
goto err2;
}
balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
set_pxa_fb_info(&balloon3_lcd_screen);
return;
err2:
gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT);
err:
return;
}
#else
static inline void balloon3_lcd_init(void) {}
#endif
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data balloon3_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
.detect_delay_ms = 200,
};
static void __init balloon3_mmc_init(void)
{
pxa_set_mci_info(&balloon3_mci_platform_data);
}
#else
static inline void balloon3_mmc_init(void) {}
#endif
/******************************************************************************
* USB Gadget
******************************************************************************/
#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
static void balloon3_udc_command(int cmd)
{
if (cmd == PXA2XX_UDC_CMD_CONNECT)
UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE;
else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
UP2OCR &= ~UP2OCR_DPPUE;
}
static int balloon3_udc_is_connected(void)
{
return 1;
}
static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = {
.udc_command = balloon3_udc_command,
.udc_is_connected = balloon3_udc_is_connected,
.gpio_pullup = -1,
};
static void __init balloon3_udc_init(void)
{
pxa_set_udc_info(&balloon3_udc_info);
platform_device_register(&balloon3_gpio_vbus);
}
#else
static inline void balloon3_udc_init(void) {}
#endif
/******************************************************************************
* IrDA
******************************************************************************/
#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
static struct pxaficp_platform_data balloon3_ficp_platform_data = {
.transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF,
};
static void __init balloon3_irda_init(void)
{
pxa_set_ficp_info(&balloon3_ficp_platform_data);
}
#else
static inline void balloon3_irda_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static struct pxaohci_platform_data balloon3_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static void __init balloon3_uhc_init(void)
{
if (!balloon3_has(BALLOON3_FEATURE_OHCI))
return;
pxa_set_ohci_info(&balloon3_ohci_info);
}
#else
static inline void balloon3_uhc_init(void) {}
#endif
/******************************************************************************
* LEDs
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
struct gpio_led balloon3_gpio_leds[] = {
{
.name = "balloon3:green:idle",
.default_trigger = "heartbeat",
.gpio = BALLOON3_GPIO_LED_IDLE,
.active_low = 1,
}, {
.name = "balloon3:green:nand",
.default_trigger = "nand-disk",
.gpio = BALLOON3_GPIO_LED_NAND,
.active_low = 1,
},
};
static struct gpio_led_platform_data balloon3_gpio_led_info = {
.leds = balloon3_gpio_leds,
.num_leds = ARRAY_SIZE(balloon3_gpio_leds),
};
static struct platform_device balloon3_leds = {
.name = "leds-gpio",
.id = 0,
.dev = {
.platform_data = &balloon3_gpio_led_info,
}
};
struct gpio_led balloon3_pcf_gpio_leds[] = {
{
.name = "balloon3:green:led0",
.gpio = BALLOON3_PCF_GPIO_LED0,
.active_low = 1,
}, {
.name = "balloon3:green:led1",
.gpio = BALLOON3_PCF_GPIO_LED1,
.active_low = 1,
}, {
.name = "balloon3:orange:led2",
.gpio = BALLOON3_PCF_GPIO_LED2,
.active_low = 1,
}, {
.name = "balloon3:orange:led3",
.gpio = BALLOON3_PCF_GPIO_LED3,
.active_low = 1,
}, {
.name = "balloon3:orange:led4",
.gpio = BALLOON3_PCF_GPIO_LED4,
.active_low = 1,
}, {
.name = "balloon3:orange:led5",
.gpio = BALLOON3_PCF_GPIO_LED5,
.active_low = 1,
}, {
.name = "balloon3:red:led6",
.gpio = BALLOON3_PCF_GPIO_LED6,
.active_low = 1,
}, {
.name = "balloon3:red:led7",
.gpio = BALLOON3_PCF_GPIO_LED7,
.active_low = 1,
},
};
static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = {
.leds = balloon3_pcf_gpio_leds,
.num_leds = ARRAY_SIZE(balloon3_pcf_gpio_leds),
};
static struct platform_device balloon3_pcf_leds = {
.name = "leds-gpio",
.id = 1,
.dev = {
.platform_data = &balloon3_pcf_gpio_led_info,
}
};
static void __init balloon3_leds_init(void)
{
platform_device_register(&balloon3_leds);
platform_device_register(&balloon3_pcf_leds);
}
#else
static inline void balloon3_leds_init(void) {}
#endif
/******************************************************************************
* FPGA IRQ
******************************************************************************/
static void balloon3_mask_irq(unsigned int irq)
{
int balloon3_irq = (irq - BALLOON3_IRQ(0));
@ -98,7 +471,6 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
balloon3_irq_enabled;
do {
/* clear useless edge notification */
if (desc->chip->ack)
@ -132,201 +504,259 @@ static void __init balloon3_init_irq(void)
"enabled\n", __func__, BALLOON3_AUX_NIRQ);
}
static unsigned long balloon3_ac97_pin_config[] = {
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO113_AC97_nRESET,
/******************************************************************************
* GPIO expander
******************************************************************************/
#if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE)
static struct pcf857x_platform_data balloon3_pcf857x_pdata = {
.gpio_base = BALLOON3_PCF_GPIO_BASE,
.n_latch = 0,
.setup = NULL,
.teardown = NULL,
.context = NULL,
};
static void balloon3_backlight_power(int on)
{
pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
}
static unsigned long balloon3_lcd_pin_config[] = {
/* LCD - 16bpp Active TFT */
GPIOxx_LCD_TFT_16BPP,
GPIO99_GPIO, /* Backlight */
};
static struct pxafb_mode_info balloon3_lcd_modes[] = {
static struct i2c_board_info __initdata balloon3_i2c_devs[] = {
{
.pixclock = 38000,
.xres = 480,
.yres = 640,
.bpp = 16,
.hsync_len = 8,
.left_margin = 8,
.right_margin = 8,
.vsync_len = 2,
.upper_margin = 4,
.lower_margin = 5,
.sync = 0,
I2C_BOARD_INFO("pcf8574a", 0x38),
.platform_data = &balloon3_pcf857x_pdata,
},
};
static struct pxafb_mach_info balloon3_pxafb_info = {
.modes = balloon3_lcd_modes,
.num_modes = ARRAY_SIZE(balloon3_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_backlight_power = balloon3_backlight_power,
};
static unsigned long balloon3_mmc_pin_config[] = {
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
};
static void balloon3_mci_setpower(struct device *dev, unsigned int vdd)
static void __init balloon3_i2c_init(void)
{
struct pxamci_platform_data *p_d = dev->platform_data;
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs));
}
#else
static inline void balloon3_i2c_init(void) {}
#endif
if ((1 << vdd) & p_d->ocr_mask) {
pr_debug("%s: on\n", __func__);
/* FIXME something to prod here? */
} else {
pr_debug("%s: off\n", __func__);
/* FIXME something to prod here? */
/******************************************************************************
* NAND
******************************************************************************/
#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
static uint16_t balloon3_ctl =
BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
BALLOON3_NAND_CONTROL_FLWP;
static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) {
if (ctrl & NAND_CLE)
balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE;
else
balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE;
if (ctrl & NAND_ALE)
balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE;
else
balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE;
__raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W);
}
static struct pxamci_platform_data balloon3_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.setpower = balloon3_mci_setpower,
static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
{
if (chip < 0 || chip > 3)
return;
balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 |
BALLOON3_NAND_CONTROL_FLCE1 |
BALLOON3_NAND_CONTROL_FLCE2 |
BALLOON3_NAND_CONTROL_FLCE3;
/* Deassert correct nCE line */
balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip);
__raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
}
static int balloon3_nand_probe(struct platform_device *pdev)
{
void __iomem *temp_map;
uint16_t ver;
int ret;
__raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG);
ver = __raw_readw(BALLOON3_FPGA_VER);
if (ver > 0x0201)
pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. "
"NAND support might be broken in this version!", ver);
/* Power up the NAND chips */
ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND");
if (ret)
goto err1;
ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1);
if (ret)
goto err2;
gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
/* Deassert all nCE lines and write protect line */
__raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
return 0;
err2:
gpio_free(BALLOON3_GPIO_RUN_NAND);
err1:
return ret;
}
static void balloon3_nand_remove(struct platform_device *pdev)
{
/* Power down the NAND chips */
gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0);
gpio_free(BALLOON3_GPIO_RUN_NAND);
}
static struct mtd_partition balloon3_partition_info[] = {
[0] = {
.name = "Boot",
.offset = 0,
.size = SZ_4M,
},
[1] = {
.name = "RootFS",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL
},
};
static int balloon3_udc_is_connected(void)
{
pr_debug("%s: udc connected\n", __func__);
return 1;
}
static const char *balloon3_part_probes[] = { "cmdlinepart", NULL };
static void balloon3_udc_command(int cmd)
{
switch (cmd) {
case PXA2XX_UDC_CMD_CONNECT:
UP2OCR |= (UP2OCR_DPPUE + UP2OCR_DPPUBE);
pr_debug("%s: connect\n", __func__);
break;
case PXA2XX_UDC_CMD_DISCONNECT:
UP2OCR &= ~UP2OCR_DPPUE;
pr_debug("%s: disconnect\n", __func__);
break;
struct platform_nand_data balloon3_nand_pdata = {
.chip = {
.nr_chips = 4,
.chip_offset = 0,
.nr_partitions = ARRAY_SIZE(balloon3_partition_info),
.partitions = balloon3_partition_info,
.chip_delay = 50,
.part_probe_types = balloon3_part_probes,
},
.ctrl = {
.hwcontrol = 0,
.dev_ready = 0,
.select_chip = balloon3_nand_select_chip,
.cmd_ctrl = balloon3_nand_cmd_ctl,
.probe = balloon3_nand_probe,
.remove = balloon3_nand_remove,
},
};
static struct resource balloon3_nand_resource[] = {
[0] = {
.start = BALLOON3_NAND_BASE,
.end = BALLOON3_NAND_BASE + 0x4,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device balloon3_nand = {
.name = "gen_nand",
.num_resources = ARRAY_SIZE(balloon3_nand_resource),
.resource = balloon3_nand_resource,
.id = -1,
.dev = {
.platform_data = &balloon3_nand_pdata,
}
};
static void __init balloon3_nand_init(void)
{
platform_device_register(&balloon3_nand);
}
#else
static inline void balloon3_nand_init(void) {}
#endif
static struct pxa2xx_udc_mach_info balloon3_udc_info = {
.udc_is_connected = balloon3_udc_is_connected,
.udc_command = balloon3_udc_command,
};
static struct pxaficp_platform_data balloon3_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
};
static unsigned long balloon3_ohci_pin_config[] = {
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
};
static struct pxaohci_platform_data balloon3_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static unsigned long balloon3_pin_config[] __initdata = {
/* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* Wakeup GPIO */
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
/* NAND & IDLE LED GPIOs */
GPIO9_GPIO,
GPIO10_GPIO,
};
static struct gpio_led balloon3_gpio_leds[] = {
/******************************************************************************
* Core power regulator
******************************************************************************/
#if defined(CONFIG_REGULATOR_MAX1586) || \
defined(CONFIG_REGULATOR_MAX1586_MODULE)
static struct regulator_consumer_supply balloon3_max1587a_consumers[] = {
{
.name = "balloon3:green:idle",
.default_trigger = "heartbeat",
.gpio = BALLOON3_GPIO_LED_IDLE,
.active_low = 1,
.supply = "vcc_core",
}
};
static struct regulator_init_data balloon3_max1587a_v3_info = {
.constraints = {
.name = "vcc_core range",
.min_uV = 900000,
.max_uV = 1705000,
.always_on = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
},
.consumer_supplies = balloon3_max1587a_consumers,
.num_consumer_supplies = ARRAY_SIZE(balloon3_max1587a_consumers),
};
static struct max1586_subdev_data balloon3_max1587a_subdevs[] = {
{
.name = "balloon3:green:nand",
.default_trigger = "nand-disk",
.gpio = BALLOON3_GPIO_LED_NAND,
.active_low = 1,
.name = "vcc_core",
.id = MAX1586_V3,
.platform_data = &balloon3_max1587a_v3_info,
}
};
static struct max1586_platform_data balloon3_max1587a_info = {
.subdevs = balloon3_max1587a_subdevs,
.num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs),
.v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
};
static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = {
{
I2C_BOARD_INFO("max1586", 0x14),
.platform_data = &balloon3_max1587a_info,
},
};
static struct gpio_led_platform_data balloon3_gpio_leds_platform_data = {
.leds = balloon3_gpio_leds,
.num_leds = ARRAY_SIZE(balloon3_gpio_leds),
};
static struct platform_device balloon3led_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &balloon3_gpio_leds_platform_data,
},
};
static void __init balloon3_pmic_init(void)
{
pxa27x_set_i2c_power_info(NULL);
i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info));
}
#else
static inline void balloon3_pmic_init(void) {}
#endif
/******************************************************************************
* Machine init
******************************************************************************/
static void __init balloon3_init(void)
{
pr_info("Initialising Balloon3\n");
/* system bus arbiter setting
* - Core_Park
* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
if (balloon3_has(BALLOON3_FEATURE_AUDIO)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
pxa_set_ac97_info(NULL);
}
if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT,
"LCD Backlight Power");
gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
set_pxa_fb_info(&balloon3_pxafb_info);
}
if (balloon3_has(BALLOON3_FEATURE_MMC)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
pxa_set_mci_info(&balloon3_mci_platform_data);
}
pxa_set_ficp_info(&balloon3_ficp_platform_data);
if (balloon3_has(BALLOON3_FEATURE_OHCI)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ohci_pin_config));
pxa_set_ohci_info(&balloon3_ohci_platform_data);
}
pxa_set_udc_info(&balloon3_udc_info);
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
platform_device_register(&balloon3led_device);
balloon3_i2c_init();
balloon3_irda_init();
balloon3_lcd_init();
balloon3_leds_init();
balloon3_mmc_init();
balloon3_nand_init();
balloon3_nor_init();
balloon3_pmic_init();
balloon3_ts_init();
balloon3_udc_init();
balloon3_uhc_init();
}
static struct map_desc balloon3_io_desc[] __initdata = {

4
arch/arm/mach-pxa/cm-x300.c
View file

@ -689,6 +689,7 @@ static void __init cm_x300_init_da9030(void)
{
pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
i2c_register_board_info(1, &cm_x300_pmic_info, 1);
set_irq_wake(IRQ_WAKEUP0, 1);
}
static void __init cm_x300_init_wi2wi(void)
@ -745,9 +746,10 @@ static void __init cm_x300_init(void)
{
cm_x300_init_mfp();
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
if (cpu_is_pxa300())
pxa_set_ffuart_info(NULL);
cm_x300_init_da9030();
cm_x300_init_dm9000();

111
arch/arm/mach-pxa/colibri-pxa270-evalboard.c Normal file
View file

@ -0,0 +1,111 @@
/*
* linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
*
* Support for Toradex PXA270 based Colibri Evaluation Carrier Board
* Daniel Mack <daniel@caiaq.de>
* Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/mach/arch.h>
#include <mach/pxa27x.h>
#include <mach/colibri.h>
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pxa27x-udc.h>
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO0_GPIO, /* SD detect */
/* FFUART */
GPIO39_FFUART_TXD,
GPIO34_FFUART_RXD,
/* UHC */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
GPIO119_USBH2_PWR,
GPIO120_USBH2_PEN,
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data colibri_pxa270_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_power = -1,
.gpio_card_detect = GPIO0_COLIBRI_PXA270_SD_DETECT,
.gpio_card_ro = -1,
.detect_delay_ms = 200,
};
static void __init colibri_pxa270_mmc_init(void)
{
pxa_set_mci_info(&colibri_pxa270_mci_platform_data);
}
#else
static inline void colibri_pxa270_mmc_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static int colibri_pxa270_ohci_init(struct device *dev)
{
UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
return 0;
}
static struct pxaohci_platform_data colibri_pxa270_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | ENABLE_PORT2 |
POWER_CONTROL_LOW | POWER_SENSE_LOW,
.init = colibri_pxa270_ohci_init,
};
static void __init colibri_pxa270_uhc_init(void)
{
pxa_set_ohci_info(&colibri_pxa270_ohci_info);
}
#else
static inline void colibri_pxa270_uhc_init(void) {}
#endif
void __init colibri_pxa270_evalboard_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
colibri_pxa270_mmc_init();
colibri_pxa270_uhc_init();
}

272
arch/arm/mach-pxa/colibri-pxa270-income.c Normal file
View file

@ -0,0 +1,272 @@
/*
* linux/arch/arm/mach-pxa/income.c
*
* Support for Income s.r.o. SH-Dmaster PXA270 SBC
*
* Copyright (C) 2010
* Marek Vasut <marek.vasut@gmail.com>
* Pavel Revak <palo@bielyvlk.sk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/pwm_backlight.h>
#include <linux/sysdev.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pxa27x.h>
#include <mach/pxa27x-udc.h>
#include <mach/pxafb.h>
#include <plat/i2c.h>
#include "devices.h"
#include "generic.h"
#define GPIO114_INCOME_ETH_IRQ (114)
#define GPIO0_INCOME_SD_DETECT (0)
#define GPIO0_INCOME_SD_RO (1)
#define GPIO54_INCOME_LED_A (54)
#define GPIO55_INCOME_LED_B (55)
#define GPIO113_INCOME_TS_IRQ (113)
/******************************************************************************
* Pin configuration
******************************************************************************/
static mfp_cfg_t income_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO0_GPIO, /* SD detect */
GPIO1_GPIO, /* SD read-only */
/* FFUART */
GPIO39_FFUART_TXD,
GPIO34_FFUART_RXD,
/* BFUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO45_BTUART_RTS,
/* STUART */
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
/* UHC */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* PWM */
GPIO16_PWM0_OUT,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* LED */
GPIO54_GPIO, /* LED A */
GPIO55_GPIO, /* LED B */
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data income_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_power = -1,
.gpio_card_detect = GPIO0_INCOME_SD_DETECT,
.gpio_card_ro = GPIO0_INCOME_SD_RO,
.detect_delay_ms = 200,
};
static void __init income_mmc_init(void)
{
pxa_set_mci_info(&income_mci_platform_data);
}
#else
static inline void income_mmc_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static struct pxaohci_platform_data income_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static void __init income_uhc_init(void)
{
pxa_set_ohci_info(&income_ohci_info);
}
#else
static inline void income_uhc_init(void) {}
#endif
/******************************************************************************
* LED
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
struct gpio_led income_gpio_leds[] = {
{
.name = "income:green:leda",
.default_trigger = "none",
.gpio = GPIO54_INCOME_LED_A,
.active_low = 1,
},
{
.name = "income:green:ledb",
.default_trigger = "none",
.gpio = GPIO55_INCOME_LED_B,
.active_low = 1,
}
};
static struct gpio_led_platform_data income_gpio_led_info = {
.leds = income_gpio_leds,
.num_leds = ARRAY_SIZE(income_gpio_leds),
};
static struct platform_device income_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &income_gpio_led_info,
}
};
static void __init income_led_init(void)
{
platform_device_register(&income_leds);
}
#else
static inline void income_led_init(void) {}
#endif
/******************************************************************************
* I2C
******************************************************************************/
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
static struct i2c_board_info __initdata income_i2c_devs[] = {
{
I2C_BOARD_INFO("ds1340", 0x68),
}, {
I2C_BOARD_INFO("lm75", 0x4f),
},
};
static void __init income_i2c_init(void)
{
pxa_set_i2c_info(NULL);
pxa27x_set_i2c_power_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(income_i2c_devs));
}
#else
static inline void income_i2c_init(void) {}
#endif
/******************************************************************************
* Framebuffer
******************************************************************************/
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info income_lcd_modes[] = {
{
.pixclock = 144700,
.xres = 320,
.yres = 240,
.bpp = 32,
.depth = 18,
.left_margin = 10,
.right_margin = 10,
.upper_margin = 7,
.lower_margin = 8,
.hsync_len = 20,
.vsync_len = 2,
.sync = FB_SYNC_VERT_HIGH_ACT,
},
};
static struct pxafb_mach_info income_lcd_screen = {
.modes = income_lcd_modes,
.num_modes = ARRAY_SIZE(income_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_18BPP | LCD_PCLK_EDGE_FALL,
};
static void __init income_lcd_init(void)
{
set_pxa_fb_info(&income_lcd_screen);
}
#else
static inline void income_lcd_init(void) {}
#endif
/******************************************************************************
* Backlight
******************************************************************************/
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM__MODULE)
static struct platform_pwm_backlight_data income_backlight_data = {
.pwm_id = 0,
.max_brightness = 0x3ff,
.dft_brightness = 0x1ff,
.pwm_period_ns = 1000000,
};
static struct platform_device income_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &income_backlight_data,
},
};
static void __init income_pwm_init(void)
{
platform_device_register(&income_backlight);
}
#else
static inline void income_pwm_init(void) {}
#endif
void __init colibri_pxa270_income_boardinit(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
income_mmc_init();
income_uhc_init();
income_led_init();
income_i2c_init();
income_lcd_init();
income_pwm_init();
}

176
arch/arm/mach-pxa/colibri-pxa270.c
View file

@ -3,6 +3,7 @@
*
* Support for Toradex PXA270 based Colibri module
* Daniel Mack <daniel@caiaq.de>
* Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -10,49 +11,55 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/ucb1400.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include <asm/mach-types.h>
#include <asm/sizes.h>
#include <mach/pxa27x.h>
#include <mach/audio.h>
#include <mach/colibri.h>
#include <mach/pxa27x.h>
#include "generic.h"
#include "devices.h"
#include "generic.h"
/*
* GPIO configuration
*/
/******************************************************************************
* Pin configuration
******************************************************************************/
static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
/* Ethernet */
GPIO78_nCS_2, /* Ethernet CS */
GPIO114_GPIO, /* Ethernet IRQ */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO95_AC97_nRESET,
GPIO98_AC97_SYSCLK,
GPIO113_GPIO, /* Touchscreen IRQ */
};
/*
* NOR flash
*/
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition colibri_partitions[] = {
{
.name = "Bootloader",
.offset = 0x00000000,
.size = 0x00040000,
.mask_flags = MTD_WRITEABLE /* force read-only */
.mask_flags = MTD_WRITEABLE /* force read-only */
}, {
.name = "Kernel",
.offset = 0x00040000,
@ -90,50 +97,113 @@ static struct platform_device colibri_pxa270_flash_device = {
.num_resources = 1,
};
/*
* DM9000 Ethernet
*/
#if defined(CONFIG_DM9000)
static struct resource dm9000_resources[] = {
[0] = {
.start = COLIBRI_PXA270_ETH_PHYS,
.end = COLIBRI_PXA270_ETH_PHYS + 3,
static void __init colibri_pxa270_nor_init(void)
{
platform_device_register(&colibri_pxa270_flash_device);
}
#else
static inline void colibri_pxa270_nor_init(void) {}
#endif
/******************************************************************************
* Ethernet
******************************************************************************/
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource colibri_pxa270_dm9000_resources[] = {
{
.start = PXA_CS2_PHYS,
.end = PXA_CS2_PHYS + 3,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = COLIBRI_PXA270_ETH_PHYS + 4,
.end = COLIBRI_PXA270_ETH_PHYS + 4 + 500,
{
.start = PXA_CS2_PHYS + 4,
.end = PXA_CS2_PHYS + 4 + 500,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = COLIBRI_PXA270_ETH_IRQ,
.end = COLIBRI_PXA270_ETH_IRQ,
{
.start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
.end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
},
};
static struct platform_device dm9000_device = {
static struct platform_device colibri_pxa270_dm9000_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(dm9000_resources),
.resource = dm9000_resources,
.num_resources = ARRAY_SIZE(colibri_pxa270_dm9000_resources),
.resource = colibri_pxa270_dm9000_resources,
};
#endif /* CONFIG_DM9000 */
static struct platform_device *colibri_pxa270_devices[] __initdata = {
&colibri_pxa270_flash_device,
#if defined(CONFIG_DM9000)
&dm9000_device,
static void __init colibri_pxa270_eth_init(void)
{
platform_device_register(&colibri_pxa270_dm9000_device);
}
#else
static inline void colibri_pxa270_eth_init(void) {}
#endif
/******************************************************************************
* Audio and Touchscreen
******************************************************************************/
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
.reset_gpio = 95,
};
static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
.irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ),
};
static struct platform_device colibri_pxa270_ucb1400_device = {
.name = "ucb1400_core",
.id = -1,
.dev = {
.platform_data = &colibri_pxa270_ucb1400_pdata,
},
};
static void __init colibri_pxa270_tsc_init(void)
{
pxa_set_ac97_info(&colibri_pxa270_ac97_pdata);
platform_device_register(&colibri_pxa270_ucb1400_device);
}
#else
static inline void colibri_pxa270_tsc_init(void) {}
#endif
static int colibri_pxa270_baseboard;
core_param(colibri_pxa270_baseboard, colibri_pxa270_baseboard, int, 0444);
static void __init colibri_pxa270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices));
colibri_pxa270_nor_init();
colibri_pxa270_eth_init();
colibri_pxa270_tsc_init();
switch (colibri_pxa270_baseboard) {
case COLIBRI_PXA270_EVALBOARD:
colibri_pxa270_evalboard_init();
break;
case COLIBRI_PXA270_INCOME:
colibri_pxa270_income_boardinit();
break;
default:
printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n",
colibri_pxa270_baseboard);
}
}
/* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either
* with the INCOME mach type or with COLIBRI and the kernel parameter
* "colibri_pxa270_baseboard=1"
*/
static void __init colibri_pxa270_income_init(void)
{
colibri_pxa270_baseboard = COLIBRI_PXA270_INCOME;
colibri_pxa270_init();
}
MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
@ -146,3 +216,13 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
.timer = &pxa_timer,
MACHINE_END
MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.init_machine = colibri_pxa270_income_init,
.map_io = pxa_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
MACHINE_END

40
arch/arm/mach-pxa/colibri-pxa320.c
View file

@ -16,6 +16,7 @@
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/usb/gpio_vbus.h>
#include <asm/mach-types.h>
#include <asm/sizes.h>
@ -28,6 +29,8 @@
#include <mach/pxafb.h>
#include <mach/ohci.h>
#include <mach/audio.h>
#include <mach/pxa27x-udc.h>
#include <mach/udc.h>
#include "generic.h"
#include "devices.h"
@ -101,6 +104,42 @@ void __init colibri_pxa320_init_ohci(void)
static inline void colibri_pxa320_init_ohci(void) {}
#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
.gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
.gpio_pullup = -1,
};
static struct platform_device colibri_pxa320_gpio_vbus = {
.name = "gpio-vbus",
.id = -1,
.dev = {
.platform_data = &colibri_pxa320_gpio_vbus_info,
},
};
static void colibri_pxa320_udc_command(int cmd)
{
if (cmd == PXA2XX_UDC_CMD_CONNECT)
UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
UP2OCR = UP2OCR_HXOE;
}
static struct pxa2xx_udc_mach_info colibri_pxa320_udc_info __initdata = {
.udc_command = colibri_pxa320_udc_command,
.gpio_pullup = -1,
};
static void __init colibri_pxa320_init_udc(void)
{
pxa_set_udc_info(&colibri_pxa320_udc_info);
platform_device_register(&colibri_pxa320_gpio_vbus);
}
#else
static inline void colibri_pxa320_init_udc(void) {}
#endif
static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = {
GPIO22_MMC1_CLK,
GPIO23_MMC1_CMD,
@ -212,6 +251,7 @@ void __init colibri_pxa320_init(void)
colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
mfp_to_gpio(MFP_PIN_GPIO28));
colibri_pxa320_init_uart();
colibri_pxa320_init_udc();
}
MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")

5
arch/arm/mach-pxa/corgi.c
View file

@ -50,14 +50,13 @@
#include <mach/udc.h>
#include <mach/pxa2xx_spi.h>
#include <mach/corgi.h>
#include <mach/sharpsl.h>
#include <mach/sharpsl_pm.h>
#include <asm/mach/sharpsl_param.h>
#include <asm/hardware/scoop.h>
#include "generic.h"
#include "devices.h"
#include "sharpsl.h"
static unsigned long corgi_pin_config[] __initdata = {
/* Static Memory I/O */
@ -185,8 +184,6 @@ static struct scoop_pcmcia_config corgi_pcmcia_config = {
.num_devs = 1,
};
EXPORT_SYMBOL(corgiscoop_device);
static struct w100_mem_info corgi_fb_mem = {
.ext_cntl = 0x00040003,
.sdram_mode_reg = 0x00650021,

11
arch/arm/mach-pxa/corgi_pm.c
View file

@ -23,12 +23,11 @@
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/sharpsl.h>
#include <mach/corgi.h>
#include <mach/pxa2xx-regs.h>
#include <mach/sharpsl_pm.h>
#include "generic.h"
#include "sharpsl.h"
#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
@ -134,11 +133,11 @@ unsigned long corgipm_read_devdata(int type)
case SHARPSL_STATUS_ACIN:
return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0);
case SHARPSL_STATUS_LOCK:
return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock);
return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
case SHARPSL_STATUS_CHRGFULL:
return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull);
return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull);
case SHARPSL_STATUS_FATAL:
return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal);
return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal);
case SHARPSL_ACIN_VOLT:
return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT);
case SHARPSL_BATT_TEMP:
@ -165,8 +164,6 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
.should_wakeup = corgi_should_wakeup,
#if defined(CONFIG_LCD_CORGI)
.backlight_limit = corgi_lcd_limit_intensity,
#elif defined(CONFIG_BACKLIGHT_CORGI)
.backlight_limit = corgibl_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
.charge_on_temp = SHARPSL_CHARGE_ON_TEMP,

14
arch/arm/mach-pxa/devices.c
View file

@ -4,6 +4,7 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <asm/pmu.h>
#include <mach/udc.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
@ -31,6 +32,19 @@ void __init pxa_register_device(struct platform_device *dev, void *data)
dev_err(&dev->dev, "unable to register device: %d\n", ret);
}
static struct resource pxa_resource_pmu = {
.start = IRQ_PMU,
.end = IRQ_PMU,
.flags = IORESOURCE_IRQ,
};
struct platform_device pxa_device_pmu = {
.name = "arm-pmu",
.id = ARM_PMU_DEVICE_CPU,
.resource = &pxa_resource_pmu,
.num_resources = 1,
};
static struct resource pxamci_resources[] = {
[0] = {
.start = 0x41100000,

1
arch/arm/mach-pxa/devices.h
View file

@ -1,3 +1,4 @@
extern struct platform_device pxa_device_pmu;
extern struct platform_device pxa_device_mci;
extern struct platform_device pxa3xx_device_mci2;
extern struct platform_device pxa3xx_device_mci3;

78
arch/arm/mach-pxa/e330.c
View file

@ -1,78 +0,0 @@
/*
* Hardware definitions for the Toshiba e330 PDAs
*
* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/mfd/tc6387xb.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/udc.h>
#include "generic.h"
#include "eseries.h"
#include "clock.h"
/* -------------------- e330 tc6387xb parameters -------------------- */
static struct tc6387xb_platform_data e330_tc6387xb_info = {
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
static struct platform_device e330_tc6387xb_device = {
.name = "tc6387xb",
.id = -1,
.dev = {
.platform_data = &e330_tc6387xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* --------------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&e330_tc6387xb_device,
};
static void __init e330_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
}
MACHINE_START(E330, "Toshiba e330")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e330_init,
.timer = &pxa_timer,
MACHINE_END

79
arch/arm/mach-pxa/e350.c
View file

@ -1,79 +0,0 @@
/*
* Hardware definitions for the Toshiba e350 PDAs
*
* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/mfd/t7l66xb.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/udc.h>
#include "generic.h"
#include "eseries.h"
#include "clock.h"
/* -------------------- e350 t7l66xb parameters -------------------- */
static struct t7l66xb_platform_data e350_t7l66xb_info = {
.irq_base = IRQ_BOARD_START,
.enable = &eseries_tmio_enable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
static struct platform_device e350_t7l66xb_device = {
.name = "t7l66xb",
.id = -1,
.dev = {
.platform_data = &e350_t7l66xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ---------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&e350_t7l66xb_device,
};
static void __init e350_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
}
MACHINE_START(E350, "Toshiba e350")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e350_init,
.timer = &pxa_timer,
MACHINE_END

155
arch/arm/mach-pxa/e400.c
View file

@ -1,155 +0,0 @@
/*
* Hardware definitions for the Toshiba eseries PDAs
*
* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/mfd/t7l66xb.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/pxafb.h>
#include <mach/udc.h>
#include <mach/irqs.h>
#include "generic.h"
#include "eseries.h"
#include "clock.h"
/* ------------------------ E400 LCD definitions ------------------------ */
static struct pxafb_mode_info e400_pxafb_mode_info = {
.pixclock = 140703,
.xres = 240,
.yres = 320,
.bpp = 16,
.hsync_len = 4,
.left_margin = 28,
.right_margin = 8,
.vsync_len = 3,
.upper_margin = 5,
.lower_margin = 6,
.sync = 0,
};
static struct pxafb_mach_info e400_pxafb_mach_info = {
.modes = &e400_pxafb_mode_info,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP,
.lccr3 = 0,
.pxafb_backlight_power = NULL,
};
/* ------------------------ E400 MFP config ----------------------------- */
static unsigned long e400_pin_config[] __initdata = {
/* Chip selects */
GPIO15_nCS_1, /* CS1 - Flash */
GPIO80_nCS_4, /* CS4 - TMIO */
/* Clocks */
GPIO12_32KHz,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
/* TMIO controller */
GPIO19_GPIO, /* t7l66xb #PCLR */
GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
/* wakeup */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
};
/* ---------------------------------------------------------------------- */
static struct mtd_partition partition_a = {
.name = "Internal NAND flash",
.offset = 0,
.size = MTDPART_SIZ_FULL,
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr e400_t7l66xb_nand_bbt = {
.options = 0,
.offs = 4,
.len = 2,
.pattern = scan_ff_pattern
};
static struct tmio_nand_data e400_t7l66xb_nand_config = {
.num_partitions = 1,
.partition = &partition_a,
.badblock_pattern = &e400_t7l66xb_nand_bbt,
};
static struct t7l66xb_platform_data e400_t7l66xb_info = {
.irq_base = IRQ_BOARD_START,
.enable = &eseries_tmio_enable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
.nand_data = &e400_t7l66xb_nand_config,
};
static struct platform_device e400_t7l66xb_device = {
.name = "t7l66xb",
.id = -1,
.dev = {
.platform_data = &e400_t7l66xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ---------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&e400_t7l66xb_device,
};
static void __init e400_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* Fixme - e400 may have a switched clock */
eseries_register_clks();
eseries_get_tmio_gpios();
set_pxa_fb_info(&e400_pxafb_mach_info);
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
}
MACHINE_START(E400, "Toshiba e400")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e400_init,
.timer = &pxa_timer,
MACHINE_END

225
arch/arm/mach-pxa/e740.c
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@ -1,225 +0,0 @@
/*
* Hardware definitions for the Toshiba eseries PDAs
*
* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/clk.h>
#include <linux/mfd/t7l66xb.h>
#include <video/w100fb.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/udc.h>
#include <mach/irda.h>
#include <mach/irqs.h>
#include <mach/audio.h>
#include "generic.h"
#include "eseries.h"
#include "clock.h"
#include "devices.h"
/* ------------------------ e740 video support --------------------------- */
static struct w100_gen_regs e740_lcd_regs = {
.lcd_format = 0x00008023,
.lcdd_cntl1 = 0x0f000000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x00ffff03,
.genlcd_cntl2 = 0x003c0f03,
.genlcd_cntl3 = 0x000143aa,
};
static struct w100_mode e740_lcd_mode = {
.xres = 240,
.yres = 320,
.left_margin = 20,
.right_margin = 28,
.upper_margin = 9,
.lower_margin = 8,
.crtc_ss = 0x80140013,
.crtc_ls = 0x81150110,
.crtc_gs = 0x80050005,
.crtc_vpos_gs = 0x000a0009,
.crtc_rev = 0x0040010a,
.crtc_dclk = 0xa906000a,
.crtc_gclk = 0x80050108,
.crtc_goe = 0x80050108,
.pll_freq = 57,
.pixclk_divider = 4,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_XTAL,
.sysclk_divider = 1,
.sysclk_src = CLK_SRC_PLL,
.crtc_ps1_active = 0x41060010,
};
static struct w100_gpio_regs e740_w100_gpio_info = {
.init_data1 = 0x21002103,
.gpio_dir1 = 0xffffdeff,
.gpio_oe1 = 0x03c00643,
.init_data2 = 0x003f003f,
.gpio_dir2 = 0xffffffff,
.gpio_oe2 = 0x000000ff,
};
static struct w100fb_mach_info e740_fb_info = {
.modelist = &e740_lcd_mode,
.num_modes = 1,
.regs = &e740_lcd_regs,
.gpio = &e740_w100_gpio_info,
.xtal_freq = 14318000,
.xtal_dbl = 1,
};
static struct resource e740_fb_resources[] = {
[0] = {
.start = 0x0c000000,
.end = 0x0cffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device e740_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &e740_fb_info,
},
.num_resources = ARRAY_SIZE(e740_fb_resources),
.resource = e740_fb_resources,
};
/* --------------------------- MFP Pin config -------------------------- */
static unsigned long e740_pin_config[] __initdata = {
/* Chip selects */
GPIO15_nCS_1, /* CS1 - Flash */
GPIO79_nCS_3, /* CS3 - IMAGEON */
GPIO80_nCS_4, /* CS4 - TMIO */
/* Clocks */
GPIO12_32KHz,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
/* TMIO controller */
GPIO19_GPIO, /* t7l66xb #PCLR */
GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
/* UDC */
GPIO13_GPIO,
GPIO3_GPIO,
/* IrDA */
GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* Audio power control */
GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */
GPIO40_GPIO, /* Mic amp power */
GPIO41_GPIO, /* Headphone amp power */
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
GPIO11_GPIO, /* IRQ0 */
GPIO6_GPIO, /* IRQ1 */
GPIO27_GPIO, /* RST0 */
GPIO24_GPIO, /* RST1 */
GPIO20_GPIO, /* PWR0 */
GPIO23_GPIO, /* PWR1 */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* wakeup */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
};
/* -------------------- e740 t7l66xb parameters -------------------- */
static struct t7l66xb_platform_data e740_t7l66xb_info = {
.irq_base = IRQ_BOARD_START,
.enable = &eseries_tmio_enable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
static struct platform_device e740_t7l66xb_device = {
.name = "t7l66xb",
.id = -1,
.dev = {
.platform_data = &e740_t7l66xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ----------------------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&e740_fb_device,
&e740_t7l66xb_device,
};
static void __init e740_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
"UDCCLK", &pxa25x_device_udc.dev),
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&e7xx_ficp_platform_data);
}
MACHINE_START(E740, "Toshiba e740")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e740_init,
.timer = &pxa_timer,
MACHINE_END

226
arch/arm/mach-pxa/e750.c
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@ -1,226 +0,0 @@
/*
* Hardware definitions for the Toshiba eseries PDAs
*
* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/mfd/tc6393xb.h>
#include <video/w100fb.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/udc.h>
#include <mach/irda.h>
#include <mach/irqs.h>
#include <mach/audio.h>
#include "generic.h"
#include "eseries.h"
#include "clock.h"
/* ---------------------- E750 LCD definitions -------------------- */
static struct w100_gen_regs e750_lcd_regs = {
.lcd_format = 0x00008003,
.lcdd_cntl1 = 0x00000000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x00fff003,
.genlcd_cntl2 = 0x003c0f03,
.genlcd_cntl3 = 0x000143aa,
};
static struct w100_mode e750_lcd_mode = {
.xres = 240,
.yres = 320,
.left_margin = 21,
.right_margin = 22,
.upper_margin = 5,
.lower_margin = 4,
.crtc_ss = 0x80150014,
.crtc_ls = 0x8014000d,
.crtc_gs = 0xc1000005,
.crtc_vpos_gs = 0x00020147,
.crtc_rev = 0x0040010a,
.crtc_dclk = 0xa1700030,
.crtc_gclk = 0x80cc0015,
.crtc_goe = 0x80cc0015,
.crtc_ps1_active = 0x61060017,
.pll_freq = 57,
.pixclk_divider = 4,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_XTAL,
.sysclk_divider = 1,
.sysclk_src = CLK_SRC_PLL,
};
static struct w100_gpio_regs e750_w100_gpio_info = {
.init_data1 = 0x01192f1b,
.gpio_dir1 = 0xd5ffdeff,
.gpio_oe1 = 0x000020bf,
.init_data2 = 0x010f010f,
.gpio_dir2 = 0xffffffff,
.gpio_oe2 = 0x000001cf,
};
static struct w100fb_mach_info e750_fb_info = {
.modelist = &e750_lcd_mode,
.num_modes = 1,
.regs = &e750_lcd_regs,
.gpio = &e750_w100_gpio_info,
.xtal_freq = 14318000,
.xtal_dbl = 1,
};
static struct resource e750_fb_resources[] = {
[0] = {
.start = 0x0c000000,
.end = 0x0cffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device e750_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &e750_fb_info,
},
.num_resources = ARRAY_SIZE(e750_fb_resources),
.resource = e750_fb_resources,
};
/* -------------------- e750 MFP parameters -------------------- */
static unsigned long e750_pin_config[] __initdata = {
/* Chip selects */
GPIO15_nCS_1, /* CS1 - Flash */
GPIO79_nCS_3, /* CS3 - IMAGEON */
GPIO80_nCS_4, /* CS4 - TMIO */
/* Clocks */
GPIO11_3_6MHz,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
/* TMIO controller */
GPIO19_GPIO, /* t7l66xb #PCLR */
GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
/* UDC */
GPIO13_GPIO,
GPIO3_GPIO,
/* IrDA */
GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* Audio power control */
GPIO4_GPIO, /* Headphone amp power */
GPIO7_GPIO, /* Speaker amp power */
GPIO37_GPIO, /* Headphone detect */
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
GPIO11_GPIO, /* IRQ0 */
GPIO6_GPIO, /* IRQ1 */
GPIO27_GPIO, /* RST0 */
GPIO24_GPIO, /* RST1 */
GPIO20_GPIO, /* PWR0 */
GPIO23_GPIO, /* PWR1 */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* wakeup */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
};
/* ----------------- e750 tc6393xb parameters ------------------ */
static struct tc6393xb_platform_data e750_tc6393xb_info = {
.irq_base = IRQ_BOARD_START,
.scr_pll2cr = 0x0cc1,
.scr_gper = 0,
.gpio_base = -1,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
};
static struct platform_device e750_tc6393xb_device = {
.name = "tc6393xb",
.id = -1,
.dev = {
.platform_data = &e750_tc6393xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ------------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&e750_fb_device,
&e750_tc6393xb_device,
};
static void __init e750_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&e7xx_ficp_platform_data);
}
MACHINE_START(E750, "Toshiba e750")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e750_init,
.timer = &pxa_timer,
MACHINE_END

229
arch/arm/mach-pxa/e800.c
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@ -1,229 +0,0 @@
/*
* Hardware definitions for the Toshiba eseries PDAs
*
* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/mfd/tc6393xb.h>
#include <video/w100fb.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/udc.h>
#include <mach/irqs.h>
#include <mach/audio.h>
#include "generic.h"
#include "eseries.h"
#include "clock.h"
/* ------------------------ e800 LCD definitions ------------------------- */
static unsigned long e800_pin_config[] __initdata = {
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
};
static struct w100_gen_regs e800_lcd_regs = {
.lcd_format = 0x00008003,
.lcdd_cntl1 = 0x02a00000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x000ff2a3,
.genlcd_cntl2 = 0x000002a3,
.genlcd_cntl3 = 0x000102aa,
};
static struct w100_mode e800_lcd_mode[2] = {
[0] = {
.xres = 480,
.yres = 640,
.left_margin = 52,
.right_margin = 148,
.upper_margin = 2,
.lower_margin = 6,
.crtc_ss = 0x80350034,
.crtc_ls = 0x802b0026,
.crtc_gs = 0x80160016,
.crtc_vpos_gs = 0x00020003,
.crtc_rev = 0x0040001d,
.crtc_dclk = 0xe0000000,
.crtc_gclk = 0x82a50049,
.crtc_goe = 0x80ee001c,
.crtc_ps1_active = 0x00000000,
.pll_freq = 128,
.pixclk_divider = 4,
.pixclk_divider_rotated = 6,
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
},
[1] = {
.xres = 240,
.yres = 320,
.left_margin = 15,
.right_margin = 88,
.upper_margin = 0,
.lower_margin = 7,
.crtc_ss = 0xd010000f,
.crtc_ls = 0x80070003,
.crtc_gs = 0x80000000,
.crtc_vpos_gs = 0x01460147,
.crtc_rev = 0x00400003,
.crtc_dclk = 0xa1700030,
.crtc_gclk = 0x814b0008,
.crtc_goe = 0x80cc0015,
.crtc_ps1_active = 0x00000000,
.pll_freq = 100,
.pixclk_divider = 6, /* Wince uses 14 which gives a */
.pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
}
};
static struct w100_gpio_regs e800_w100_gpio_info = {
.init_data1 = 0xc13fc019,
.gpio_dir1 = 0x3e40df7f,
.gpio_oe1 = 0x003c3000,
.init_data2 = 0x00000000,
.gpio_dir2 = 0x00000000,
.gpio_oe2 = 0x00000000,
};
static struct w100_mem_info e800_w100_mem_info = {
.ext_cntl = 0x09640011,
.sdram_mode_reg = 0x00600021,
.ext_timing_cntl = 0x10001545,
.io_cntl = 0x7ddd7333,
.size = 0x1fffff,
};
static void e800_tg_change(struct w100fb_par *par)
{
unsigned long tmp;
tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
if (par->mode->xres == 480)
tmp |= 0x100;
else
tmp &= ~0x100;
w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
}
static struct w100_tg_info e800_tg_info = {
.change = e800_tg_change,
};
static struct w100fb_mach_info e800_fb_info = {
.modelist = e800_lcd_mode,
.num_modes = 2,
.regs = &e800_lcd_regs,
.gpio = &e800_w100_gpio_info,
.mem = &e800_w100_mem_info,
.tg = &e800_tg_info,
.xtal_freq = 16000000,
};
static struct resource e800_fb_resources[] = {
[0] = {
.start = 0x0c000000,
.end = 0x0cffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device e800_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &e800_fb_info,
},
.num_resources = ARRAY_SIZE(e800_fb_resources),
.resource = e800_fb_resources,
};
/* --------------------------- UDC definitions --------------------------- */
static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
.gpio_vbus = GPIO_E800_USB_DISC,
.gpio_pullup = GPIO_E800_USB_PULLUP,
.gpio_pullup_inverted = 1
};
/* ----------------- e800 tc6393xb parameters ------------------ */
static struct tc6393xb_platform_data e800_tc6393xb_info = {
.irq_base = IRQ_BOARD_START,
.scr_pll2cr = 0x0cc1,
.scr_gper = 0,
.gpio_base = -1,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
};
static struct platform_device e800_tc6393xb_device = {
.name = "tc6393xb",
.id = -1,
.dev = {
.platform_data = &e800_tc6393xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ----------------------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&e800_fb_device,
&e800_tc6393xb_device,
};
static void __init e800_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e800_udc_mach_info);
pxa_set_ac97_info(NULL);
}
MACHINE_START(E800, "Toshiba e800")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e800_init,
.timer = &pxa_timer,
MACHINE_END

809
arch/arm/mach-pxa/eseries.c
View file

@ -15,6 +15,13 @@
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/mfd/tc6387xb.h>
#include <linux/mfd/tc6393xb.h>
#include <linux/mfd/t7l66xb.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <video/w100fb.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
@ -22,9 +29,12 @@
#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
#include <mach/udc.h>
#include <mach/irda.h>
#include "devices.h"
#include "generic.h"
#include "clock.h"
@ -130,3 +140,802 @@ void eseries_register_clks(void)
clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
}
#ifdef CONFIG_MACH_E330
/* -------------------- e330 tc6387xb parameters -------------------- */
static struct tc6387xb_platform_data e330_tc6387xb_info = {
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
static struct platform_device e330_tc6387xb_device = {
.name = "tc6387xb",
.id = -1,
.dev = {
.platform_data = &e330_tc6387xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* --------------------------------------------------------------- */
static struct platform_device *e330_devices[] __initdata = {
&e330_tc6387xb_device,
};
static void __init e330_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
eseries_get_tmio_gpios();
platform_add_devices(ARRAY_AND_SIZE(e330_devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
}
MACHINE_START(E330, "Toshiba e330")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e330_init,
.timer = &pxa_timer,
MACHINE_END
#endif
#ifdef CONFIG_MACH_E350
/* -------------------- e350 t7l66xb parameters -------------------- */
static struct t7l66xb_platform_data e350_t7l66xb_info = {
.irq_base = IRQ_BOARD_START,
.enable = &eseries_tmio_enable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
static struct platform_device e350_t7l66xb_device = {
.name = "t7l66xb",
.id = -1,
.dev = {
.platform_data = &e350_t7l66xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ---------------------------------------------------------- */
static struct platform_device *e350_devices[] __initdata = {
&e350_t7l66xb_device,
};
static void __init e350_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
eseries_get_tmio_gpios();
platform_add_devices(ARRAY_AND_SIZE(e350_devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
}
MACHINE_START(E350, "Toshiba e350")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e350_init,
.timer = &pxa_timer,
MACHINE_END
#endif
#ifdef CONFIG_MACH_E400
/* ------------------------ E400 LCD definitions ------------------------ */
static struct pxafb_mode_info e400_pxafb_mode_info = {
.pixclock = 140703,
.xres = 240,
.yres = 320,
.bpp = 16,
.hsync_len = 4,
.left_margin = 28,
.right_margin = 8,
.vsync_len = 3,
.upper_margin = 5,
.lower_margin = 6,
.sync = 0,
};
static struct pxafb_mach_info e400_pxafb_mach_info = {
.modes = &e400_pxafb_mode_info,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP,
.lccr3 = 0,
.pxafb_backlight_power = NULL,
};
/* ------------------------ E400 MFP config ----------------------------- */
static unsigned long e400_pin_config[] __initdata = {
/* Chip selects */
GPIO15_nCS_1, /* CS1 - Flash */
GPIO80_nCS_4, /* CS4 - TMIO */
/* Clocks */
GPIO12_32KHz,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
/* TMIO controller */
GPIO19_GPIO, /* t7l66xb #PCLR */
GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
/* wakeup */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
};
/* ---------------------------------------------------------------------- */
static struct mtd_partition partition_a = {
.name = "Internal NAND flash",
.offset = 0,
.size = MTDPART_SIZ_FULL,
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr e400_t7l66xb_nand_bbt = {
.options = 0,
.offs = 4,
.len = 2,
.pattern = scan_ff_pattern
};
static struct tmio_nand_data e400_t7l66xb_nand_config = {
.num_partitions = 1,
.partition = &partition_a,
.badblock_pattern = &e400_t7l66xb_nand_bbt,
};
static struct t7l66xb_platform_data e400_t7l66xb_info = {
.irq_base = IRQ_BOARD_START,
.enable = &eseries_tmio_enable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
.nand_data = &e400_t7l66xb_nand_config,
};
static struct platform_device e400_t7l66xb_device = {
.name = "t7l66xb",
.id = -1,
.dev = {
.platform_data = &e400_t7l66xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ---------------------------------------------------------- */
static struct platform_device *e400_devices[] __initdata = {
&e400_t7l66xb_device,
};
static void __init e400_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/* Fixme - e400 may have a switched clock */
eseries_register_clks();
eseries_get_tmio_gpios();
set_pxa_fb_info(&e400_pxafb_mach_info);
platform_add_devices(ARRAY_AND_SIZE(e400_devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
}
MACHINE_START(E400, "Toshiba e400")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e400_init,
.timer = &pxa_timer,
MACHINE_END
#endif
#ifdef CONFIG_MACH_E740
/* ------------------------ e740 video support --------------------------- */
static struct w100_gen_regs e740_lcd_regs = {
.lcd_format = 0x00008023,
.lcdd_cntl1 = 0x0f000000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x00ffff03,
.genlcd_cntl2 = 0x003c0f03,
.genlcd_cntl3 = 0x000143aa,
};
static struct w100_mode e740_lcd_mode = {
.xres = 240,
.yres = 320,
.left_margin = 20,
.right_margin = 28,
.upper_margin = 9,
.lower_margin = 8,
.crtc_ss = 0x80140013,
.crtc_ls = 0x81150110,
.crtc_gs = 0x80050005,
.crtc_vpos_gs = 0x000a0009,
.crtc_rev = 0x0040010a,
.crtc_dclk = 0xa906000a,
.crtc_gclk = 0x80050108,
.crtc_goe = 0x80050108,
.pll_freq = 57,
.pixclk_divider = 4,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_XTAL,
.sysclk_divider = 1,
.sysclk_src = CLK_SRC_PLL,
.crtc_ps1_active = 0x41060010,
};
static struct w100_gpio_regs e740_w100_gpio_info = {
.init_data1 = 0x21002103,
.gpio_dir1 = 0xffffdeff,
.gpio_oe1 = 0x03c00643,
.init_data2 = 0x003f003f,
.gpio_dir2 = 0xffffffff,
.gpio_oe2 = 0x000000ff,
};
static struct w100fb_mach_info e740_fb_info = {
.modelist = &e740_lcd_mode,
.num_modes = 1,
.regs = &e740_lcd_regs,
.gpio = &e740_w100_gpio_info,
.xtal_freq = 14318000,
.xtal_dbl = 1,
};
static struct resource e740_fb_resources[] = {
[0] = {
.start = 0x0c000000,
.end = 0x0cffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device e740_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &e740_fb_info,
},
.num_resources = ARRAY_SIZE(e740_fb_resources),
.resource = e740_fb_resources,
};
/* --------------------------- MFP Pin config -------------------------- */
static unsigned long e740_pin_config[] __initdata = {
/* Chip selects */
GPIO15_nCS_1, /* CS1 - Flash */
GPIO79_nCS_3, /* CS3 - IMAGEON */
GPIO80_nCS_4, /* CS4 - TMIO */
/* Clocks */
GPIO12_32KHz,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
/* TMIO controller */
GPIO19_GPIO, /* t7l66xb #PCLR */
GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
/* UDC */
GPIO13_GPIO,
GPIO3_GPIO,
/* IrDA */
GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* Audio power control */
GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */
GPIO40_GPIO, /* Mic amp power */
GPIO41_GPIO, /* Headphone amp power */
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
GPIO11_GPIO, /* IRQ0 */
GPIO6_GPIO, /* IRQ1 */
GPIO27_GPIO, /* RST0 */
GPIO24_GPIO, /* RST1 */
GPIO20_GPIO, /* PWR0 */
GPIO23_GPIO, /* PWR1 */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* wakeup */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
};
/* -------------------- e740 t7l66xb parameters -------------------- */
static struct t7l66xb_platform_data e740_t7l66xb_info = {
.irq_base = IRQ_BOARD_START,
.enable = &eseries_tmio_enable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
static struct platform_device e740_t7l66xb_device = {
.name = "t7l66xb",
.id = -1,
.dev = {
.platform_data = &e740_t7l66xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ----------------------------------------------------------------------- */
static struct platform_device *e740_devices[] __initdata = {
&e740_fb_device,
&e740_t7l66xb_device,
};
static void __init e740_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
eseries_register_clks();
clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
"UDCCLK", &pxa25x_device_udc.dev),
eseries_get_tmio_gpios();
platform_add_devices(ARRAY_AND_SIZE(e740_devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&e7xx_ficp_platform_data);
}
MACHINE_START(E740, "Toshiba e740")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e740_init,
.timer = &pxa_timer,
MACHINE_END
#endif
#ifdef CONFIG_MACH_E750
/* ---------------------- E750 LCD definitions -------------------- */
static struct w100_gen_regs e750_lcd_regs = {
.lcd_format = 0x00008003,
.lcdd_cntl1 = 0x00000000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x00fff003,
.genlcd_cntl2 = 0x003c0f03,
.genlcd_cntl3 = 0x000143aa,
};
static struct w100_mode e750_lcd_mode = {
.xres = 240,
.yres = 320,
.left_margin = 21,
.right_margin = 22,
.upper_margin = 5,
.lower_margin = 4,
.crtc_ss = 0x80150014,
.crtc_ls = 0x8014000d,
.crtc_gs = 0xc1000005,
.crtc_vpos_gs = 0x00020147,
.crtc_rev = 0x0040010a,
.crtc_dclk = 0xa1700030,
.crtc_gclk = 0x80cc0015,
.crtc_goe = 0x80cc0015,
.crtc_ps1_active = 0x61060017,
.pll_freq = 57,
.pixclk_divider = 4,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_XTAL,
.sysclk_divider = 1,
.sysclk_src = CLK_SRC_PLL,
};
static struct w100_gpio_regs e750_w100_gpio_info = {
.init_data1 = 0x01192f1b,
.gpio_dir1 = 0xd5ffdeff,
.gpio_oe1 = 0x000020bf,
.init_data2 = 0x010f010f,
.gpio_dir2 = 0xffffffff,
.gpio_oe2 = 0x000001cf,
};
static struct w100fb_mach_info e750_fb_info = {
.modelist = &e750_lcd_mode,
.num_modes = 1,
.regs = &e750_lcd_regs,
.gpio = &e750_w100_gpio_info,
.xtal_freq = 14318000,
.xtal_dbl = 1,
};
static struct resource e750_fb_resources[] = {
[0] = {
.start = 0x0c000000,
.end = 0x0cffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device e750_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &e750_fb_info,
},
.num_resources = ARRAY_SIZE(e750_fb_resources),
.resource = e750_fb_resources,
};
/* -------------------- e750 MFP parameters -------------------- */
static unsigned long e750_pin_config[] __initdata = {
/* Chip selects */
GPIO15_nCS_1, /* CS1 - Flash */
GPIO79_nCS_3, /* CS3 - IMAGEON */
GPIO80_nCS_4, /* CS4 - TMIO */
/* Clocks */
GPIO11_3_6MHz,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
/* TMIO controller */
GPIO19_GPIO, /* t7l66xb #PCLR */
GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
/* UDC */
GPIO13_GPIO,
GPIO3_GPIO,
/* IrDA */
GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* Audio power control */
GPIO4_GPIO, /* Headphone amp power */
GPIO7_GPIO, /* Speaker amp power */
GPIO37_GPIO, /* Headphone detect */
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
GPIO11_GPIO, /* IRQ0 */
GPIO6_GPIO, /* IRQ1 */
GPIO27_GPIO, /* RST0 */
GPIO24_GPIO, /* RST1 */
GPIO20_GPIO, /* PWR0 */
GPIO23_GPIO, /* PWR1 */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* wakeup */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
};
/* ----------------- e750 tc6393xb parameters ------------------ */
static struct tc6393xb_platform_data e750_tc6393xb_info = {
.irq_base = IRQ_BOARD_START,
.scr_pll2cr = 0x0cc1,
.scr_gper = 0,
.gpio_base = -1,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
};
static struct platform_device e750_tc6393xb_device = {
.name = "tc6393xb",
.id = -1,
.dev = {
.platform_data = &e750_tc6393xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ------------------------------------------------------------- */
static struct platform_device *e750_devices[] __initdata = {
&e750_fb_device,
&e750_tc6393xb_device,
};
static void __init e750_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();
platform_add_devices(ARRAY_AND_SIZE(e750_devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&e7xx_ficp_platform_data);
}
MACHINE_START(E750, "Toshiba e750")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e750_init,
.timer = &pxa_timer,
MACHINE_END
#endif
#ifdef CONFIG_MACH_E800
/* ------------------------ e800 LCD definitions ------------------------- */
static unsigned long e800_pin_config[] __initdata = {
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
};
static struct w100_gen_regs e800_lcd_regs = {
.lcd_format = 0x00008003,
.lcdd_cntl1 = 0x02a00000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x000ff2a3,
.genlcd_cntl2 = 0x000002a3,
.genlcd_cntl3 = 0x000102aa,
};
static struct w100_mode e800_lcd_mode[2] = {
[0] = {
.xres = 480,
.yres = 640,
.left_margin = 52,
.right_margin = 148,
.upper_margin = 2,
.lower_margin = 6,
.crtc_ss = 0x80350034,
.crtc_ls = 0x802b0026,
.crtc_gs = 0x80160016,
.crtc_vpos_gs = 0x00020003,
.crtc_rev = 0x0040001d,
.crtc_dclk = 0xe0000000,
.crtc_gclk = 0x82a50049,
.crtc_goe = 0x80ee001c,
.crtc_ps1_active = 0x00000000,
.pll_freq = 128,
.pixclk_divider = 4,
.pixclk_divider_rotated = 6,
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
},
[1] = {
.xres = 240,
.yres = 320,
.left_margin = 15,
.right_margin = 88,
.upper_margin = 0,
.lower_margin = 7,
.crtc_ss = 0xd010000f,
.crtc_ls = 0x80070003,
.crtc_gs = 0x80000000,
.crtc_vpos_gs = 0x01460147,
.crtc_rev = 0x00400003,
.crtc_dclk = 0xa1700030,
.crtc_gclk = 0x814b0008,
.crtc_goe = 0x80cc0015,
.crtc_ps1_active = 0x00000000,
.pll_freq = 100,
.pixclk_divider = 6, /* Wince uses 14 which gives a */
.pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
}
};
static struct w100_gpio_regs e800_w100_gpio_info = {
.init_data1 = 0xc13fc019,
.gpio_dir1 = 0x3e40df7f,
.gpio_oe1 = 0x003c3000,
.init_data2 = 0x00000000,
.gpio_dir2 = 0x00000000,
.gpio_oe2 = 0x00000000,
};
static struct w100_mem_info e800_w100_mem_info = {
.ext_cntl = 0x09640011,
.sdram_mode_reg = 0x00600021,
.ext_timing_cntl = 0x10001545,
.io_cntl = 0x7ddd7333,
.size = 0x1fffff,
};
static void e800_tg_change(struct w100fb_par *par)
{
unsigned long tmp;
tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
if (par->mode->xres == 480)
tmp |= 0x100;
else
tmp &= ~0x100;
w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
}
static struct w100_tg_info e800_tg_info = {
.change = e800_tg_change,
};
static struct w100fb_mach_info e800_fb_info = {
.modelist = e800_lcd_mode,
.num_modes = 2,
.regs = &e800_lcd_regs,
.gpio = &e800_w100_gpio_info,
.mem = &e800_w100_mem_info,
.tg = &e800_tg_info,
.xtal_freq = 16000000,
};
static struct resource e800_fb_resources[] = {
[0] = {
.start = 0x0c000000,
.end = 0x0cffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device e800_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &e800_fb_info,
},
.num_resources = ARRAY_SIZE(e800_fb_resources),
.resource = e800_fb_resources,
};
/* --------------------------- UDC definitions --------------------------- */
static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
.gpio_vbus = GPIO_E800_USB_DISC,
.gpio_pullup = GPIO_E800_USB_PULLUP,
.gpio_pullup_inverted = 1
};
/* ----------------- e800 tc6393xb parameters ------------------ */
static struct tc6393xb_platform_data e800_tc6393xb_info = {
.irq_base = IRQ_BOARD_START,
.scr_pll2cr = 0x0cc1,
.scr_gper = 0,
.gpio_base = -1,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
};
static struct platform_device e800_tc6393xb_device = {
.name = "tc6393xb",
.id = -1,
.dev = {
.platform_data = &e800_tc6393xb_info,
},
.num_resources = 2,
.resource = eseries_tmio_resources,
};
/* ----------------------------------------------------------------------- */
static struct platform_device *e800_devices[] __initdata = {
&e800_fb_device,
&e800_tc6393xb_device,
};
static void __init e800_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();
platform_add_devices(ARRAY_AND_SIZE(e800_devices));
pxa_set_udc_info(&e800_udc_mach_info);
pxa_set_ac97_info(NULL);
}
MACHINE_START(E800, "Toshiba e800")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
.init_machine = e800_init,
.timer = &pxa_timer,
MACHINE_END
#endif

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