pwm: sti: Take the opportunity to conduct a little house keeping
This includes fixing some Coding Style issues and re-ordering and/or simplifying a little code. Signed-off-by: Lee Jones <lee.jones@linaro.org> [thierry.reding@gmail.com: applied some bikeshedding> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>hifive-unleashed-5.1
Lee Jones
Thierry Reding
parent
85a834c42a
commit
7d8a600c91
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@ -1,8 +1,10 @@
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/*
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* PWM device driver for ST SoCs.
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* Author: Ajit Pal Singh <ajitpal.singh@st.com>
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* PWM device driver for ST SoCs
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*
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* Copyright (C) 2013-2014 STMicroelectronics (R&D) Limited
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* Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
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*
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* Author: Ajit Pal Singh <ajitpal.singh@st.com>
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* Lee Jones <lee.jones@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -31,14 +33,14 @@
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#define STI_PWM_CTRL 0x50 /* Control/Config register */
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#define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
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#define STI_INT_STA 0x58 /* Interrupt Status register */
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#define PWM_INT_ACK 0x5c
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#define PWM_PRESCALE_LOW_MASK 0x0f
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#define PWM_PRESCALE_HIGH_MASK 0xf0
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#define PWM_CPT_EDGE_MASK 0x03
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#define PWM_INT_ACK_MASK 0x1ff
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#define PWM_INT_ACK 0x5c
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#define PWM_PRESCALE_LOW_MASK 0x0f
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#define PWM_PRESCALE_HIGH_MASK 0xf0
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#define PWM_CPT_EDGE_MASK 0x03
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#define PWM_INT_ACK_MASK 0x1ff
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#define STI_MAX_CPT_DEVS 4
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#define CPT_DC_MAX 0xff
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#define STI_MAX_CPT_DEVS 4
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#define CPT_DC_MAX 0xff
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/* Regfield IDs */
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enum {
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@ -57,8 +59,9 @@ enum {
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MAX_REGFIELDS
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};
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/* Each capture input can be programmed to detect rising-edge, falling-edge,
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* either edge or neither egde
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/*
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* Each capture input can be programmed to detect rising-edge, falling-edge,
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* either edge or neither egde.
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*/
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enum sti_cpt_edge {
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CPT_EDGE_DISABLED,
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@ -103,13 +106,13 @@ struct sti_pwm_chip {
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};
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static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
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[PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
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[PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
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[CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
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[PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
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[PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
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[PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
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[PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
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[PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
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[PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
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[CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
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[PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
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[PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
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[PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
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[PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
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};
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static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
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@ -125,7 +128,7 @@ static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
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{
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struct sti_pwm_compat_data *cdata = pc->cdata;
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unsigned long clk_rate;
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unsigned long val;
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unsigned long value;
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unsigned int ps;
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clk_rate = clk_get_rate(pc->pwm_clk);
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@ -135,56 +138,56 @@ static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
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}
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/*
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* prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_count + 1)) - 1
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* prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
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*/
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val = NSEC_PER_SEC / clk_rate;
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val *= cdata->max_pwm_cnt + 1;
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value = NSEC_PER_SEC / clk_rate;
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value *= cdata->max_pwm_cnt + 1;
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if (period % val) {
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if (period % value)
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return -EINVAL;
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} else {
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ps = period / val - 1;
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if (ps > cdata->max_prescale)
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return -EINVAL;
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}
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ps = period / value - 1;
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if (ps > cdata->max_prescale)
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return -EINVAL;
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*prescale = ps;
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return 0;
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}
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/*
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* For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles.
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* The only way to change the period (apart from changing the PWM input clock)
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* is to change the PWM clock prescaler.
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* The prescaler is of 8 bits, so 256 prescaler values and hence
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* 256 possible period values are supported (for a particular clock rate).
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* The requested period will be applied only if it matches one of these
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* 256 values.
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* For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
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* only way to change the period (apart from changing the PWM input clock) is
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* to change the PWM clock prescaler.
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*
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* The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
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* period values are supported (for a particular clock rate). The requested
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* period will be applied only if it matches one of these 256 values.
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*/
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static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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int duty_ns, int period_ns)
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{
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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struct sti_pwm_compat_data *cdata = pc->cdata;
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unsigned int ncfg, value, prescale = 0;
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struct pwm_device *cur = pc->cur;
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struct device *dev = pc->dev;
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unsigned int prescale = 0, pwmvalx;
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int ret;
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unsigned int ncfg;
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bool period_same = false;
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int ret;
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ncfg = hweight_long(pc->configured);
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if (ncfg)
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period_same = (period_ns == pwm_get_period(cur));
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/* Allow configuration changes if one of the
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* following conditions satisfy.
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/*
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* Allow configuration changes if one of the following conditions
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* satisfy.
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* 1. No devices have been configured.
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* 2. Only one device has been configured and the new request
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* is for the same device.
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* 3. Only one device has been configured and the new request is
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* for a new device and period of the new device is same as
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* the current configured period.
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* 2. Only one device has been configured and the new request is for
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* the same device.
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* 3. Only one device has been configured and the new request is for
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* a new device and period of the new device is same as the current
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* configured period.
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* 4. More than one devices are configured and period of the new
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* requestis the same as the current period.
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*/
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@ -206,15 +209,15 @@ static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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if (ret)
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goto clk_dis;
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ret =
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regmap_field_write(pc->prescale_low,
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prescale & PWM_PRESCALE_LOW_MASK);
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value = prescale & PWM_PRESCALE_LOW_MASK;
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ret = regmap_field_write(pc->prescale_low, value);
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if (ret)
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goto clk_dis;
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ret =
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regmap_field_write(pc->prescale_high,
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(prescale & PWM_PRESCALE_HIGH_MASK) >> 4);
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value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4;
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ret = regmap_field_write(pc->prescale_high, value);
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if (ret)
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goto clk_dis;
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}
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@ -225,10 +228,9 @@ static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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* PWM pulse = (max_pwm_count + 1) local cycles,
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* that is continuous pulse: signal never goes low.
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*/
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pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns;
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value = cdata->max_pwm_cnt * duty_ns / period_ns;
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ret = regmap_write(pc->regmap,
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PWM_OUT_VAL(pwm->hwpwm), pwmvalx);
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ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value);
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if (ret)
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goto clk_dis;
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@ -237,8 +239,8 @@ static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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set_bit(pwm->hwpwm, &pc->configured);
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pc->cur = pwm;
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dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n",
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prescale, period_ns, duty_ns, pwmvalx);
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dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n",
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prescale, period_ns, duty_ns, value);
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} else {
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return -EINVAL;
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}
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@ -256,10 +258,11 @@ static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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int ret = 0;
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/*
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* Since we have a common enable for all PWM devices,
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* do not enable if already enabled.
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* Since we have a common enable for all PWM devices, do not enable if
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* already enabled.
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*/
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mutex_lock(&pc->sti_pwm_lock);
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if (!pc->en_count) {
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ret = clk_enable(pc->pwm_clk);
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if (ret)
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@ -271,12 +274,14 @@ static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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ret = regmap_field_write(pc->pwm_out_en, 1);
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if (ret) {
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dev_err(dev, "failed to enable PWM device:%d\n",
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pwm->hwpwm);
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dev_err(dev, "failed to enable PWM device %u: %d\n",
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pwm->hwpwm, ret);
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goto out;
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}
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}
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pc->en_count++;
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out:
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mutex_unlock(&pc->sti_pwm_lock);
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return ret;
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@ -287,14 +292,17 @@ static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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mutex_lock(&pc->sti_pwm_lock);
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if (--pc->en_count) {
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mutex_unlock(&pc->sti_pwm_lock);
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return;
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}
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regmap_field_write(pc->pwm_out_en, 0);
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clk_disable(pc->pwm_clk);
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clk_disable(pc->cpt_clk);
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mutex_unlock(&pc->sti_pwm_lock);
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}
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@ -422,14 +430,13 @@ static irqreturn_t sti_pwm_interrupt(int irq, void *data)
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* __| |_________________| |________
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* ^0 ^1 ^2
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*
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* Capture start by the first available rising edge
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* When a capture event occurs, capture value (CPT_VALx)
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* is stored, index incremented, capture edge changed.
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*
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* After the capture, if the index > 1, we have collected
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* the necessary data so we signal the thread waiting for it
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* and disable the capture by setting capture edge to none
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* Capture start by the first available rising edge. When a
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* capture event occurs, capture value (CPT_VALx) is stored,
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* index incremented, capture edge changed.
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*
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* After the capture, if the index > 1, we have collected the
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* necessary data so we signal the thread waiting for it and
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* disable the capture by setting capture edge to none
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*/
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regmap_read(pc->regmap,
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@ -445,12 +452,14 @@ static irqreturn_t sti_pwm_interrupt(int irq, void *data)
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ddata->index++;
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break;
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case 2:
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regmap_write(pc->regmap,
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PWM_CPT_EDGE(devicenum),
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CPT_EDGE_DISABLED);
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wake_up(&ddata->wait);
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break;
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default:
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dev_err(dev, "Internal error\n");
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}
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@ -512,7 +521,7 @@ static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
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return PTR_ERR(pc->pwm_cpt_en);
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pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
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reg_fields[PWM_CPT_INT_EN]);
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reg_fields[PWM_CPT_INT_EN]);
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if (IS_ERR(pc->pwm_cpt_int_en))
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return PTR_ERR(pc->pwm_cpt_int_en);
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@ -575,9 +584,9 @@ static int sti_pwm_probe(struct platform_device *pdev)
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* Setup PWM data with default values: some values could be replaced
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* with specific ones provided from Device Tree.
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*/
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cdata->reg_fields = &sti_pwm_regfields[0];
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cdata->reg_fields = sti_pwm_regfields;
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cdata->max_prescale = 0xff;
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cdata->max_pwm_cnt = 255;
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cdata->max_pwm_cnt = 255;
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cdata->pwm_num_devs = 0;
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cdata->cpt_num_devs = 0;
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