Merge remote-tracking branch 'regmap/topic/drivers' into regmap-next
Resolved simple add/add conflicts: drivers/base/regmap/internal.h drivers/base/regmap/regmap.c
This commit is contained in:
commit
7d9aca39dc
|
@ -50,7 +50,9 @@
|
|||
|
||||
<sect1><title>Delaying, scheduling, and timer routines</title>
|
||||
!Iinclude/linux/sched.h
|
||||
!Ekernel/sched.c
|
||||
!Ekernel/sched/core.c
|
||||
!Ikernel/sched/cpupri.c
|
||||
!Ikernel/sched/fair.c
|
||||
!Iinclude/linux/completion.h
|
||||
!Ekernel/timer.c
|
||||
</sect1>
|
||||
|
@ -100,9 +102,12 @@ X!Iinclude/linux/kobject.h
|
|||
!Iinclude/linux/device.h
|
||||
</sect1>
|
||||
<sect1><title>Device Drivers Base</title>
|
||||
!Idrivers/base/init.c
|
||||
!Edrivers/base/driver.c
|
||||
!Edrivers/base/core.c
|
||||
!Edrivers/base/syscore.c
|
||||
!Edrivers/base/class.c
|
||||
!Idrivers/base/node.c
|
||||
!Edrivers/base/firmware_class.c
|
||||
!Edrivers/base/transport_class.c
|
||||
<!-- Cannot be included, because
|
||||
|
@ -111,13 +116,18 @@ X!Iinclude/linux/kobject.h
|
|||
exceed allowed 44 characters maximum
|
||||
X!Edrivers/base/attribute_container.c
|
||||
-->
|
||||
!Edrivers/base/sys.c
|
||||
!Edrivers/base/dd.c
|
||||
<!--
|
||||
X!Edrivers/base/interface.c
|
||||
-->
|
||||
!Iinclude/linux/platform_device.h
|
||||
!Edrivers/base/platform.c
|
||||
!Edrivers/base/bus.c
|
||||
</sect1>
|
||||
<sect1><title>Device Drivers DMA Management</title>
|
||||
!Edrivers/base/dma-buf.c
|
||||
!Edrivers/base/dma-coherent.c
|
||||
!Edrivers/base/dma-mapping.c
|
||||
</sect1>
|
||||
<sect1><title>Device Drivers Power Management</title>
|
||||
!Edrivers/base/power/main.c
|
||||
|
@ -216,9 +226,8 @@ X!Isound/sound_firmware.c
|
|||
|
||||
<chapter id="uart16x50">
|
||||
<title>16x50 UART Driver</title>
|
||||
!Iinclude/linux/serial_core.h
|
||||
!Edrivers/tty/serial/serial_core.c
|
||||
!Edrivers/tty/serial/8250.c
|
||||
!Edrivers/tty/serial/8250/8250.c
|
||||
</chapter>
|
||||
|
||||
<chapter id="fbdev">
|
||||
|
|
|
@ -317,7 +317,7 @@ CPU B: spin_unlock_irqrestore(&dev_lock, flags)
|
|||
<chapter id="pubfunctions">
|
||||
<title>Public Functions Provided</title>
|
||||
!Iarch/x86/include/asm/io.h
|
||||
!Elib/iomap.c
|
||||
!Elib/pci_iomap.c
|
||||
</chapter>
|
||||
|
||||
</book>
|
||||
|
|
|
@ -233,6 +233,10 @@ certainly invest a bit more effort into libata core layer).
|
|||
6. List of managed interfaces
|
||||
-----------------------------
|
||||
|
||||
MEM
|
||||
devm_kzalloc()
|
||||
devm_kfree()
|
||||
|
||||
IO region
|
||||
devm_request_region()
|
||||
devm_request_mem_region()
|
||||
|
|
|
@ -510,3 +510,17 @@ Why: The pci_scan_bus_parented() interface creates a new root bus. The
|
|||
convert to using pci_scan_root_bus() so they can supply a list of
|
||||
bus resources when the bus is created.
|
||||
Who: Bjorn Helgaas <bhelgaas@google.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: The CAP9 SoC family will be removed
|
||||
When: 3.4
|
||||
Files: arch/arm/mach-at91/at91cap9.c
|
||||
arch/arm/mach-at91/at91cap9_devices.c
|
||||
arch/arm/mach-at91/include/mach/at91cap9.h
|
||||
arch/arm/mach-at91/include/mach/at91cap9_matrix.h
|
||||
arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
|
||||
arch/arm/mach-at91/board-cap9adk.c
|
||||
Why: The code is not actively maintained and platforms are now hard to find.
|
||||
Who: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
|
|
|
@ -17,11 +17,11 @@ reports supported by a device are also provided by sysfs in
|
|||
class/input/event*/device/capabilities/, and the properties of a device are
|
||||
provided in class/input/event*/device/properties.
|
||||
|
||||
Types:
|
||||
==========
|
||||
Types are groupings of codes under a logical input construct. Each type has a
|
||||
set of applicable codes to be used in generating events. See the Codes section
|
||||
for details on valid codes for each type.
|
||||
Event types:
|
||||
===========
|
||||
Event types are groupings of codes under a logical input construct. Each
|
||||
type has a set of applicable codes to be used in generating events. See the
|
||||
Codes section for details on valid codes for each type.
|
||||
|
||||
* EV_SYN:
|
||||
- Used as markers to separate events. Events may be separated in time or in
|
||||
|
@ -63,9 +63,9 @@ for details on valid codes for each type.
|
|||
* EV_FF_STATUS:
|
||||
- Used to receive force feedback device status.
|
||||
|
||||
Codes:
|
||||
==========
|
||||
Codes define the precise type of event.
|
||||
Event codes:
|
||||
===========
|
||||
Event codes define the precise type of event.
|
||||
|
||||
EV_SYN:
|
||||
----------
|
||||
|
@ -220,6 +220,56 @@ EV_PWR:
|
|||
EV_PWR events are a special type of event used specifically for power
|
||||
mangement. Its usage is not well defined. To be addressed later.
|
||||
|
||||
Device properties:
|
||||
=================
|
||||
Normally, userspace sets up an input device based on the data it emits,
|
||||
i.e., the event types. In the case of two devices emitting the same event
|
||||
types, additional information can be provided in the form of device
|
||||
properties.
|
||||
|
||||
INPUT_PROP_DIRECT + INPUT_PROP_POINTER:
|
||||
--------------------------------------
|
||||
The INPUT_PROP_DIRECT property indicates that device coordinates should be
|
||||
directly mapped to screen coordinates (not taking into account trivial
|
||||
transformations, such as scaling, flipping and rotating). Non-direct input
|
||||
devices require non-trivial transformation, such as absolute to relative
|
||||
transformation for touchpads. Typical direct input devices: touchscreens,
|
||||
drawing tablets; non-direct devices: touchpads, mice.
|
||||
|
||||
The INPUT_PROP_POINTER property indicates that the device is not transposed
|
||||
on the screen and thus requires use of an on-screen pointer to trace user's
|
||||
movements. Typical pointer devices: touchpads, tablets, mice; non-pointer
|
||||
device: touchscreen.
|
||||
|
||||
If neither INPUT_PROP_DIRECT or INPUT_PROP_POINTER are set, the property is
|
||||
considered undefined and the device type should be deduced in the
|
||||
traditional way, using emitted event types.
|
||||
|
||||
INPUT_PROP_BUTTONPAD:
|
||||
--------------------
|
||||
For touchpads where the button is placed beneath the surface, such that
|
||||
pressing down on the pad causes a button click, this property should be
|
||||
set. Common in clickpad notebooks and macbooks from 2009 and onwards.
|
||||
|
||||
Originally, the buttonpad property was coded into the bcm5974 driver
|
||||
version field under the name integrated button. For backwards
|
||||
compatibility, both methods need to be checked in userspace.
|
||||
|
||||
INPUT_PROP_SEMI_MT:
|
||||
------------------
|
||||
Some touchpads, most common between 2008 and 2011, can detect the presence
|
||||
of multiple contacts without resolving the individual positions; only the
|
||||
number of contacts and a rectangular shape is known. For such
|
||||
touchpads, the semi-mt property should be set.
|
||||
|
||||
Depending on the device, the rectangle may enclose all touches, like a
|
||||
bounding box, or just some of them, for instance the two most recent
|
||||
touches. The diversity makes the rectangle of limited use, but some
|
||||
gestures can normally be extracted from it.
|
||||
|
||||
If INPUT_PROP_SEMI_MT is not set, the device is assumed to be a true MT
|
||||
device.
|
||||
|
||||
Guidelines:
|
||||
==========
|
||||
The guidelines below ensure proper single-touch and multi-finger functionality.
|
||||
|
@ -240,6 +290,8 @@ used to report when a touch is active on the screen.
|
|||
BTN_{MOUSE,LEFT,MIDDLE,RIGHT} must not be reported as the result of touch
|
||||
contact. BTN_TOOL_<name> events should be reported where possible.
|
||||
|
||||
For new hardware, INPUT_PROP_DIRECT should be set.
|
||||
|
||||
Trackpads:
|
||||
----------
|
||||
Legacy trackpads that only provide relative position information must report
|
||||
|
@ -250,6 +302,8 @@ location of the touch. BTN_TOUCH should be used to report when a touch is active
|
|||
on the trackpad. Where multi-finger support is available, BTN_TOOL_<name> should
|
||||
be used to report the number of touches active on the trackpad.
|
||||
|
||||
For new hardware, INPUT_PROP_POINTER should be set.
|
||||
|
||||
Tablets:
|
||||
----------
|
||||
BTN_TOOL_<name> events must be reported when a stylus or other tool is active on
|
||||
|
@ -260,3 +314,5 @@ button may be used for buttons on the tablet except BTN_{MOUSE,LEFT}.
|
|||
BTN_{0,1,2,etc} are good generic codes for unlabeled buttons. Do not use
|
||||
meaningful buttons, like BTN_FORWARD, unless the button is labeled for that
|
||||
purpose on the device.
|
||||
|
||||
For new hardware, both INPUT_PROP_DIRECT and INPUT_PROP_POINTER should be set.
|
||||
|
|
|
@ -857,42 +857,41 @@ case), we define a mapping like this:
|
|||
|
||||
...
|
||||
{
|
||||
.name "2bit"
|
||||
.name = "2bit"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_1_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "4bit"
|
||||
.name = "4bit"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_1_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "4bit"
|
||||
.name = "4bit"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_2_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "8bit"
|
||||
.name = "8bit"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_1_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "8bit"
|
||||
.name = "8bit"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_2_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "8bit"
|
||||
.name = "8bit"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_3_grp",
|
||||
|
@ -995,7 +994,7 @@ This is enabled by simply setting the .hog_on_boot field in the map to true,
|
|||
like this:
|
||||
|
||||
{
|
||||
.name "POWERMAP"
|
||||
.name = "POWERMAP"
|
||||
.ctrl_dev_name = "pinctrl-foo",
|
||||
.function = "power_func",
|
||||
.hog_on_boot = true,
|
||||
|
@ -1025,7 +1024,7 @@ it, disables and releases it, and muxes it in on the pins defined by group B:
|
|||
|
||||
foo_switch()
|
||||
{
|
||||
struct pinmux pmx;
|
||||
struct pinmux *pmx;
|
||||
|
||||
/* Enable on position A */
|
||||
pmx = pinmux_get(&device, "spi0-pos-A");
|
||||
|
|
|
@ -15,7 +15,7 @@ test at least a couple of times in a row for confidence. [This is necessary,
|
|||
because some problems only show up on a second attempt at suspending and
|
||||
resuming the system.] Moreover, hibernating in the "reboot" and "shutdown"
|
||||
modes causes the PM core to skip some platform-related callbacks which on ACPI
|
||||
systems might be necessary to make hibernation work. Thus, if you machine fails
|
||||
systems might be necessary to make hibernation work. Thus, if your machine fails
|
||||
to hibernate or resume in the "reboot" mode, you should try the "platform" mode:
|
||||
|
||||
# echo platform > /sys/power/disk
|
||||
|
|
|
@ -120,10 +120,10 @@ So in practice, the 'at all' may become a 'why freeze kernel threads?' and
|
|||
freezing user threads I don't find really objectionable."
|
||||
|
||||
Still, there are kernel threads that may want to be freezable. For example, if
|
||||
a kernel that belongs to a device driver accesses the device directly, it in
|
||||
principle needs to know when the device is suspended, so that it doesn't try to
|
||||
access it at that time. However, if the kernel thread is freezable, it will be
|
||||
frozen before the driver's .suspend() callback is executed and it will be
|
||||
a kernel thread that belongs to a device driver accesses the device directly, it
|
||||
in principle needs to know when the device is suspended, so that it doesn't try
|
||||
to access it at that time. However, if the kernel thread is freezable, it will
|
||||
be frozen before the driver's .suspend() callback is executed and it will be
|
||||
thawed after the driver's .resume() callback has run, so it won't be accessing
|
||||
the device while it's suspended.
|
||||
|
||||
|
|
|
@ -25,7 +25,8 @@ Procedure for submitting patches to the -stable tree:
|
|||
|
||||
- Send the patch, after verifying that it follows the above rules, to
|
||||
stable@vger.kernel.org. You must note the upstream commit ID in the
|
||||
changelog of your submission.
|
||||
changelog of your submission, as well as the kernel version you wish
|
||||
it to be applied to.
|
||||
- To have the patch automatically included in the stable tree, add the tag
|
||||
Cc: stable@vger.kernel.org
|
||||
in the sign-off area. Once the patch is merged it will be applied to
|
||||
|
|
|
@ -601,6 +601,8 @@ can be ORed together:
|
|||
instead of using the one provided by the hardware.
|
||||
512 - A kernel warning has occurred.
|
||||
1024 - A module from drivers/staging was loaded.
|
||||
2048 - The system is working around a severe firmware bug.
|
||||
4096 - An out-of-tree module has been loaded.
|
||||
|
||||
==============================================================
|
||||
|
||||
|
|
|
@ -284,7 +284,7 @@ method, the sys I/F structure will be built like this:
|
|||
The framework includes a simple notification mechanism, in the form of a
|
||||
netlink event. Netlink socket initialization is done during the _init_
|
||||
of the framework. Drivers which intend to use the notification mechanism
|
||||
just need to call generate_netlink_event() with two arguments viz
|
||||
just need to call thermal_generate_netlink_event() with two arguments viz
|
||||
(originator, event). Typically the originator will be an integer assigned
|
||||
to a thermal_zone_device when it registers itself with the framework. The
|
||||
event will be one of:{THERMAL_AUX0, THERMAL_AUX1, THERMAL_CRITICAL,
|
||||
|
|
|
@ -4,8 +4,6 @@ Virtualization support in the Linux kernel.
|
|||
- this file.
|
||||
kvm/
|
||||
- Kernel Virtual Machine. See also http://linux-kvm.org
|
||||
lguest/
|
||||
- Extremely simple hypervisor for experimental/educational use.
|
||||
uml/
|
||||
- User Mode Linux, builds/runs Linux kernel as a userspace program.
|
||||
virtio.txt
|
||||
|
|
83
MAINTAINERS
83
MAINTAINERS
|
@ -159,7 +159,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/realtek/r8169.c
|
||||
|
||||
8250/16?50 (AND CLONE UARTS) SERIAL DRIVER
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: linux-serial@vger.kernel.org
|
||||
W: http://serial.sourceforge.net
|
||||
S: Maintained
|
||||
|
@ -789,12 +789,6 @@ F: arch/arm/mach-mx*/
|
|||
F: arch/arm/mach-imx/
|
||||
F: arch/arm/plat-mxc/
|
||||
|
||||
ARM/FREESCALE IMX51
|
||||
M: Amit Kucheria <amit.kucheria@canonical.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-mx5/
|
||||
|
||||
ARM/FREESCALE IMX6
|
||||
M: Shawn Guo <shawn.guo@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
@ -1783,9 +1777,9 @@ X: net/wireless/wext*
|
|||
|
||||
CHAR and MISC DRIVERS
|
||||
M: Arnd Bergmann <arnd@arndb.de>
|
||||
M: Greg Kroah-Hartman <greg@kroah.com>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git
|
||||
S: Maintained
|
||||
S: Supported
|
||||
F: drivers/char/*
|
||||
F: drivers/misc/*
|
||||
|
||||
|
@ -2246,6 +2240,17 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/teigland/dlm.git
|
|||
S: Supported
|
||||
F: fs/dlm/
|
||||
|
||||
DMA BUFFER SHARING FRAMEWORK
|
||||
M: Sumit Semwal <sumit.semwal@linaro.org>
|
||||
S: Maintained
|
||||
L: linux-media@vger.kernel.org
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: linaro-mm-sig@lists.linaro.org
|
||||
F: drivers/base/dma-buf*
|
||||
F: include/linux/dma-buf*
|
||||
F: Documentation/dma-buf-sharing.txt
|
||||
T: git git://git.linaro.org/people/sumitsemwal/linux-dma-buf.git
|
||||
|
||||
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
|
||||
M: Vinod Koul <vinod.koul@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
|
@ -2276,7 +2281,7 @@ F: drivers/acpi/dock.c
|
|||
DOCUMENTATION
|
||||
M: Randy Dunlap <rdunlap@xenotime.net>
|
||||
L: linux-doc@vger.kernel.org
|
||||
T: quilt http://userweb.kernel.org/~rdunlap/kernel-doc-patches/current/
|
||||
T: quilt http://xenotime.net/kernel-doc-patches/current/
|
||||
S: Maintained
|
||||
F: Documentation/
|
||||
|
||||
|
@ -2309,7 +2314,7 @@ F: lib/lru_cache.c
|
|||
F: Documentation/blockdev/drbd/
|
||||
|
||||
DRIVER CORE, KOBJECTS, DEBUGFS AND SYSFS
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6.git
|
||||
S: Supported
|
||||
F: Documentation/kobject.txt
|
||||
|
@ -2339,6 +2344,9 @@ F: include/drm/i915*
|
|||
|
||||
DRM DRIVERS FOR EXYNOS
|
||||
M: Inki Dae <inki.dae@samsung.com>
|
||||
M: Joonyoung Shim <jy0922.shim@samsung.com>
|
||||
M: Seung-Woo Kim <sw0312.kim@samsung.com>
|
||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/exynos
|
||||
|
@ -2391,7 +2399,7 @@ F: net/bridge/netfilter/ebt*.c
|
|||
|
||||
ECRYPT FILE SYSTEM
|
||||
M: Tyler Hicks <tyhicks@canonical.com>
|
||||
M: Dustin Kirkland <kirkland@canonical.com>
|
||||
M: Dustin Kirkland <dustin.kirkland@gazzang.com>
|
||||
L: ecryptfs@vger.kernel.org
|
||||
W: https://launchpad.net/ecryptfs
|
||||
S: Supported
|
||||
|
@ -3310,6 +3318,12 @@ S: Maintained
|
|||
F: net/ieee802154/
|
||||
F: drivers/ieee802154/
|
||||
|
||||
IIO SUBSYSTEM AND DRIVERS
|
||||
M: Jonathan Cameron <jic23@cam.ac.uk>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/staging/iio/
|
||||
|
||||
IKANOS/ADI EAGLE ADSL USB DRIVER
|
||||
M: Matthieu Castet <castet.matthieu@free.fr>
|
||||
M: Stanislaw Gruszka <stf_xl@wp.pl>
|
||||
|
@ -3978,11 +3992,11 @@ M: Rusty Russell <rusty@rustcorp.com.au>
|
|||
L: lguest@lists.ozlabs.org
|
||||
W: http://lguest.ozlabs.org/
|
||||
S: Odd Fixes
|
||||
F: Documentation/virtual/lguest/
|
||||
F: arch/x86/include/asm/lguest*.h
|
||||
F: arch/x86/lguest/
|
||||
F: drivers/lguest/
|
||||
F: include/linux/lguest*.h
|
||||
F: arch/x86/include/asm/lguest*.h
|
||||
F: tools/lguest/
|
||||
|
||||
LINUX FOR IBM pSERIES (RS/6000)
|
||||
M: Paul Mackerras <paulus@au.ibm.com>
|
||||
|
@ -4122,10 +4136,11 @@ L: linux-ntfs-dev@lists.sourceforge.net
|
|||
W: http://www.linux-ntfs.org/content/view/19/37/
|
||||
S: Maintained
|
||||
F: Documentation/ldm.txt
|
||||
F: fs/partitions/ldm.*
|
||||
F: block/partitions/ldm.*
|
||||
|
||||
LogFS
|
||||
M: Joern Engel <joern@logfs.org>
|
||||
M: Prasad Joshi <prasadjoshi.linux@gmail.com>
|
||||
L: logfs@logfs.org
|
||||
W: logfs.org
|
||||
S: Maintained
|
||||
|
@ -4267,13 +4282,6 @@ S: Orphan
|
|||
F: drivers/video/matrox/matroxfb_*
|
||||
F: include/linux/matroxfb.h
|
||||
|
||||
MAX1668 TEMPERATURE SENSOR DRIVER
|
||||
M: "David George" <david.george@ska.ac.za>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/max1668
|
||||
F: drivers/hwmon/max1668.c
|
||||
|
||||
MAX6650 HARDWARE MONITOR AND FAN CONTROLLER DRIVER
|
||||
M: "Hans J. Koch" <hjk@hansjkoch.de>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
|
@ -5625,7 +5633,7 @@ W: http://www.ibm.com/developerworks/linux/linux390/
|
|||
S: Supported
|
||||
F: arch/s390/
|
||||
F: drivers/s390/
|
||||
F: fs/partitions/ibm.c
|
||||
F: block/partitions/ibm.c
|
||||
F: Documentation/s390/
|
||||
F: Documentation/DocBook/s390*
|
||||
|
||||
|
@ -6268,15 +6276,15 @@ S: Maintained
|
|||
F: arch/alpha/kernel/srm_env.c
|
||||
|
||||
STABLE BRANCH
|
||||
M: Greg Kroah-Hartman <greg@kroah.com>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: stable@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Supported
|
||||
|
||||
STAGING SUBSYSTEM
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
|
||||
L: devel@driverdev.osuosl.org
|
||||
S: Maintained
|
||||
S: Supported
|
||||
F: drivers/staging/
|
||||
|
||||
STAGING - AGERE HERMES II and II.5 WIRELESS DRIVERS
|
||||
|
@ -6388,11 +6396,6 @@ M: Omar Ramirez Luna <omar.ramirez@ti.com>
|
|||
S: Odd Fixes
|
||||
F: drivers/staging/tidspbridge/
|
||||
|
||||
STAGING - TRIDENT TVMASTER TMxxxx USB VIDEO CAPTURE DRIVERS
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Odd Fixes
|
||||
F: drivers/staging/tm6000/
|
||||
|
||||
STAGING - USB ENE SM/MS CARD READER DRIVER
|
||||
M: Al Cho <acho@novell.com>
|
||||
S: Odd Fixes
|
||||
|
@ -6661,10 +6664,10 @@ S: Maintained
|
|||
K: ^Subject:.*(?i)trivial
|
||||
|
||||
TTY LAYER
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
S: Maintained
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6.git
|
||||
F: drivers/tty/*
|
||||
F: drivers/tty/
|
||||
F: drivers/tty/serial/serial_core.c
|
||||
F: include/linux/serial_core.h
|
||||
F: include/linux/serial.h
|
||||
|
@ -6950,7 +6953,7 @@ S: Maintained
|
|||
F: drivers/usb/serial/digi_acceleport.c
|
||||
|
||||
USB SERIAL DRIVER
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/usb/usb-serial.txt
|
||||
|
@ -6965,9 +6968,8 @@ S: Maintained
|
|||
F: drivers/usb/serial/empeg.c
|
||||
|
||||
USB SERIAL KEYSPAN DRIVER
|
||||
M: Greg Kroah-Hartman <greg@kroah.com>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
W: http://www.kroah.com/linux/
|
||||
S: Maintained
|
||||
F: drivers/usb/serial/*keyspan*
|
||||
|
||||
|
@ -6995,7 +6997,7 @@ F: Documentation/video4linux/sn9c102.txt
|
|||
F: drivers/media/video/sn9c102/
|
||||
|
||||
USB SUBSYSTEM
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
W: http://www.linux-usb.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6.git
|
||||
|
@ -7082,7 +7084,7 @@ F: fs/hppfs/
|
|||
|
||||
USERSPACE I/O (UIO)
|
||||
M: "Hans J. Koch" <hjk@hansjkoch.de>
|
||||
M: Greg Kroah-Hartman <gregkh@suse.de>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
S: Maintained
|
||||
F: Documentation/DocBook/uio-howto.tmpl
|
||||
F: drivers/uio/
|
||||
|
@ -7357,6 +7359,7 @@ S: Supported
|
|||
F: Documentation/hwmon/wm83??
|
||||
F: arch/arm/mach-s3c64xx/mach-crag6410*
|
||||
F: drivers/leds/leds-wm83*.c
|
||||
F: drivers/hwmon/wm83??-hwmon.c
|
||||
F: drivers/input/misc/wm831x-on.c
|
||||
F: drivers/input/touchscreen/wm831x-ts.c
|
||||
F: drivers/input/touchscreen/wm97*.c
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 3
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -754,7 +754,7 @@ config ARCH_SA1100
|
|||
select ARCH_HAS_CPUFREQ
|
||||
select CPU_FREQ
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select CLKDEV_LOOKUP
|
||||
select HAVE_CLK
|
||||
select HAVE_SCHED_CLOCK
|
||||
select TICK_ONESHOT
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
@ -825,7 +825,6 @@ config ARCH_S5PC100
|
|||
select HAVE_CLK
|
||||
select CLKDEV_LOOKUP
|
||||
select CPU_V7
|
||||
select ARM_L1_CACHE_SHIFT_6
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select HAVE_S3C2410_I2C if I2C
|
||||
select HAVE_S3C_RTC if RTC_CLASS
|
||||
|
@ -842,7 +841,6 @@ config ARCH_S5PV210
|
|||
select HAVE_CLK
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select ARM_L1_CACHE_SHIFT_6
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_SCHED_CLOCK
|
||||
|
|
|
@ -160,7 +160,6 @@ machine-$(CONFIG_ARCH_MSM) := msm
|
|||
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
|
||||
machine-$(CONFIG_ARCH_IMX_V4_V5) := imx
|
||||
machine-$(CONFIG_ARCH_IMX_V6_V7) := imx
|
||||
machine-$(CONFIG_ARCH_MX5) := mx5
|
||||
machine-$(CONFIG_ARCH_MXS) := mxs
|
||||
machine-$(CONFIG_ARCH_NETX) := netx
|
||||
machine-$(CONFIG_ARCH_NOMADIK) := nomadik
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
cpu-offset = <0x8000>;
|
||||
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
|
||||
};
|
||||
|
||||
|
|
|
@ -46,11 +46,11 @@
|
|||
};
|
||||
|
||||
serial@70006200 {
|
||||
status = "disable";
|
||||
clock-frequency = <216000000>;
|
||||
};
|
||||
|
||||
serial@70006300 {
|
||||
clock-frequency = <216000000>;
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
serial@70006400 {
|
||||
|
@ -60,7 +60,7 @@
|
|||
sdhci@c8000000 {
|
||||
cd-gpios = <&gpio 173 0>; /* gpio PV5 */
|
||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
||||
power-gpios = <&gpio 169 0>; /* gpio PV1 */
|
||||
};
|
||||
|
||||
sdhci@c8000200 {
|
||||
|
|
|
@ -41,6 +41,7 @@
|
|||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/exception.h>
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
|
||||
|
@ -352,11 +353,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
|
|||
unsigned int gic_irqs = gic->gic_irqs;
|
||||
struct irq_domain *domain = &gic->domain;
|
||||
void __iomem *base = gic_data_dist_base(gic);
|
||||
u32 cpu = 0;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
cpu = cpu_logical_map(smp_processor_id());
|
||||
#endif
|
||||
u32 cpu = cpu_logical_map(smp_processor_id());
|
||||
|
||||
cpumask = 1 << cpu;
|
||||
cpumask |= cpumask << 8;
|
||||
|
|
|
@ -3,6 +3,7 @@ CONFIG_EXPERIMENTAL=y
|
|||
CONFIG_KERNEL_LZO=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=18
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
|
@ -14,20 +15,31 @@ CONFIG_MODULE_SRCVERSION_ALL=y
|
|||
# CONFIG_LBDAF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_MX5=y
|
||||
CONFIG_MACH_MX51_BABBAGE=y
|
||||
CONFIG_MACH_MX31LILLY=y
|
||||
CONFIG_MACH_MX31LITE=y
|
||||
CONFIG_MACH_PCM037=y
|
||||
CONFIG_MACH_PCM037_EET=y
|
||||
CONFIG_MACH_MX31_3DS=y
|
||||
CONFIG_MACH_MX31MOBOARD=y
|
||||
CONFIG_MACH_QONG=y
|
||||
CONFIG_MACH_ARMADILLO5X0=y
|
||||
CONFIG_MACH_KZM_ARM11_01=y
|
||||
CONFIG_MACH_PCM043=y
|
||||
CONFIG_MACH_MX35_3DS=y
|
||||
CONFIG_MACH_EUKREA_CPUIMX35=y
|
||||
CONFIG_MACH_VPR200=y
|
||||
CONFIG_MACH_IMX51_DT=y
|
||||
CONFIG_MACH_MX51_3DS=y
|
||||
CONFIG_MACH_EUKREA_CPUIMX51=y
|
||||
CONFIG_MACH_EUKREA_CPUIMX51SD=y
|
||||
CONFIG_MACH_MX51_EFIKAMX=y
|
||||
CONFIG_MACH_MX51_EFIKASB=y
|
||||
CONFIG_MACH_MX53_EVK=y
|
||||
CONFIG_MACH_MX53_SMD=y
|
||||
CONFIG_MACH_MX53_LOCO=y
|
||||
CONFIG_MACH_MX53_ARD=y
|
||||
CONFIG_MACH_IMX53_DT=y
|
||||
CONFIG_SOC_IMX6Q=y
|
||||
CONFIG_MXC_PWM=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_VMSPLIT_2G=y
|
||||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
CONFIG_AEABI=y
|
||||
|
@ -49,7 +61,7 @@ CONFIG_IP_PNP_DHCP=y
|
|||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_IPV6=y
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
|
@ -68,24 +80,20 @@ CONFIG_SCSI_SCAN_ASYNC=y
|
|||
CONFIG_ATA=y
|
||||
CONFIG_PATA_IMX=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MII=m
|
||||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_DAVICOM_PHY=y
|
||||
CONFIG_QSEMI_PHY=y
|
||||
CONFIG_LXT_PHY=y
|
||||
CONFIG_CICADA_PHY=y
|
||||
CONFIG_VITESSE_PHY=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_BROADCOM_PHY=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_NATIONAL_PHY=y
|
||||
CONFIG_STE10XP=y
|
||||
CONFIG_LSI_ET1011C_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CHELSIO is not set
|
||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
CONFIG_FEC=y
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
CONFIG_SMC91X=y
|
||||
CONFIG_SMC911X=y
|
||||
CONFIG_SMSC911X=y
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
|
@ -124,7 +132,6 @@ CONFIG_USB_EHCI_HCD=y
|
|||
CONFIG_USB_EHCI_MXC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=m
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
|
@ -133,6 +140,8 @@ CONFIG_LEDS_CLASS=y
|
|||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
|
||||
CONFIG_RTC_MXC=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_IMX_SDMA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
|
@ -1,144 +0,0 @@
|
|||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_EXPERT=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MODVERSIONS=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_MACH_MX31ADS_WM1133_EV1=y
|
||||
CONFIG_MACH_MX31LILLY=y
|
||||
CONFIG_MACH_MX31LITE=y
|
||||
CONFIG_MACH_PCM037=y
|
||||
CONFIG_MACH_PCM037_EET=y
|
||||
CONFIG_MACH_MX31_3DS=y
|
||||
CONFIG_MACH_MX31MOBOARD=y
|
||||
CONFIG_MACH_QONG=y
|
||||
CONFIG_MACH_ARMADILLO5X0=y
|
||||
CONFIG_MACH_KZM_ARM11_01=y
|
||||
CONFIG_MACH_PCM043=y
|
||||
CONFIG_MACH_MX35_3DS=y
|
||||
CONFIG_MACH_EUKREA_CPUIMX35=y
|
||||
CONFIG_MXC_IRQ_PRIOR=y
|
||||
CONFIG_MXC_PWM=y
|
||||
CONFIG_ARM_ERRATA_411920=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
|
||||
CONFIG_VFP=y
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_FW_LOADER=m
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_MXC=y
|
||||
CONFIG_MTD_UBI=y
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_DNET=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_IMX=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=m
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_IMX=y
|
||||
CONFIG_SERIAL_IMX_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_IMX=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_W1=y
|
||||
CONFIG_W1_MASTER_MXC=y
|
||||
CONFIG_W1_SLAVE_THERM=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_IMX2_WDT=y
|
||||
CONFIG_MFD_WM8350_I2C=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_WM8350=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_VIDEO_DEV=y
|
||||
# CONFIG_RC_CORE is not set
|
||||
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
|
||||
CONFIG_SOC_CAMERA=y
|
||||
CONFIG_SOC_CAMERA_MT9M001=y
|
||||
CONFIG_SOC_CAMERA_MT9M111=y
|
||||
CONFIG_SOC_CAMERA_MT9T031=y
|
||||
CONFIG_SOC_CAMERA_MT9V022=y
|
||||
CONFIG_SOC_CAMERA_TW9910=y
|
||||
CONFIG_SOC_CAMERA_OV772X=y
|
||||
CONFIG_VIDEO_MX3=y
|
||||
# CONFIG_RADIO_ADAPTERS is not set
|
||||
CONFIG_FB=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
# CONFIG_SND_ARM is not set
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_IMX_SOC=y
|
||||
CONFIG_SND_MXC_SOC_WM1133_EV1=y
|
||||
CONFIG_SND_SOC_PHYCORE_AC97=y
|
||||
CONFIG_SND_SOC_EUKREA_TLV320=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_MXC=y
|
||||
CONFIG_USB_GADGET=m
|
||||
CONFIG_USB_FSL_USB2=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_ULPI=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_MXC=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_MXC=y
|
||||
CONFIG_DMADEVICES=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
|
@ -237,7 +237,7 @@
|
|||
*/
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
|
||||
.macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T()
|
||||
.macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
|
||||
9999:
|
||||
.if \inc == 1
|
||||
\instr\cond\()b\()\t\().w \reg, [\ptr, #\off]
|
||||
|
@ -277,7 +277,7 @@
|
|||
|
||||
#else /* !CONFIG_THUMB2_KERNEL */
|
||||
|
||||
.macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=T()
|
||||
.macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER()
|
||||
.rept \rept
|
||||
9999:
|
||||
.if \inc == 1
|
||||
|
|
|
@ -83,9 +83,9 @@
|
|||
* instructions (inline assembly)
|
||||
*/
|
||||
#ifdef CONFIG_CPU_USE_DOMAINS
|
||||
#define T(instr) #instr "t"
|
||||
#define TUSER(instr) #instr "t"
|
||||
#else
|
||||
#define T(instr) #instr
|
||||
#define TUSER(instr) #instr
|
||||
#endif
|
||||
|
||||
#else /* __ASSEMBLY__ */
|
||||
|
@ -95,9 +95,9 @@
|
|||
* instructions
|
||||
*/
|
||||
#ifdef CONFIG_CPU_USE_DOMAINS
|
||||
#define T(instr) instr ## t
|
||||
#define TUSER(instr) instr ## t
|
||||
#else
|
||||
#define T(instr) instr
|
||||
#define TUSER(instr) instr
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
|
|
@ -75,9 +75,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
|
||||
#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
|
||||
__asm__ __volatile__( \
|
||||
"1: " T(ldr) " %1, [%3]\n" \
|
||||
"1: " TUSER(ldr) " %1, [%3]\n" \
|
||||
" " insn "\n" \
|
||||
"2: " T(str) " %0, [%3]\n" \
|
||||
"2: " TUSER(str) " %0, [%3]\n" \
|
||||
" mov %0, #0\n" \
|
||||
__futex_atomic_ex_table("%5") \
|
||||
: "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
|
||||
|
@ -95,10 +95,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
return -EFAULT;
|
||||
|
||||
__asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
|
||||
"1: " T(ldr) " %1, [%4]\n"
|
||||
"1: " TUSER(ldr) " %1, [%4]\n"
|
||||
" teq %1, %2\n"
|
||||
" it eq @ explicit IT needed for the 2b label\n"
|
||||
"2: " T(streq) " %3, [%4]\n"
|
||||
"2: " TUSER(streq) " %3, [%4]\n"
|
||||
__futex_atomic_ex_table("%5")
|
||||
: "+r" (ret), "=&r" (val)
|
||||
: "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
|
||||
|
|
|
@ -70,12 +70,6 @@ extern void platform_secondary_init(unsigned int cpu);
|
|||
*/
|
||||
extern void platform_smp_prepare_cpus(unsigned int);
|
||||
|
||||
/*
|
||||
* Logical CPU mapping.
|
||||
*/
|
||||
extern int __cpu_logical_map[NR_CPUS];
|
||||
#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
|
||||
|
||||
/*
|
||||
* Initial data for bringing up a secondary CPU.
|
||||
*/
|
||||
|
|
|
@ -43,4 +43,10 @@ static inline int cache_ops_need_broadcast(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Logical CPU mapping.
|
||||
*/
|
||||
extern int __cpu_logical_map[];
|
||||
#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
|
||||
|
||||
#endif
|
||||
|
|
|
@ -198,7 +198,15 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
|
|||
unsigned long addr)
|
||||
{
|
||||
pgtable_page_dtor(pte);
|
||||
tlb_add_flush(tlb, addr);
|
||||
|
||||
/*
|
||||
* With the classic ARM MMU, a pte page has two corresponding pmd
|
||||
* entries, each covering 1MB.
|
||||
*/
|
||||
addr &= PMD_MASK;
|
||||
tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
|
||||
tlb_add_flush(tlb, addr + SZ_1M);
|
||||
|
||||
tlb_remove_page(tlb, pte);
|
||||
}
|
||||
|
||||
|
|
|
@ -227,7 +227,7 @@ do { \
|
|||
|
||||
#define __get_user_asm_byte(x,addr,err) \
|
||||
__asm__ __volatile__( \
|
||||
"1: " T(ldrb) " %1,[%2],#0\n" \
|
||||
"1: " TUSER(ldrb) " %1,[%2],#0\n" \
|
||||
"2:\n" \
|
||||
" .pushsection .fixup,\"ax\"\n" \
|
||||
" .align 2\n" \
|
||||
|
@ -263,7 +263,7 @@ do { \
|
|||
|
||||
#define __get_user_asm_word(x,addr,err) \
|
||||
__asm__ __volatile__( \
|
||||
"1: " T(ldr) " %1,[%2],#0\n" \
|
||||
"1: " TUSER(ldr) " %1,[%2],#0\n" \
|
||||
"2:\n" \
|
||||
" .pushsection .fixup,\"ax\"\n" \
|
||||
" .align 2\n" \
|
||||
|
@ -308,7 +308,7 @@ do { \
|
|||
|
||||
#define __put_user_asm_byte(x,__pu_addr,err) \
|
||||
__asm__ __volatile__( \
|
||||
"1: " T(strb) " %1,[%2],#0\n" \
|
||||
"1: " TUSER(strb) " %1,[%2],#0\n" \
|
||||
"2:\n" \
|
||||
" .pushsection .fixup,\"ax\"\n" \
|
||||
" .align 2\n" \
|
||||
|
@ -341,7 +341,7 @@ do { \
|
|||
|
||||
#define __put_user_asm_word(x,__pu_addr,err) \
|
||||
__asm__ __volatile__( \
|
||||
"1: " T(str) " %1,[%2],#0\n" \
|
||||
"1: " TUSER(str) " %1,[%2],#0\n" \
|
||||
"2:\n" \
|
||||
" .pushsection .fixup,\"ax\"\n" \
|
||||
" .align 2\n" \
|
||||
|
@ -366,10 +366,10 @@ do { \
|
|||
|
||||
#define __put_user_asm_dword(x,__pu_addr,err) \
|
||||
__asm__ __volatile__( \
|
||||
ARM( "1: " T(str) " " __reg_oper1 ", [%1], #4\n" ) \
|
||||
ARM( "2: " T(str) " " __reg_oper0 ", [%1]\n" ) \
|
||||
THUMB( "1: " T(str) " " __reg_oper1 ", [%1]\n" ) \
|
||||
THUMB( "2: " T(str) " " __reg_oper0 ", [%1, #4]\n" ) \
|
||||
ARM( "1: " TUSER(str) " " __reg_oper1 ", [%1], #4\n" ) \
|
||||
ARM( "2: " TUSER(str) " " __reg_oper0 ", [%1]\n" ) \
|
||||
THUMB( "1: " TUSER(str) " " __reg_oper1 ", [%1]\n" ) \
|
||||
THUMB( "2: " TUSER(str) " " __reg_oper0 ", [%1, #4]\n" ) \
|
||||
"3:\n" \
|
||||
" .pushsection .fixup,\"ax\"\n" \
|
||||
" .align 2\n" \
|
||||
|
|
|
@ -790,7 +790,7 @@ __kuser_cmpxchg64: @ 0xffff0f60
|
|||
smp_dmb arm
|
||||
rsbs r0, r3, #0 @ set returned val and C flag
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
bx lr
|
||||
usr_ret lr
|
||||
|
||||
#elif !defined(CONFIG_SMP)
|
||||
|
||||
|
|
|
@ -149,6 +149,11 @@ ENDPROC(ret_from_fork)
|
|||
#endif
|
||||
#endif
|
||||
|
||||
.macro mcount_adjust_addr rd, rn
|
||||
bic \rd, \rn, #1 @ clear the Thumb bit if present
|
||||
sub \rd, \rd, #MCOUNT_INSN_SIZE
|
||||
.endm
|
||||
|
||||
.macro __mcount suffix
|
||||
mcount_enter
|
||||
ldr r0, =ftrace_trace_function
|
||||
|
@ -173,8 +178,7 @@ ENDPROC(ret_from_fork)
|
|||
mcount_exit
|
||||
|
||||
1: mcount_get_lr r1 @ lr of instrumented func
|
||||
mov r0, lr @ instrumented function
|
||||
sub r0, r0, #MCOUNT_INSN_SIZE
|
||||
mcount_adjust_addr r0, lr @ instrumented function
|
||||
adr lr, BSYM(2f)
|
||||
mov pc, r2
|
||||
2: mcount_exit
|
||||
|
@ -184,8 +188,7 @@ ENDPROC(ret_from_fork)
|
|||
mcount_enter
|
||||
|
||||
mcount_get_lr r1 @ lr of instrumented func
|
||||
mov r0, lr @ instrumented function
|
||||
sub r0, r0, #MCOUNT_INSN_SIZE
|
||||
mcount_adjust_addr r0, lr @ instrumented function
|
||||
|
||||
.globl ftrace_call\suffix
|
||||
ftrace_call\suffix:
|
||||
|
@ -205,11 +208,11 @@ ftrace_graph_call\suffix:
|
|||
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||
@ called from __ftrace_caller, saved in mcount_enter
|
||||
ldr r1, [sp, #16] @ instrumented routine (func)
|
||||
mcount_adjust_addr r1, r1
|
||||
#else
|
||||
@ called from __mcount, untouched in lr
|
||||
mov r1, lr @ instrumented routine (func)
|
||||
mcount_adjust_addr r1, lr @ instrumented routine (func)
|
||||
#endif
|
||||
sub r1, r1, #MCOUNT_INSN_SIZE
|
||||
mov r2, fp @ frame pointer
|
||||
bl prepare_ftrace_return
|
||||
mcount_exit
|
||||
|
|
|
@ -469,6 +469,20 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
|
|||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
},
|
||||
[C(NODE)] = {
|
||||
[C(OP_READ)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
[C(OP_WRITE)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
[C(OP_PREFETCH)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -579,6 +593,20 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
|
|||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
},
|
||||
[C(NODE)] = {
|
||||
[C(OP_READ)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
[C(OP_WRITE)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
[C(OP_PREFETCH)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
@ -699,10 +699,13 @@ static int vfp_set(struct task_struct *target,
|
|||
{
|
||||
int ret;
|
||||
struct thread_info *thread = task_thread_info(target);
|
||||
struct vfp_hard_struct new_vfp = thread->vfpstate.hard;
|
||||
struct vfp_hard_struct new_vfp;
|
||||
const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs);
|
||||
const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr);
|
||||
|
||||
vfp_sync_hwstate(thread);
|
||||
new_vfp = thread->vfpstate.hard;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
&new_vfp.fpregs,
|
||||
user_fpregs_offset,
|
||||
|
@ -723,9 +726,8 @@ static int vfp_set(struct task_struct *target,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
vfp_sync_hwstate(thread);
|
||||
thread->vfpstate.hard = new_vfp;
|
||||
vfp_flush_hwstate(thread);
|
||||
thread->vfpstate.hard = new_vfp;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -21,7 +21,6 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/kexec.h>
|
||||
#include <linux/of_fdt.h>
|
||||
#include <linux/crash_dump.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
@ -160,7 +159,7 @@ static struct resource mem_res[] = {
|
|||
.flags = IORESOURCE_MEM
|
||||
},
|
||||
{
|
||||
.name = "Kernel text",
|
||||
.name = "Kernel code",
|
||||
.start = 0,
|
||||
.end = 0,
|
||||
.flags = IORESOURCE_MEM
|
||||
|
@ -427,6 +426,20 @@ void cpu_init(void)
|
|||
: "r14");
|
||||
}
|
||||
|
||||
int __cpu_logical_map[NR_CPUS];
|
||||
|
||||
void __init smp_setup_processor_id(void)
|
||||
{
|
||||
int i;
|
||||
u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
|
||||
|
||||
cpu_logical_map(0) = cpu;
|
||||
for (i = 1; i < NR_CPUS; ++i)
|
||||
cpu_logical_map(i) = i == cpu ? 0 : i;
|
||||
|
||||
printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
|
||||
}
|
||||
|
||||
static void __init setup_processor(void)
|
||||
{
|
||||
struct proc_info_list *list;
|
||||
|
|
|
@ -227,6 +227,8 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
|
|||
if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
|
||||
return -EINVAL;
|
||||
|
||||
vfp_flush_hwstate(thread);
|
||||
|
||||
/*
|
||||
* Copy the floating point registers. There can be unused
|
||||
* registers see asm/hwcap.h for details.
|
||||
|
@ -251,9 +253,6 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
|
|||
__get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
|
||||
__get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
|
||||
|
||||
if (!err)
|
||||
vfp_flush_hwstate(thread);
|
||||
|
||||
return err ? -EFAULT : 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -233,20 +233,6 @@ void __ref cpu_die(void)
|
|||
}
|
||||
#endif /* CONFIG_HOTPLUG_CPU */
|
||||
|
||||
int __cpu_logical_map[NR_CPUS];
|
||||
|
||||
void __init smp_setup_processor_id(void)
|
||||
{
|
||||
int i;
|
||||
u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
|
||||
|
||||
cpu_logical_map(0) = cpu;
|
||||
for (i = 1; i < NR_CPUS; ++i)
|
||||
cpu_logical_map(i) = i == cpu ? 0 : i;
|
||||
|
||||
printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
|
||||
}
|
||||
|
||||
/*
|
||||
* Called by both boot and secondaries to move global data into
|
||||
* per-processor storage.
|
||||
|
@ -443,9 +429,7 @@ static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent);
|
|||
static void ipi_timer(void)
|
||||
{
|
||||
struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent);
|
||||
irq_enter();
|
||||
evt->event_handler(evt);
|
||||
irq_exit();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
||||
|
@ -548,7 +532,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
|
|||
|
||||
switch (ipinr) {
|
||||
case IPI_TIMER:
|
||||
irq_enter();
|
||||
ipi_timer();
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
case IPI_RESCHEDULE:
|
||||
|
@ -556,15 +542,21 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
|
|||
break;
|
||||
|
||||
case IPI_CALL_FUNC:
|
||||
irq_enter();
|
||||
generic_smp_call_function_interrupt();
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
case IPI_CALL_FUNC_SINGLE:
|
||||
irq_enter();
|
||||
generic_smp_call_function_single_interrupt();
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
case IPI_CPU_STOP:
|
||||
irq_enter();
|
||||
ipi_cpu_stop(cpu);
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
@ -252,6 +252,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
|
|||
else
|
||||
twd_calibrate_rate();
|
||||
|
||||
__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
|
||||
|
||||
clk->name = "local_timer";
|
||||
clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
|
||||
CLOCK_EVT_FEAT_C3STOP;
|
||||
|
|
|
@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err)
|
|||
{
|
||||
struct thread_info *thread = current_thread_info();
|
||||
int ret;
|
||||
enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;
|
||||
|
||||
oops_enter();
|
||||
|
||||
|
@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err)
|
|||
console_verbose();
|
||||
bust_spinlocks(1);
|
||||
if (!user_mode(regs))
|
||||
report_bug(regs->ARM_pc, regs);
|
||||
bug_type = report_bug(regs->ARM_pc, regs);
|
||||
if (bug_type != BUG_TRAP_TYPE_NONE)
|
||||
str = "Oops - BUG";
|
||||
ret = __die(str, err, thread, regs);
|
||||
|
||||
if (regs && kexec_should_crash(thread->task))
|
||||
|
|
|
@ -4,11 +4,13 @@
|
|||
*/
|
||||
|
||||
#include <asm-generic/vmlinux.lds.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#define PROC_INFO \
|
||||
. = ALIGN(4); \
|
||||
VMLINUX_SYMBOL(__proc_info_begin) = .; \
|
||||
*(.proc.info.init) \
|
||||
VMLINUX_SYMBOL(__proc_info_end) = .;
|
||||
|
@ -181,7 +183,7 @@ SECTIONS
|
|||
}
|
||||
#endif
|
||||
|
||||
PERCPU_SECTION(32)
|
||||
PERCPU_SECTION(L1_CACHE_BYTES)
|
||||
|
||||
#ifdef CONFIG_XIP_KERNEL
|
||||
__data_loc = ALIGN(4); /* location in binary */
|
||||
|
@ -212,13 +214,13 @@ SECTIONS
|
|||
#endif
|
||||
|
||||
NOSAVE_DATA
|
||||
CACHELINE_ALIGNED_DATA(32)
|
||||
READ_MOSTLY_DATA(32)
|
||||
CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
|
||||
READ_MOSTLY_DATA(L1_CACHE_BYTES)
|
||||
|
||||
/*
|
||||
* The exception fixup table (might need resorting at runtime)
|
||||
*/
|
||||
. = ALIGN(32);
|
||||
. = ALIGN(4);
|
||||
__start___ex_table = .;
|
||||
#ifdef CONFIG_MMU
|
||||
*(__ex_table)
|
||||
|
|
|
@ -31,18 +31,18 @@
|
|||
#include <asm/domain.h>
|
||||
|
||||
ENTRY(__get_user_1)
|
||||
1: T(ldrb) r2, [r0]
|
||||
1: TUSER(ldrb) r2, [r0]
|
||||
mov r0, #0
|
||||
mov pc, lr
|
||||
ENDPROC(__get_user_1)
|
||||
|
||||
ENTRY(__get_user_2)
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
2: T(ldrb) r2, [r0]
|
||||
3: T(ldrb) r3, [r0, #1]
|
||||
2: TUSER(ldrb) r2, [r0]
|
||||
3: TUSER(ldrb) r3, [r0, #1]
|
||||
#else
|
||||
2: T(ldrb) r2, [r0], #1
|
||||
3: T(ldrb) r3, [r0]
|
||||
2: TUSER(ldrb) r2, [r0], #1
|
||||
3: TUSER(ldrb) r3, [r0]
|
||||
#endif
|
||||
#ifndef __ARMEB__
|
||||
orr r2, r2, r3, lsl #8
|
||||
|
@ -54,7 +54,7 @@ ENTRY(__get_user_2)
|
|||
ENDPROC(__get_user_2)
|
||||
|
||||
ENTRY(__get_user_4)
|
||||
4: T(ldr) r2, [r0]
|
||||
4: TUSER(ldr) r2, [r0]
|
||||
mov r0, #0
|
||||
mov pc, lr
|
||||
ENDPROC(__get_user_4)
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#include <asm/domain.h>
|
||||
|
||||
ENTRY(__put_user_1)
|
||||
1: T(strb) r2, [r0]
|
||||
1: TUSER(strb) r2, [r0]
|
||||
mov r0, #0
|
||||
mov pc, lr
|
||||
ENDPROC(__put_user_1)
|
||||
|
@ -40,19 +40,19 @@ ENTRY(__put_user_2)
|
|||
mov ip, r2, lsr #8
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
#ifndef __ARMEB__
|
||||
2: T(strb) r2, [r0]
|
||||
3: T(strb) ip, [r0, #1]
|
||||
2: TUSER(strb) r2, [r0]
|
||||
3: TUSER(strb) ip, [r0, #1]
|
||||
#else
|
||||
2: T(strb) ip, [r0]
|
||||
3: T(strb) r2, [r0, #1]
|
||||
2: TUSER(strb) ip, [r0]
|
||||
3: TUSER(strb) r2, [r0, #1]
|
||||
#endif
|
||||
#else /* !CONFIG_THUMB2_KERNEL */
|
||||
#ifndef __ARMEB__
|
||||
2: T(strb) r2, [r0], #1
|
||||
3: T(strb) ip, [r0]
|
||||
2: TUSER(strb) r2, [r0], #1
|
||||
3: TUSER(strb) ip, [r0]
|
||||
#else
|
||||
2: T(strb) ip, [r0], #1
|
||||
3: T(strb) r2, [r0]
|
||||
2: TUSER(strb) ip, [r0], #1
|
||||
3: TUSER(strb) r2, [r0]
|
||||
#endif
|
||||
#endif /* CONFIG_THUMB2_KERNEL */
|
||||
mov r0, #0
|
||||
|
@ -60,18 +60,18 @@ ENTRY(__put_user_2)
|
|||
ENDPROC(__put_user_2)
|
||||
|
||||
ENTRY(__put_user_4)
|
||||
4: T(str) r2, [r0]
|
||||
4: TUSER(str) r2, [r0]
|
||||
mov r0, #0
|
||||
mov pc, lr
|
||||
ENDPROC(__put_user_4)
|
||||
|
||||
ENTRY(__put_user_8)
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
5: T(str) r2, [r0]
|
||||
6: T(str) r3, [r0, #4]
|
||||
5: TUSER(str) r2, [r0]
|
||||
6: TUSER(str) r3, [r0, #4]
|
||||
#else
|
||||
5: T(str) r2, [r0], #4
|
||||
6: T(str) r3, [r0]
|
||||
5: TUSER(str) r2, [r0], #4
|
||||
6: TUSER(str) r3, [r0]
|
||||
#endif
|
||||
mov r0, #0
|
||||
mov pc, lr
|
||||
|
|
|
@ -32,11 +32,11 @@
|
|||
rsb ip, ip, #4
|
||||
cmp ip, #2
|
||||
ldrb r3, [r1], #1
|
||||
USER( T(strb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strb) r3, [r0], #1) @ May fault
|
||||
ldrgeb r3, [r1], #1
|
||||
USER( T(strgeb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
|
||||
ldrgtb r3, [r1], #1
|
||||
USER( T(strgtb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
|
||||
sub r2, r2, ip
|
||||
b .Lc2u_dest_aligned
|
||||
|
||||
|
@ -59,7 +59,7 @@ ENTRY(__copy_to_user)
|
|||
addmi ip, r2, #4
|
||||
bmi .Lc2u_0nowords
|
||||
ldr r3, [r1], #4
|
||||
USER( T(str) r3, [r0], #4) @ May fault
|
||||
USER( TUSER( str) r3, [r0], #4) @ May fault
|
||||
mov ip, r0, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
|
||||
rsb ip, ip, #0
|
||||
movs ip, ip, lsr #32 - PAGE_SHIFT
|
||||
|
@ -88,18 +88,18 @@ USER( T(str) r3, [r0], #4) @ May fault
|
|||
stmneia r0!, {r3 - r4} @ Shouldnt fault
|
||||
tst ip, #4
|
||||
ldrne r3, [r1], #4
|
||||
T(strne) r3, [r0], #4 @ Shouldnt fault
|
||||
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
|
||||
ands ip, ip, #3
|
||||
beq .Lc2u_0fupi
|
||||
.Lc2u_0nowords: teq ip, #0
|
||||
beq .Lc2u_finished
|
||||
.Lc2u_nowords: cmp ip, #2
|
||||
ldrb r3, [r1], #1
|
||||
USER( T(strb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strb) r3, [r0], #1) @ May fault
|
||||
ldrgeb r3, [r1], #1
|
||||
USER( T(strgeb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
|
||||
ldrgtb r3, [r1], #1
|
||||
USER( T(strgtb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
|
||||
b .Lc2u_finished
|
||||
|
||||
.Lc2u_not_enough:
|
||||
|
@ -120,7 +120,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
|
|||
mov r3, r7, pull #8
|
||||
ldr r7, [r1], #4
|
||||
orr r3, r3, r7, push #24
|
||||
USER( T(str) r3, [r0], #4) @ May fault
|
||||
USER( TUSER( str) r3, [r0], #4) @ May fault
|
||||
mov ip, r0, lsl #32 - PAGE_SHIFT
|
||||
rsb ip, ip, #0
|
||||
movs ip, ip, lsr #32 - PAGE_SHIFT
|
||||
|
@ -155,18 +155,18 @@ USER( T(str) r3, [r0], #4) @ May fault
|
|||
movne r3, r7, pull #8
|
||||
ldrne r7, [r1], #4
|
||||
orrne r3, r3, r7, push #24
|
||||
T(strne) r3, [r0], #4 @ Shouldnt fault
|
||||
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
|
||||
ands ip, ip, #3
|
||||
beq .Lc2u_1fupi
|
||||
.Lc2u_1nowords: mov r3, r7, get_byte_1
|
||||
teq ip, #0
|
||||
beq .Lc2u_finished
|
||||
cmp ip, #2
|
||||
USER( T(strb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strb) r3, [r0], #1) @ May fault
|
||||
movge r3, r7, get_byte_2
|
||||
USER( T(strgeb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
|
||||
movgt r3, r7, get_byte_3
|
||||
USER( T(strgtb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
|
||||
b .Lc2u_finished
|
||||
|
||||
.Lc2u_2fupi: subs r2, r2, #4
|
||||
|
@ -175,7 +175,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
|
|||
mov r3, r7, pull #16
|
||||
ldr r7, [r1], #4
|
||||
orr r3, r3, r7, push #16
|
||||
USER( T(str) r3, [r0], #4) @ May fault
|
||||
USER( TUSER( str) r3, [r0], #4) @ May fault
|
||||
mov ip, r0, lsl #32 - PAGE_SHIFT
|
||||
rsb ip, ip, #0
|
||||
movs ip, ip, lsr #32 - PAGE_SHIFT
|
||||
|
@ -210,18 +210,18 @@ USER( T(str) r3, [r0], #4) @ May fault
|
|||
movne r3, r7, pull #16
|
||||
ldrne r7, [r1], #4
|
||||
orrne r3, r3, r7, push #16
|
||||
T(strne) r3, [r0], #4 @ Shouldnt fault
|
||||
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
|
||||
ands ip, ip, #3
|
||||
beq .Lc2u_2fupi
|
||||
.Lc2u_2nowords: mov r3, r7, get_byte_2
|
||||
teq ip, #0
|
||||
beq .Lc2u_finished
|
||||
cmp ip, #2
|
||||
USER( T(strb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strb) r3, [r0], #1) @ May fault
|
||||
movge r3, r7, get_byte_3
|
||||
USER( T(strgeb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
|
||||
ldrgtb r3, [r1], #0
|
||||
USER( T(strgtb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
|
||||
b .Lc2u_finished
|
||||
|
||||
.Lc2u_3fupi: subs r2, r2, #4
|
||||
|
@ -230,7 +230,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
|
|||
mov r3, r7, pull #24
|
||||
ldr r7, [r1], #4
|
||||
orr r3, r3, r7, push #8
|
||||
USER( T(str) r3, [r0], #4) @ May fault
|
||||
USER( TUSER( str) r3, [r0], #4) @ May fault
|
||||
mov ip, r0, lsl #32 - PAGE_SHIFT
|
||||
rsb ip, ip, #0
|
||||
movs ip, ip, lsr #32 - PAGE_SHIFT
|
||||
|
@ -265,18 +265,18 @@ USER( T(str) r3, [r0], #4) @ May fault
|
|||
movne r3, r7, pull #24
|
||||
ldrne r7, [r1], #4
|
||||
orrne r3, r3, r7, push #8
|
||||
T(strne) r3, [r0], #4 @ Shouldnt fault
|
||||
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
|
||||
ands ip, ip, #3
|
||||
beq .Lc2u_3fupi
|
||||
.Lc2u_3nowords: mov r3, r7, get_byte_3
|
||||
teq ip, #0
|
||||
beq .Lc2u_finished
|
||||
cmp ip, #2
|
||||
USER( T(strb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strb) r3, [r0], #1) @ May fault
|
||||
ldrgeb r3, [r1], #1
|
||||
USER( T(strgeb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
|
||||
ldrgtb r3, [r1], #0
|
||||
USER( T(strgtb) r3, [r0], #1) @ May fault
|
||||
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
|
||||
b .Lc2u_finished
|
||||
ENDPROC(__copy_to_user)
|
||||
|
||||
|
@ -295,11 +295,11 @@ ENDPROC(__copy_to_user)
|
|||
.Lcfu_dest_not_aligned:
|
||||
rsb ip, ip, #4
|
||||
cmp ip, #2
|
||||
USER( T(ldrb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrb) r3, [r1], #1) @ May fault
|
||||
strb r3, [r0], #1
|
||||
USER( T(ldrgeb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
|
||||
strgeb r3, [r0], #1
|
||||
USER( T(ldrgtb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
|
||||
strgtb r3, [r0], #1
|
||||
sub r2, r2, ip
|
||||
b .Lcfu_dest_aligned
|
||||
|
@ -322,7 +322,7 @@ ENTRY(__copy_from_user)
|
|||
.Lcfu_0fupi: subs r2, r2, #4
|
||||
addmi ip, r2, #4
|
||||
bmi .Lcfu_0nowords
|
||||
USER( T(ldr) r3, [r1], #4)
|
||||
USER( TUSER( ldr) r3, [r1], #4)
|
||||
str r3, [r0], #4
|
||||
mov ip, r1, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
|
||||
rsb ip, ip, #0
|
||||
|
@ -351,18 +351,18 @@ USER( T(ldr) r3, [r1], #4)
|
|||
ldmneia r1!, {r3 - r4} @ Shouldnt fault
|
||||
stmneia r0!, {r3 - r4}
|
||||
tst ip, #4
|
||||
T(ldrne) r3, [r1], #4 @ Shouldnt fault
|
||||
TUSER( ldrne) r3, [r1], #4 @ Shouldnt fault
|
||||
strne r3, [r0], #4
|
||||
ands ip, ip, #3
|
||||
beq .Lcfu_0fupi
|
||||
.Lcfu_0nowords: teq ip, #0
|
||||
beq .Lcfu_finished
|
||||
.Lcfu_nowords: cmp ip, #2
|
||||
USER( T(ldrb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrb) r3, [r1], #1) @ May fault
|
||||
strb r3, [r0], #1
|
||||
USER( T(ldrgeb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
|
||||
strgeb r3, [r0], #1
|
||||
USER( T(ldrgtb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
|
||||
strgtb r3, [r0], #1
|
||||
b .Lcfu_finished
|
||||
|
||||
|
@ -375,7 +375,7 @@ USER( T(ldrgtb) r3, [r1], #1) @ May fault
|
|||
|
||||
.Lcfu_src_not_aligned:
|
||||
bic r1, r1, #3
|
||||
USER( T(ldr) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldr) r7, [r1], #4) @ May fault
|
||||
cmp ip, #2
|
||||
bgt .Lcfu_3fupi
|
||||
beq .Lcfu_2fupi
|
||||
|
@ -383,7 +383,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
|
|||
addmi ip, r2, #4
|
||||
bmi .Lcfu_1nowords
|
||||
mov r3, r7, pull #8
|
||||
USER( T(ldr) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldr) r7, [r1], #4) @ May fault
|
||||
orr r3, r3, r7, push #24
|
||||
str r3, [r0], #4
|
||||
mov ip, r1, lsl #32 - PAGE_SHIFT
|
||||
|
@ -418,7 +418,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
|
|||
stmneia r0!, {r3 - r4}
|
||||
tst ip, #4
|
||||
movne r3, r7, pull #8
|
||||
USER( T(ldrne) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldrne) r7, [r1], #4) @ May fault
|
||||
orrne r3, r3, r7, push #24
|
||||
strne r3, [r0], #4
|
||||
ands ip, ip, #3
|
||||
|
@ -438,7 +438,7 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
|
|||
addmi ip, r2, #4
|
||||
bmi .Lcfu_2nowords
|
||||
mov r3, r7, pull #16
|
||||
USER( T(ldr) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldr) r7, [r1], #4) @ May fault
|
||||
orr r3, r3, r7, push #16
|
||||
str r3, [r0], #4
|
||||
mov ip, r1, lsl #32 - PAGE_SHIFT
|
||||
|
@ -474,7 +474,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
|
|||
stmneia r0!, {r3 - r4}
|
||||
tst ip, #4
|
||||
movne r3, r7, pull #16
|
||||
USER( T(ldrne) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldrne) r7, [r1], #4) @ May fault
|
||||
orrne r3, r3, r7, push #16
|
||||
strne r3, [r0], #4
|
||||
ands ip, ip, #3
|
||||
|
@ -486,7 +486,7 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
|
|||
strb r3, [r0], #1
|
||||
movge r3, r7, get_byte_3
|
||||
strgeb r3, [r0], #1
|
||||
USER( T(ldrgtb) r3, [r1], #0) @ May fault
|
||||
USER( TUSER( ldrgtb) r3, [r1], #0) @ May fault
|
||||
strgtb r3, [r0], #1
|
||||
b .Lcfu_finished
|
||||
|
||||
|
@ -494,7 +494,7 @@ USER( T(ldrgtb) r3, [r1], #0) @ May fault
|
|||
addmi ip, r2, #4
|
||||
bmi .Lcfu_3nowords
|
||||
mov r3, r7, pull #24
|
||||
USER( T(ldr) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldr) r7, [r1], #4) @ May fault
|
||||
orr r3, r3, r7, push #8
|
||||
str r3, [r0], #4
|
||||
mov ip, r1, lsl #32 - PAGE_SHIFT
|
||||
|
@ -529,7 +529,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
|
|||
stmneia r0!, {r3 - r4}
|
||||
tst ip, #4
|
||||
movne r3, r7, pull #24
|
||||
USER( T(ldrne) r7, [r1], #4) @ May fault
|
||||
USER( TUSER( ldrne) r7, [r1], #4) @ May fault
|
||||
orrne r3, r3, r7, push #8
|
||||
strne r3, [r0], #4
|
||||
ands ip, ip, #3
|
||||
|
@ -539,9 +539,9 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
|
|||
beq .Lcfu_finished
|
||||
cmp ip, #2
|
||||
strb r3, [r0], #1
|
||||
USER( T(ldrgeb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
|
||||
strgeb r3, [r0], #1
|
||||
USER( T(ldrgtb) r3, [r1], #1) @ May fault
|
||||
USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
|
||||
strgtb r3, [r0], #1
|
||||
b .Lcfu_finished
|
||||
ENDPROC(__copy_from_user)
|
||||
|
|
|
@ -18,6 +18,12 @@ config HAVE_AT91_USART4
|
|||
config HAVE_AT91_USART5
|
||||
bool
|
||||
|
||||
config AT91_SAM9_ALT_RESET
|
||||
bool
|
||||
|
||||
config AT91_SAM9G45_RESET
|
||||
bool
|
||||
|
||||
menu "Atmel AT91 System-on-Chip"
|
||||
|
||||
choice
|
||||
|
@ -39,6 +45,7 @@ config ARCH_AT91SAM9260
|
|||
select HAVE_AT91_USART4
|
||||
select HAVE_AT91_USART5
|
||||
select HAVE_NET_MACB
|
||||
select AT91_SAM9_ALT_RESET
|
||||
|
||||
config ARCH_AT91SAM9261
|
||||
bool "AT91SAM9261"
|
||||
|
@ -46,6 +53,7 @@ config ARCH_AT91SAM9261
|
|||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_AT91_DBGU0
|
||||
select AT91_SAM9_ALT_RESET
|
||||
|
||||
config ARCH_AT91SAM9G10
|
||||
bool "AT91SAM9G10"
|
||||
|
@ -53,6 +61,7 @@ config ARCH_AT91SAM9G10
|
|||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select AT91_SAM9_ALT_RESET
|
||||
|
||||
config ARCH_AT91SAM9263
|
||||
bool "AT91SAM9263"
|
||||
|
@ -61,6 +70,7 @@ config ARCH_AT91SAM9263
|
|||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select HAVE_AT91_DBGU1
|
||||
select AT91_SAM9_ALT_RESET
|
||||
|
||||
config ARCH_AT91SAM9RL
|
||||
bool "AT91SAM9RL"
|
||||
|
@ -69,6 +79,7 @@ config ARCH_AT91SAM9RL
|
|||
select HAVE_AT91_USART3
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_AT91_DBGU0
|
||||
select AT91_SAM9_ALT_RESET
|
||||
|
||||
config ARCH_AT91SAM9G20
|
||||
bool "AT91SAM9G20"
|
||||
|
@ -79,6 +90,7 @@ config ARCH_AT91SAM9G20
|
|||
select HAVE_AT91_USART4
|
||||
select HAVE_AT91_USART5
|
||||
select HAVE_NET_MACB
|
||||
select AT91_SAM9_ALT_RESET
|
||||
|
||||
config ARCH_AT91SAM9G45
|
||||
bool "AT91SAM9G45"
|
||||
|
@ -88,6 +100,7 @@ config ARCH_AT91SAM9G45
|
|||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select HAVE_AT91_DBGU1
|
||||
select AT91_SAM9G45_RESET
|
||||
|
||||
config ARCH_AT91CAP9
|
||||
bool "AT91CAP9"
|
||||
|
@ -96,6 +109,7 @@ config ARCH_AT91CAP9
|
|||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select HAVE_AT91_DBGU1
|
||||
select AT91_SAM9G45_RESET
|
||||
|
||||
config ARCH_AT91X40
|
||||
bool "AT91x40"
|
||||
|
|
|
@ -8,15 +8,17 @@ obj-n :=
|
|||
obj- :=
|
||||
|
||||
obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
|
||||
obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
|
||||
|
||||
# CPU-specific support
|
||||
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
|
||||
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
|
||||
|
|
|
@ -21,7 +21,6 @@
|
|||
#include <mach/cpu.h>
|
||||
#include <mach/at91cap9.h>
|
||||
#include <mach/at91_pmc.h>
|
||||
#include <mach/at91_rstc.h>
|
||||
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
|
@ -314,11 +313,6 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
|
|||
}
|
||||
};
|
||||
|
||||
static void at91cap9_restart(char mode, const char *cmd)
|
||||
{
|
||||
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91CAP9 processor initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
@ -331,13 +325,14 @@ static void __init at91cap9_map_io(void)
|
|||
static void __init at91cap9_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
|
||||
at91_ioremap_rstc(AT91CAP9_BASE_RSTC);
|
||||
at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
|
||||
}
|
||||
|
||||
static void __init at91cap9_initialize(void)
|
||||
{
|
||||
arm_pm_restart = at91cap9_restart;
|
||||
arm_pm_restart = at91sam9g45_restart;
|
||||
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
|
||||
|
||||
/* Register GPIO subsystem */
|
||||
|
|
|
@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_AT91
|
||||
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
|
|
@ -323,6 +323,7 @@ static void __init at91sam9260_map_io(void)
|
|||
static void __init at91sam9260_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
|
||||
at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
|
||||
at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
|
||||
}
|
||||
|
|
|
@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_AT91
|
||||
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
@ -1215,8 +1215,7 @@ void __init at91_add_device_serial(void) {}
|
|||
* CF/IDE
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
|
||||
defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
|
||||
#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
|
||||
defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
|
||||
|
||||
static struct at91_cf_data cf0_data;
|
||||
|
@ -1313,10 +1312,8 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
|
|||
if (data->flags & AT91_CF_TRUE_IDE)
|
||||
#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
|
||||
pdev->name = "pata_at91";
|
||||
#elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
|
||||
pdev->name = "at91_ide";
|
||||
#else
|
||||
#warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
|
||||
#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
|
||||
#endif
|
||||
else
|
||||
pdev->name = "at91_cf";
|
||||
|
|
|
@ -281,6 +281,7 @@ static void __init at91sam9261_map_io(void)
|
|||
static void __init at91sam9261_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
|
||||
at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
|
||||
at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
|
||||
}
|
||||
|
|
|
@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_AT91
|
||||
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
|
|
@ -301,6 +301,7 @@ static void __init at91sam9263_map_io(void)
|
|||
static void __init at91sam9263_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
|
||||
at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
|
||||
at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
|
||||
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
|
||||
|
|
|
@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_AT91
|
||||
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
@ -355,8 +355,8 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
|
|||
* Compact Flash (PCMCIA or IDE)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
|
||||
defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
|
||||
#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
|
||||
defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
|
||||
|
||||
static struct at91_cf_data cf0_data;
|
||||
|
||||
|
@ -450,7 +450,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
|
|||
at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
|
||||
at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
|
||||
|
||||
pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
|
||||
pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
|
||||
platform_device_register(pdev);
|
||||
}
|
||||
#else
|
||||
|
|
|
@ -23,7 +23,8 @@
|
|||
.globl at91sam9_alt_restart
|
||||
|
||||
at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
|
||||
ldr r1, .at91_va_base_rstc_cr
|
||||
ldr r1, =at91_rstc_base
|
||||
ldr r1, [r1]
|
||||
|
||||
mov r2, #1
|
||||
mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
|
||||
|
@ -33,11 +34,9 @@ at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
|
|||
|
||||
str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
|
||||
str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
|
||||
str r4, [r1] @ reset processor
|
||||
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
||||
|
||||
b .
|
||||
|
||||
.at91_va_base_sdramc:
|
||||
.word AT91_VA_BASE_SYS + AT91_SDRAMC0
|
||||
.at91_va_base_rstc_cr:
|
||||
.word AT91_VA_BASE_SYS + AT91_RSTC_CR
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <mach/at91sam9g45.h>
|
||||
#include <mach/at91_pmc.h>
|
||||
#include <mach/at91_rstc.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "soc.h"
|
||||
|
@ -318,11 +317,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
|
|||
}
|
||||
};
|
||||
|
||||
static void at91sam9g45_restart(char mode, const char *cmd)
|
||||
{
|
||||
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9G45 processor initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
@ -336,6 +330,7 @@ static void __init at91sam9g45_map_io(void)
|
|||
static void __init at91sam9g45_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
|
||||
at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
|
||||
at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
|
||||
}
|
||||
|
|
40
arch/arm/mach-at91/at91sam9g45_reset.S
Normal file
40
arch/arm/mach-at91/at91sam9g45_reset.S
Normal file
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
* reset AT91SAM9G45 as per errata
|
||||
*
|
||||
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
|
||||
*
|
||||
* unless the SDRAM is cleanly shutdown before we hit the
|
||||
* reset register it can be left driving the data bus and
|
||||
* killing the chance of a subsequent boot from NAND
|
||||
*
|
||||
* GPLv2 Only
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91sam9_ddrsdr.h>
|
||||
#include <mach/at91_rstc.h>
|
||||
|
||||
.arm
|
||||
|
||||
.globl at91sam9g45_restart
|
||||
|
||||
at91sam9g45_restart:
|
||||
ldr r0, .at91_va_base_sdramc0 @ preload constants
|
||||
ldr r1, =at91_rstc_base
|
||||
ldr r1, [r1]
|
||||
|
||||
mov r2, #1
|
||||
mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
|
||||
ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
|
||||
|
||||
.balign 32 @ align to cache line
|
||||
|
||||
str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
|
||||
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
|
||||
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
||||
|
||||
b .
|
||||
|
||||
.at91_va_base_sdramc0:
|
||||
.word AT91_VA_BASE_SYS + AT91_DDRSDRC0
|
|
@ -286,6 +286,7 @@ static void __init at91sam9rl_map_io(void)
|
|||
static void __init at91sam9rl_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
|
||||
at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
|
||||
at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
|
||||
}
|
||||
|
|
|
@ -58,7 +58,9 @@ extern void at91_irq_suspend(void);
|
|||
extern void at91_irq_resume(void);
|
||||
|
||||
/* reset */
|
||||
extern void at91_ioremap_rstc(u32 base_addr);
|
||||
extern void at91sam9_alt_restart(char, const char *);
|
||||
extern void at91sam9g45_restart(char, const char *);
|
||||
|
||||
/* shutdown */
|
||||
extern void at91_ioremap_shdwc(u32 base_addr);
|
||||
|
|
|
@ -16,13 +16,25 @@
|
|||
#ifndef AT91_RSTC_H
|
||||
#define AT91_RSTC_H
|
||||
|
||||
#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */
|
||||
#ifndef __ASSEMBLY__
|
||||
extern void __iomem *at91_rstc_base;
|
||||
|
||||
#define at91_rstc_read(field) \
|
||||
__raw_readl(at91_rstc_base + field)
|
||||
|
||||
#define at91_rstc_write(field, value) \
|
||||
__raw_writel(value, at91_rstc_base + field);
|
||||
#else
|
||||
.extern at91_rstc_base
|
||||
#endif
|
||||
|
||||
#define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
|
||||
#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
|
||||
#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
|
||||
#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
|
||||
#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
|
||||
|
||||
#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
|
||||
#define AT91_RSTC_SR 0x04 /* Reset Controller Status Register */
|
||||
#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
|
||||
#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
|
||||
#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
|
||||
|
@ -33,7 +45,7 @@
|
|||
#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
|
||||
#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
|
||||
|
||||
#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */
|
||||
#define AT91_RSTC_MR 0x08 /* Reset Controller Mode Register */
|
||||
#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
|
||||
#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
|
||||
#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
|
||||
|
|
|
@ -83,7 +83,6 @@
|
|||
#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
|
||||
#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
|
||||
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
|
||||
#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
|
||||
#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
|
||||
(0xfffffd50 - AT91_BASE_SYS) : \
|
||||
(0xfffffd60 - AT91_BASE_SYS))
|
||||
|
@ -96,6 +95,7 @@
|
|||
#define AT91CAP9_BASE_PIOB 0xfffff400
|
||||
#define AT91CAP9_BASE_PIOC 0xfffff600
|
||||
#define AT91CAP9_BASE_PIOD 0xfffff800
|
||||
#define AT91CAP9_BASE_RSTC 0xfffffd00
|
||||
#define AT91CAP9_BASE_SHDWC 0xfffffd10
|
||||
#define AT91CAP9_BASE_RTT 0xfffffd20
|
||||
#define AT91CAP9_BASE_PIT 0xfffffd30
|
||||
|
|
|
@ -1,108 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
|
||||
*
|
||||
* (C) 2008 Andrew Victor
|
||||
*
|
||||
* DDR/SDR Controller (DDRSDRC) - System peripherals registers.
|
||||
* Based on AT91CAP9 datasheet revision B.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef AT91CAP9_DDRSDR_H
|
||||
#define AT91CAP9_DDRSDR_H
|
||||
|
||||
#define AT91_DDRSDRC_MR 0x00 /* Mode Register */
|
||||
#define AT91_DDRSDRC_MODE (0xf << 0) /* Command Mode */
|
||||
#define AT91_DDRSDRC_MODE_NORMAL 0
|
||||
#define AT91_DDRSDRC_MODE_NOP 1
|
||||
#define AT91_DDRSDRC_MODE_PRECHARGE 2
|
||||
#define AT91_DDRSDRC_MODE_LMR 3
|
||||
#define AT91_DDRSDRC_MODE_REFRESH 4
|
||||
#define AT91_DDRSDRC_MODE_EXT_LMR 5
|
||||
#define AT91_DDRSDRC_MODE_DEEP 6
|
||||
|
||||
#define AT91_DDRSDRC_RTR 0x04 /* Refresh Timer Register */
|
||||
#define AT91_DDRSDRC_COUNT (0xfff << 0) /* Refresh Timer Counter */
|
||||
|
||||
#define AT91_DDRSDRC_CR 0x08 /* Configuration Register */
|
||||
#define AT91_DDRSDRC_NC (3 << 0) /* Number of Column Bits */
|
||||
#define AT91_DDRSDRC_NC_SDR8 (0 << 0)
|
||||
#define AT91_DDRSDRC_NC_SDR9 (1 << 0)
|
||||
#define AT91_DDRSDRC_NC_SDR10 (2 << 0)
|
||||
#define AT91_DDRSDRC_NC_SDR11 (3 << 0)
|
||||
#define AT91_DDRSDRC_NC_DDR9 (0 << 0)
|
||||
#define AT91_DDRSDRC_NC_DDR10 (1 << 0)
|
||||
#define AT91_DDRSDRC_NC_DDR11 (2 << 0)
|
||||
#define AT91_DDRSDRC_NC_DDR12 (3 << 0)
|
||||
#define AT91_DDRSDRC_NR (3 << 2) /* Number of Row Bits */
|
||||
#define AT91_DDRSDRC_NR_11 (0 << 2)
|
||||
#define AT91_DDRSDRC_NR_12 (1 << 2)
|
||||
#define AT91_DDRSDRC_NR_13 (2 << 2)
|
||||
#define AT91_DDRSDRC_CAS (7 << 4) /* CAS Latency */
|
||||
#define AT91_DDRSDRC_CAS_2 (2 << 4)
|
||||
#define AT91_DDRSDRC_CAS_3 (3 << 4)
|
||||
#define AT91_DDRSDRC_CAS_25 (6 << 4)
|
||||
#define AT91_DDRSDRC_DLL (1 << 7) /* Reset DLL */
|
||||
#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */
|
||||
|
||||
#define AT91_DDRSDRC_T0PR 0x0C /* Timing 0 Register */
|
||||
#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */
|
||||
#define AT91_DDRSDRC_TRCD (0xf << 4) /* Row to Column delay */
|
||||
#define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */
|
||||
#define AT91_DDRSDRC_TRC (0xf << 12) /* Row cycle delay */
|
||||
#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */
|
||||
#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */
|
||||
#define AT91_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */
|
||||
#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */
|
||||
|
||||
#define AT91_DDRSDRC_T1PR 0x10 /* Timing 1 Register */
|
||||
#define AT91_DDRSDRC_TRFC (0x1f << 0) /* Row Cycle Delay */
|
||||
#define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */
|
||||
#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
|
||||
#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
|
||||
|
||||
#define AT91_DDRSDRC_LPR 0x18 /* Low Power Register */
|
||||
#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
|
||||
#define AT91_DDRSDRC_LPCB_DISABLE 0
|
||||
#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1
|
||||
#define AT91_DDRSDRC_LPCB_POWER_DOWN 2
|
||||
#define AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN 3
|
||||
#define AT91_DDRSDRC_CLKFR (1 << 2) /* Clock Frozen */
|
||||
#define AT91_DDRSDRC_PASR (7 << 4) /* Partial Array Self Refresh */
|
||||
#define AT91_DDRSDRC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */
|
||||
#define AT91_DDRSDRC_DS (3 << 10) /* Drive Strength */
|
||||
#define AT91_DDRSDRC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */
|
||||
#define AT91_DDRSDRC_TIMEOUT_0_CLK_CYCLES (0 << 12)
|
||||
#define AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES (1 << 12)
|
||||
#define AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES (2 << 12)
|
||||
|
||||
#define AT91_DDRSDRC_MDR 0x1C /* Memory Device Register */
|
||||
#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */
|
||||
#define AT91_DDRSDRC_MD_SDR 0
|
||||
#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
|
||||
#define AT91_DDRSDRC_MD_DDR 2
|
||||
#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
|
||||
|
||||
#define AT91_DDRSDRC_DLLR 0x20 /* DLL Information Register */
|
||||
#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */
|
||||
#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */
|
||||
#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */
|
||||
#define AT91_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */
|
||||
#define AT91_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */
|
||||
#define AT91_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */
|
||||
#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */
|
||||
#define AT91_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */
|
||||
#define AT91_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */
|
||||
|
||||
/* Register access macros */
|
||||
#define at91_ramc_read(num, reg) \
|
||||
at91_sys_read(AT91_DDRSDRC##num + reg)
|
||||
#define at91_ramc_write(num, reg, value) \
|
||||
at91_sys_write(AT91_DDRSDRC##num + reg, value)
|
||||
|
||||
|
||||
#endif
|
|
@ -83,7 +83,6 @@
|
|||
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
|
||||
#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
|
||||
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
|
||||
#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
|
||||
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
|
||||
|
||||
#define AT91SAM9260_BASE_ECC 0xffffe800
|
||||
|
@ -92,6 +91,7 @@
|
|||
#define AT91SAM9260_BASE_PIOA 0xfffff400
|
||||
#define AT91SAM9260_BASE_PIOB 0xfffff600
|
||||
#define AT91SAM9260_BASE_PIOC 0xfffff800
|
||||
#define AT91SAM9260_BASE_RSTC 0xfffffd00
|
||||
#define AT91SAM9260_BASE_SHDWC 0xfffffd10
|
||||
#define AT91SAM9260_BASE_RTT 0xfffffd20
|
||||
#define AT91SAM9260_BASE_PIT 0xfffffd30
|
||||
|
|
|
@ -68,7 +68,6 @@
|
|||
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
|
||||
#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
|
||||
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
|
||||
#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
|
||||
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
|
||||
|
||||
#define AT91SAM9261_BASE_SMC 0xffffec00
|
||||
|
@ -76,6 +75,7 @@
|
|||
#define AT91SAM9261_BASE_PIOA 0xfffff400
|
||||
#define AT91SAM9261_BASE_PIOB 0xfffff600
|
||||
#define AT91SAM9261_BASE_PIOC 0xfffff800
|
||||
#define AT91SAM9261_BASE_RSTC 0xfffffd00
|
||||
#define AT91SAM9261_BASE_SHDWC 0xfffffd10
|
||||
#define AT91SAM9261_BASE_RTT 0xfffffd20
|
||||
#define AT91SAM9261_BASE_PIT 0xfffffd30
|
||||
|
|
|
@ -78,7 +78,6 @@
|
|||
#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
|
||||
#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
|
||||
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
|
||||
#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
|
||||
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
|
||||
|
||||
#define AT91SAM9263_BASE_ECC0 0xffffe000
|
||||
|
@ -91,6 +90,7 @@
|
|||
#define AT91SAM9263_BASE_PIOC 0xfffff600
|
||||
#define AT91SAM9263_BASE_PIOD 0xfffff800
|
||||
#define AT91SAM9263_BASE_PIOE 0xfffffa00
|
||||
#define AT91SAM9263_BASE_RSTC 0xfffffd00
|
||||
#define AT91SAM9263_BASE_SHDWC 0xfffffd10
|
||||
#define AT91SAM9263_BASE_RTT0 0xfffffd20
|
||||
#define AT91SAM9263_BASE_PIT 0xfffffd30
|
||||
|
|
|
@ -46,10 +46,10 @@
|
|||
#define AT91_DDRSDRC_CAS_25 (6 << 4)
|
||||
#define AT91_DDRSDRC_RST_DLL (1 << 7) /* Reset DLL */
|
||||
#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */
|
||||
#define AT91_DDRSDRC_DIS_DLL (1 << 9) /* Disable DLL */
|
||||
#define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver */
|
||||
#define AT91_DDRSDRC_DQMS (1 << 16) /* Mask Data is Shared */
|
||||
#define AT91_DDRSDRC_ACTBST (1 << 18) /* Active Bank X to Burst Stop Read Access Bank Y */
|
||||
#define AT91_DDRSDRC_DIS_DLL (1 << 9) /* Disable DLL [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_DQMS (1 << 16) /* Mask Data is Shared [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_ACTBST (1 << 18) /* Active Bank X to Burst Stop Read Access Bank Y [SAM9 Only] */
|
||||
|
||||
#define AT91_DDRSDRC_T0PR 0x0C /* Timing 0 Register */
|
||||
#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */
|
||||
|
@ -59,7 +59,8 @@
|
|||
#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */
|
||||
#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */
|
||||
#define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */
|
||||
#define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay */
|
||||
#define AT91CAP9_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */
|
||||
#define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */
|
||||
|
||||
#define AT91_DDRSDRC_T1PR 0x10 /* Timing 1 Register */
|
||||
|
@ -68,13 +69,14 @@
|
|||
#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
|
||||
#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
|
||||
|
||||
#define AT91_DDRSDRC_T2PR 0x14 /* Timing 2 Register */
|
||||
#define AT91_DDRSDRC_T2PR 0x14 /* Timing 2 Register [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_TXARD (0xf << 0) /* Exit active power down delay to read command in mode "Fast Exit" */
|
||||
#define AT91_DDRSDRC_TXARDS (0xf << 4) /* Exit active power down delay to read command in mode "Slow Exit" */
|
||||
#define AT91_DDRSDRC_TRPA (0xf << 8) /* Row Precharge All delay */
|
||||
#define AT91_DDRSDRC_TRTP (0x7 << 12) /* Read to Precharge delay */
|
||||
|
||||
#define AT91_DDRSDRC_LPR 0x1C /* Low Power Register */
|
||||
#define AT91CAP9_DDRSDRC_LPR 0x18 /* Low Power Register */
|
||||
#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
|
||||
#define AT91_DDRSDRC_LPCB_DISABLE 0
|
||||
#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1
|
||||
|
@ -92,32 +94,40 @@
|
|||
#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */
|
||||
|
||||
#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */
|
||||
#define AT91CAP9_DDRSDRC_MDR 0x1C /* Memory Device Register */
|
||||
#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */
|
||||
#define AT91_DDRSDRC_MD_SDR 0
|
||||
#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
|
||||
#define AT91CAP9_DDRSDRC_MD_DDR 2
|
||||
#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
|
||||
#define AT91_DDRSDRC_MD_DDR2 6
|
||||
#define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */
|
||||
#define AT91_DDRSDRC_DBW_32BITS (0 << 4)
|
||||
#define AT91_DDRSDRC_DBW_16BITS (1 << 4)
|
||||
|
||||
#define AT91_DDRSDRC_DLL 0x24 /* DLL Information Register */
|
||||
#define AT91CAP9_DDRSDRC_DLL 0x20 /* DLL Information Register */
|
||||
#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */
|
||||
#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */
|
||||
#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */
|
||||
#define AT91CAP9_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */
|
||||
#define AT91CAP9_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */
|
||||
#define AT91CAP9_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */
|
||||
#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */
|
||||
#define AT91CAP9_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */
|
||||
#define AT91CAP9_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */
|
||||
|
||||
#define AT91_DDRSDRC_HS 0x2C /* High Speed Register */
|
||||
#define AT91_DDRSDRC_HS 0x2C /* High Speed Register [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_DIS_ATCP_RD (1 << 2) /* Anticip read access is disabled */
|
||||
|
||||
#define AT91_DDRSDRC_DELAY(n) (0x30 + (0x4 * (n))) /* Delay I/O Register n */
|
||||
|
||||
#define AT91_DDRSDRC_WPMR 0xE4 /* Write Protect Mode Register */
|
||||
#define AT91_DDRSDRC_WPMR 0xE4 /* Write Protect Mode Register [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_WP (1 << 0) /* Write protect enable */
|
||||
#define AT91_DDRSDRC_WPKEY (0xffffff << 8) /* Write protect key */
|
||||
#define AT91_DDRSDRC_KEY (0x444452 << 8) /* Write protect key = "DDR" */
|
||||
|
||||
#define AT91_DDRSDRC_WPSR 0xE8 /* Write Protect Status Register */
|
||||
#define AT91_DDRSDRC_WPSR 0xE8 /* Write Protect Status Register [SAM9 Only] */
|
||||
#define AT91_DDRSDRC_WPVS (1 << 0) /* Write protect violation status */
|
||||
#define AT91_DDRSDRC_WPVSRC (0xffff << 8) /* Write protect violation source */
|
||||
|
||||
|
|
|
@ -18,6 +18,35 @@
|
|||
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
struct sam9_smc_config {
|
||||
/* Setup register */
|
||||
u8 ncs_read_setup;
|
||||
u8 nrd_setup;
|
||||
u8 ncs_write_setup;
|
||||
u8 nwe_setup;
|
||||
|
||||
/* Pulse register */
|
||||
u8 ncs_read_pulse;
|
||||
u8 nrd_pulse;
|
||||
u8 ncs_write_pulse;
|
||||
u8 nwe_pulse;
|
||||
|
||||
/* Cycle register */
|
||||
u16 read_cycle;
|
||||
u16 write_cycle;
|
||||
|
||||
/* Mode register */
|
||||
u32 mode;
|
||||
u8 tdf_cycles:4;
|
||||
};
|
||||
|
||||
extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);
|
||||
extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);
|
||||
extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);
|
||||
extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
|
||||
#endif
|
||||
|
||||
#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */
|
||||
#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
|
||||
#define AT91_SMC_NWESETUP_(x) ((x) << 0)
|
||||
|
|
|
@ -90,7 +90,6 @@
|
|||
#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
|
||||
#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
|
||||
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
|
||||
#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
|
||||
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
|
||||
|
||||
#define AT91SAM9G45_BASE_ECC 0xffffe200
|
||||
|
@ -102,6 +101,7 @@
|
|||
#define AT91SAM9G45_BASE_PIOC 0xfffff600
|
||||
#define AT91SAM9G45_BASE_PIOD 0xfffff800
|
||||
#define AT91SAM9G45_BASE_PIOE 0xfffffa00
|
||||
#define AT91SAM9G45_BASE_RSTC 0xfffffd00
|
||||
#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
|
||||
#define AT91SAM9G45_BASE_RTT 0xfffffd20
|
||||
#define AT91SAM9G45_BASE_PIT 0xfffffd30
|
||||
|
|
|
@ -72,7 +72,6 @@
|
|||
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
|
||||
#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
|
||||
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
|
||||
#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
|
||||
#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
|
||||
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
|
||||
|
||||
|
@ -84,6 +83,7 @@
|
|||
#define AT91SAM9RL_BASE_PIOB 0xfffff600
|
||||
#define AT91SAM9RL_BASE_PIOC 0xfffff800
|
||||
#define AT91SAM9RL_BASE_PIOD 0xfffffa00
|
||||
#define AT91SAM9RL_BASE_RSTC 0xfffffd00
|
||||
#define AT91SAM9RL_BASE_SHDWC 0xfffffd10
|
||||
#define AT91SAM9RL_BASE_RTT 0xfffffd20
|
||||
#define AT91SAM9RL_BASE_PIT 0xfffffd30
|
||||
|
|
|
@ -88,7 +88,7 @@ extern void __init at91_add_device_eth(struct macb_platform_data *data);
|
|||
struct at91_usbh_data {
|
||||
u8 ports; /* number of ports on root hub */
|
||||
int vbus_pin[2]; /* port power-control pin */
|
||||
u8 vbus_pin_inverted;
|
||||
u8 vbus_pin_active_low[2];
|
||||
u8 overcurrent_supported;
|
||||
int overcurrent_pin[2];
|
||||
u8 overcurrent_status[2];
|
||||
|
|
|
@ -34,7 +34,6 @@
|
|||
/*
|
||||
* Show the reason for the previous system reset.
|
||||
*/
|
||||
#if defined(AT91_RSTC)
|
||||
|
||||
#include <mach/at91_rstc.h>
|
||||
#include <mach/at91_shdwc.h>
|
||||
|
@ -58,10 +57,10 @@ static void __init show_reset_status(void)
|
|||
char *reason, *r2 = reset;
|
||||
u32 reset_type, wake_type;
|
||||
|
||||
if (!at91_shdwc_base)
|
||||
if (!at91_shdwc_base || !at91_rstc_base)
|
||||
return;
|
||||
|
||||
reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
|
||||
reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
|
||||
wake_type = at91_shdwc_read(AT91_SHDW_SR);
|
||||
|
||||
switch (reset_type) {
|
||||
|
@ -102,10 +101,6 @@ static void __init show_reset_status(void)
|
|||
}
|
||||
pr_info("AT91: Starting after %s %s\n", reason, r2);
|
||||
}
|
||||
#else
|
||||
static void __init show_reset_status(void) {}
|
||||
#endif
|
||||
|
||||
|
||||
static int at91_pm_valid_state(suspend_state_t state)
|
||||
{
|
||||
|
|
|
@ -25,21 +25,21 @@ static inline u32 sdram_selfrefresh_enable(void)
|
|||
: : "r" (0))
|
||||
|
||||
#elif defined(CONFIG_ARCH_AT91CAP9)
|
||||
#include <mach/at91cap9_ddrsdr.h>
|
||||
#include <mach/at91sam9_ddrsdr.h>
|
||||
|
||||
|
||||
static inline u32 sdram_selfrefresh_enable(void)
|
||||
{
|
||||
u32 saved_lpr, lpr;
|
||||
|
||||
saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR);
|
||||
saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR);
|
||||
|
||||
lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
|
||||
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
|
||||
at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
|
||||
return saved_lpr;
|
||||
}
|
||||
|
||||
#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr)
|
||||
#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr)
|
||||
#define wait_for_interrupt_enable() cpu_do_idle()
|
||||
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
|
|
|
@ -18,9 +18,8 @@
|
|||
|
||||
#if defined(CONFIG_ARCH_AT91RM9200)
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#elif defined(CONFIG_ARCH_AT91CAP9)
|
||||
#include <mach/at91cap9_ddrsdr.h>
|
||||
#elif defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
#elif defined(CONFIG_ARCH_AT91CAP9) \
|
||||
|| defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
#include <mach/at91sam9_ddrsdr.h>
|
||||
#else
|
||||
#include <mach/at91sam9_sdramc.h>
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
* linux/arch/arm/mach-at91/sam9_smc.c
|
||||
*
|
||||
* Copyright (C) 2008 Andrew Victor
|
||||
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
@ -22,7 +23,22 @@
|
|||
|
||||
static void __iomem *smc_base_addr[2];
|
||||
|
||||
static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
|
||||
static void sam9_smc_cs_write_mode(void __iomem *base,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
__raw_writel(config->mode
|
||||
| AT91_SMC_TDF_(config->tdf_cycles),
|
||||
base + AT91_SMC_MODE);
|
||||
}
|
||||
|
||||
void sam9_smc_write_mode(int id, int cs,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
|
||||
}
|
||||
|
||||
static void sam9_smc_cs_configure(void __iomem *base,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
|
||||
/* Setup register */
|
||||
|
@ -45,16 +61,66 @@ static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_con
|
|||
base + AT91_SMC_CYCLE);
|
||||
|
||||
/* Mode register */
|
||||
__raw_writel(config->mode
|
||||
| AT91_SMC_TDF_(config->tdf_cycles),
|
||||
base + AT91_SMC_MODE);
|
||||
sam9_smc_cs_write_mode(base, config);
|
||||
}
|
||||
|
||||
void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
|
||||
void sam9_smc_configure(int id, int cs,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
|
||||
}
|
||||
|
||||
static void sam9_smc_cs_read_mode(void __iomem *base,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
u32 val = __raw_readl(base + AT91_SMC_MODE);
|
||||
|
||||
config->mode = (val & ~AT91_SMC_NWECYCLE);
|
||||
config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
|
||||
}
|
||||
|
||||
void sam9_smc_read_mode(int id, int cs,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
|
||||
}
|
||||
|
||||
static void sam9_smc_cs_read(void __iomem *base,
|
||||
struct sam9_smc_config *config)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
/* Setup register */
|
||||
val = __raw_readl(base + AT91_SMC_SETUP);
|
||||
|
||||
config->nwe_setup = val & AT91_SMC_NWESETUP;
|
||||
config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
|
||||
config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
|
||||
config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
|
||||
|
||||
/* Pulse register */
|
||||
val = __raw_readl(base + AT91_SMC_PULSE);
|
||||
|
||||
config->nwe_setup = val & AT91_SMC_NWEPULSE;
|
||||
config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
|
||||
config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
|
||||
config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
|
||||
|
||||
/* Cycle register */
|
||||
val = __raw_readl(base + AT91_SMC_CYCLE);
|
||||
|
||||
config->write_cycle = val & AT91_SMC_NWECYCLE;
|
||||
config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
|
||||
|
||||
/* Mode register */
|
||||
sam9_smc_cs_read_mode(base, config);
|
||||
}
|
||||
|
||||
void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
|
||||
{
|
||||
sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
|
||||
}
|
||||
|
||||
void __init at91sam9_ioremap_smc(int id, u32 addr)
|
||||
{
|
||||
if (id > 1) {
|
||||
|
|
|
@ -8,27 +8,4 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
struct sam9_smc_config {
|
||||
/* Setup register */
|
||||
u8 ncs_read_setup;
|
||||
u8 nrd_setup;
|
||||
u8 ncs_write_setup;
|
||||
u8 nwe_setup;
|
||||
|
||||
/* Pulse register */
|
||||
u8 ncs_read_pulse;
|
||||
u8 nrd_pulse;
|
||||
u8 ncs_write_pulse;
|
||||
u8 nwe_pulse;
|
||||
|
||||
/* Cycle register */
|
||||
u16 read_cycle;
|
||||
u16 write_cycle;
|
||||
|
||||
/* Mode register */
|
||||
u32 mode;
|
||||
u8 tdf_cycles:4;
|
||||
};
|
||||
|
||||
extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
|
||||
extern void __init at91sam9_ioremap_smc(int id, u32 addr);
|
||||
|
|
|
@ -29,9 +29,12 @@ EXPORT_SYMBOL(at91_soc_initdata);
|
|||
void __init at91rm9200_set_type(int type)
|
||||
{
|
||||
if (type == ARCH_REVISON_9200_PQFP)
|
||||
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
|
||||
else
|
||||
at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
|
||||
else
|
||||
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
|
||||
|
||||
pr_info("AT91: filled in soc subtype: %s\n",
|
||||
at91_get_soc_subtype(&at91_soc_initdata));
|
||||
}
|
||||
|
||||
void __init at91_init_irq_default(void)
|
||||
|
@ -281,6 +284,15 @@ void __init at91_ioremap_shdwc(u32 base_addr)
|
|||
pm_power_off = at91sam9_poweroff;
|
||||
}
|
||||
|
||||
void __iomem *at91_rstc_base;
|
||||
|
||||
void __init at91_ioremap_rstc(u32 base_addr)
|
||||
{
|
||||
at91_rstc_base = ioremap(base_addr, 16);
|
||||
if (!at91_rstc_base)
|
||||
panic("Impossible to ioremap at91_rstc_base\n");
|
||||
}
|
||||
|
||||
void __init at91_initialize(unsigned long main_clock)
|
||||
{
|
||||
at91_boot_soc.ioremap_registers();
|
||||
|
|
|
@ -194,6 +194,6 @@ MACHINE_START(BCMRING, "BCMRING")
|
|||
.init_early = bcmring_init_early,
|
||||
.init_irq = bcmring_init_irq,
|
||||
.timer = &bcmring_timer,
|
||||
.init_machine = bcmring_init_machine
|
||||
.init_machine = bcmring_init_machine,
|
||||
.restart = bcmring_restart,
|
||||
MACHINE_END
|
||||
|
|
|
@ -33,17 +33,11 @@
|
|||
|
||||
#include <mach/timer.h>
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/pfn.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/sched.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
|
||||
/* especially since dc4 doesn't use kmalloc'd memory. */
|
||||
|
||||
#define ALLOW_MAP_OF_KMALLOC_MEMORY 0
|
||||
|
||||
/* ---- Public Variables ------------------------------------------------- */
|
||||
|
||||
/* ---- Private Constants and Types -------------------------------------- */
|
||||
|
@ -53,58 +47,18 @@
|
|||
#define CONTROLLER_FROM_HANDLE(handle) (((handle) >> 4) & 0x0f)
|
||||
#define CHANNEL_FROM_HANDLE(handle) ((handle) & 0x0f)
|
||||
|
||||
#define DMA_MAP_DEBUG 0
|
||||
|
||||
#if DMA_MAP_DEBUG
|
||||
# define DMA_MAP_PRINT(fmt, args...) printk("%s: " fmt, __func__, ## args)
|
||||
#else
|
||||
# define DMA_MAP_PRINT(fmt, args...)
|
||||
#endif
|
||||
|
||||
/* ---- Private Variables ------------------------------------------------ */
|
||||
|
||||
static DMA_Global_t gDMA;
|
||||
static struct proc_dir_entry *gDmaDir;
|
||||
|
||||
static atomic_t gDmaStatMemTypeKmalloc = ATOMIC_INIT(0);
|
||||
static atomic_t gDmaStatMemTypeVmalloc = ATOMIC_INIT(0);
|
||||
static atomic_t gDmaStatMemTypeUser = ATOMIC_INIT(0);
|
||||
static atomic_t gDmaStatMemTypeCoherent = ATOMIC_INIT(0);
|
||||
|
||||
#include "dma_device.c"
|
||||
|
||||
/* ---- Private Function Prototypes -------------------------------------- */
|
||||
|
||||
/* ---- Functions ------------------------------------------------------- */
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Displays information for /proc/dma/mem-type
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
static int dma_proc_read_mem_type(char *buf, char **start, off_t offset,
|
||||
int count, int *eof, void *data)
|
||||
{
|
||||
int len = 0;
|
||||
|
||||
len += sprintf(buf + len, "dma_map_mem statistics\n");
|
||||
len +=
|
||||
sprintf(buf + len, "coherent: %d\n",
|
||||
atomic_read(&gDmaStatMemTypeCoherent));
|
||||
len +=
|
||||
sprintf(buf + len, "kmalloc: %d\n",
|
||||
atomic_read(&gDmaStatMemTypeKmalloc));
|
||||
len +=
|
||||
sprintf(buf + len, "vmalloc: %d\n",
|
||||
atomic_read(&gDmaStatMemTypeVmalloc));
|
||||
len +=
|
||||
sprintf(buf + len, "user: %d\n",
|
||||
atomic_read(&gDmaStatMemTypeUser));
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Displays information for /proc/dma/channels
|
||||
|
@ -846,8 +800,6 @@ int dma_init(void)
|
|||
dma_proc_read_channels, NULL);
|
||||
create_proc_read_entry("devices", 0, gDmaDir,
|
||||
dma_proc_read_devices, NULL);
|
||||
create_proc_read_entry("mem-type", 0, gDmaDir,
|
||||
dma_proc_read_mem_type, NULL);
|
||||
}
|
||||
|
||||
out:
|
||||
|
@ -1565,767 +1517,3 @@ int dma_set_device_handler(DMA_Device_t dev, /* Device to set the callback for.
|
|||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_set_device_handler);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Initializes a memory mapping structure
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_init_mem_map(DMA_MemMap_t *memMap)
|
||||
{
|
||||
memset(memMap, 0, sizeof(*memMap));
|
||||
|
||||
sema_init(&memMap->lock, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_init_mem_map);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Releases any memory currently being held by a memory mapping structure.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_term_mem_map(DMA_MemMap_t *memMap)
|
||||
{
|
||||
down(&memMap->lock); /* Just being paranoid */
|
||||
|
||||
/* Free up any allocated memory */
|
||||
|
||||
up(&memMap->lock);
|
||||
memset(memMap, 0, sizeof(*memMap));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_term_mem_map);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Looks at a memory address and categorizes it.
|
||||
*
|
||||
* @return One of the values from the DMA_MemType_t enumeration.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
DMA_MemType_t dma_mem_type(void *addr)
|
||||
{
|
||||
unsigned long addrVal = (unsigned long)addr;
|
||||
|
||||
if (addrVal >= CONSISTENT_BASE) {
|
||||
/* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */
|
||||
|
||||
/* dma_alloc_xxx pages are physically and virtually contiguous */
|
||||
|
||||
return DMA_MEM_TYPE_DMA;
|
||||
}
|
||||
|
||||
/* Technically, we could add one more classification. Addresses between VMALLOC_END */
|
||||
/* and the beginning of the DMA virtual address could be considered to be I/O space. */
|
||||
/* Right now, nobody cares about this particular classification, so we ignore it. */
|
||||
|
||||
if (is_vmalloc_addr(addr)) {
|
||||
/* Address comes from the vmalloc'd region. Pages are virtually */
|
||||
/* contiguous but NOT physically contiguous */
|
||||
|
||||
return DMA_MEM_TYPE_VMALLOC;
|
||||
}
|
||||
|
||||
if (addrVal >= PAGE_OFFSET) {
|
||||
/* PAGE_OFFSET is typically 0xC0000000 */
|
||||
|
||||
/* kmalloc'd pages are physically contiguous */
|
||||
|
||||
return DMA_MEM_TYPE_KMALLOC;
|
||||
}
|
||||
|
||||
return DMA_MEM_TYPE_USER;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_mem_type);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Looks at a memory address and determines if we support DMA'ing to/from
|
||||
* that type of memory.
|
||||
*
|
||||
* @return boolean -
|
||||
* return value != 0 means dma supported
|
||||
* return value == 0 means dma not supported
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_mem_supports_dma(void *addr)
|
||||
{
|
||||
DMA_MemType_t memType = dma_mem_type(addr);
|
||||
|
||||
return (memType == DMA_MEM_TYPE_DMA)
|
||||
#if ALLOW_MAP_OF_KMALLOC_MEMORY
|
||||
|| (memType == DMA_MEM_TYPE_KMALLOC)
|
||||
#endif
|
||||
|| (memType == DMA_MEM_TYPE_USER);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_mem_supports_dma);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Maps in a memory region such that it can be used for performing a DMA.
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_start(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
enum dma_data_direction dir /* Direction that the mapping will be going */
|
||||
) {
|
||||
int rc;
|
||||
|
||||
down(&memMap->lock);
|
||||
|
||||
DMA_MAP_PRINT("memMap: %p\n", memMap);
|
||||
|
||||
if (memMap->inUse) {
|
||||
printk(KERN_ERR "%s: memory map %p is already being used\n",
|
||||
__func__, memMap);
|
||||
rc = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
|
||||
memMap->inUse = 1;
|
||||
memMap->dir = dir;
|
||||
memMap->numRegionsUsed = 0;
|
||||
|
||||
rc = 0;
|
||||
|
||||
out:
|
||||
|
||||
DMA_MAP_PRINT("returning %d", rc);
|
||||
|
||||
up(&memMap->lock);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_map_start);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Adds a segment of memory to a memory map. Each segment is both
|
||||
* physically and virtually contiguous.
|
||||
*
|
||||
* @return 0 on success, error code otherwise.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
static int dma_map_add_segment(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
DMA_Region_t *region, /* Region that the segment belongs to */
|
||||
void *virtAddr, /* Virtual address of the segment being added */
|
||||
dma_addr_t physAddr, /* Physical address of the segment being added */
|
||||
size_t numBytes /* Number of bytes of the segment being added */
|
||||
) {
|
||||
DMA_Segment_t *segment;
|
||||
|
||||
DMA_MAP_PRINT("memMap:%p va:%p pa:0x%x #:%d\n", memMap, virtAddr,
|
||||
physAddr, numBytes);
|
||||
|
||||
/* Sanity check */
|
||||
|
||||
if (((unsigned long)virtAddr < (unsigned long)region->virtAddr)
|
||||
|| (((unsigned long)virtAddr + numBytes)) >
|
||||
((unsigned long)region->virtAddr + region->numBytes)) {
|
||||
printk(KERN_ERR
|
||||
"%s: virtAddr %p is outside region @ %p len: %d\n",
|
||||
__func__, virtAddr, region->virtAddr, region->numBytes);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (region->numSegmentsUsed > 0) {
|
||||
/* Check to see if this segment is physically contiguous with the previous one */
|
||||
|
||||
segment = ®ion->segment[region->numSegmentsUsed - 1];
|
||||
|
||||
if ((segment->physAddr + segment->numBytes) == physAddr) {
|
||||
/* It is - just add on to the end */
|
||||
|
||||
DMA_MAP_PRINT("appending %d bytes to last segment\n",
|
||||
numBytes);
|
||||
|
||||
segment->numBytes += numBytes;
|
||||
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* Reallocate to hold more segments, if required. */
|
||||
|
||||
if (region->numSegmentsUsed >= region->numSegmentsAllocated) {
|
||||
DMA_Segment_t *newSegment;
|
||||
size_t oldSize =
|
||||
region->numSegmentsAllocated * sizeof(*newSegment);
|
||||
int newAlloc = region->numSegmentsAllocated + 4;
|
||||
size_t newSize = newAlloc * sizeof(*newSegment);
|
||||
|
||||
newSegment = kmalloc(newSize, GFP_KERNEL);
|
||||
if (newSegment == NULL) {
|
||||
return -ENOMEM;
|
||||
}
|
||||
memcpy(newSegment, region->segment, oldSize);
|
||||
memset(&((uint8_t *) newSegment)[oldSize], 0,
|
||||
newSize - oldSize);
|
||||
kfree(region->segment);
|
||||
|
||||
region->numSegmentsAllocated = newAlloc;
|
||||
region->segment = newSegment;
|
||||
}
|
||||
|
||||
segment = ®ion->segment[region->numSegmentsUsed];
|
||||
region->numSegmentsUsed++;
|
||||
|
||||
segment->virtAddr = virtAddr;
|
||||
segment->physAddr = physAddr;
|
||||
segment->numBytes = numBytes;
|
||||
|
||||
DMA_MAP_PRINT("returning success\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Adds a region of memory to a memory map. Each region is virtually
|
||||
* contiguous, but not necessarily physically contiguous.
|
||||
*
|
||||
* @return 0 on success, error code otherwise.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
void *mem, /* Virtual address that we want to get a map of */
|
||||
size_t numBytes /* Number of bytes being mapped */
|
||||
) {
|
||||
unsigned long addr = (unsigned long)mem;
|
||||
unsigned int offset;
|
||||
int rc = 0;
|
||||
DMA_Region_t *region;
|
||||
dma_addr_t physAddr;
|
||||
|
||||
down(&memMap->lock);
|
||||
|
||||
DMA_MAP_PRINT("memMap:%p va:%p #:%d\n", memMap, mem, numBytes);
|
||||
|
||||
if (!memMap->inUse) {
|
||||
printk(KERN_ERR "%s: Make sure you call dma_map_start first\n",
|
||||
__func__);
|
||||
rc = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Reallocate to hold more regions. */
|
||||
|
||||
if (memMap->numRegionsUsed >= memMap->numRegionsAllocated) {
|
||||
DMA_Region_t *newRegion;
|
||||
size_t oldSize =
|
||||
memMap->numRegionsAllocated * sizeof(*newRegion);
|
||||
int newAlloc = memMap->numRegionsAllocated + 4;
|
||||
size_t newSize = newAlloc * sizeof(*newRegion);
|
||||
|
||||
newRegion = kmalloc(newSize, GFP_KERNEL);
|
||||
if (newRegion == NULL) {
|
||||
rc = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
memcpy(newRegion, memMap->region, oldSize);
|
||||
memset(&((uint8_t *) newRegion)[oldSize], 0, newSize - oldSize);
|
||||
|
||||
kfree(memMap->region);
|
||||
|
||||
memMap->numRegionsAllocated = newAlloc;
|
||||
memMap->region = newRegion;
|
||||
}
|
||||
|
||||
region = &memMap->region[memMap->numRegionsUsed];
|
||||
memMap->numRegionsUsed++;
|
||||
|
||||
offset = addr & ~PAGE_MASK;
|
||||
|
||||
region->memType = dma_mem_type(mem);
|
||||
region->virtAddr = mem;
|
||||
region->numBytes = numBytes;
|
||||
region->numSegmentsUsed = 0;
|
||||
region->numLockedPages = 0;
|
||||
region->lockedPages = NULL;
|
||||
|
||||
switch (region->memType) {
|
||||
case DMA_MEM_TYPE_VMALLOC:
|
||||
{
|
||||
atomic_inc(&gDmaStatMemTypeVmalloc);
|
||||
|
||||
/* printk(KERN_ERR "%s: vmalloc'd pages are not supported\n", __func__); */
|
||||
|
||||
/* vmalloc'd pages are not physically contiguous */
|
||||
|
||||
rc = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
case DMA_MEM_TYPE_KMALLOC:
|
||||
{
|
||||
atomic_inc(&gDmaStatMemTypeKmalloc);
|
||||
|
||||
/* kmalloc'd pages are physically contiguous, so they'll have exactly */
|
||||
/* one segment */
|
||||
|
||||
#if ALLOW_MAP_OF_KMALLOC_MEMORY
|
||||
physAddr =
|
||||
dma_map_single(NULL, mem, numBytes, memMap->dir);
|
||||
rc = dma_map_add_segment(memMap, region, mem, physAddr,
|
||||
numBytes);
|
||||
#else
|
||||
rc = -EINVAL;
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
case DMA_MEM_TYPE_DMA:
|
||||
{
|
||||
/* dma_alloc_xxx pages are physically contiguous */
|
||||
|
||||
atomic_inc(&gDmaStatMemTypeCoherent);
|
||||
|
||||
physAddr = (vmalloc_to_pfn(mem) << PAGE_SHIFT) + offset;
|
||||
|
||||
dma_sync_single_for_cpu(NULL, physAddr, numBytes,
|
||||
memMap->dir);
|
||||
rc = dma_map_add_segment(memMap, region, mem, physAddr,
|
||||
numBytes);
|
||||
break;
|
||||
}
|
||||
|
||||
case DMA_MEM_TYPE_USER:
|
||||
{
|
||||
size_t firstPageOffset;
|
||||
size_t firstPageSize;
|
||||
struct page **pages;
|
||||
struct task_struct *userTask;
|
||||
|
||||
atomic_inc(&gDmaStatMemTypeUser);
|
||||
|
||||
#if 1
|
||||
/* If the pages are user pages, then the dma_mem_map_set_user_task function */
|
||||
/* must have been previously called. */
|
||||
|
||||
if (memMap->userTask == NULL) {
|
||||
printk(KERN_ERR
|
||||
"%s: must call dma_mem_map_set_user_task when using user-mode memory\n",
|
||||
__func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* User pages need to be locked. */
|
||||
|
||||
firstPageOffset =
|
||||
(unsigned long)region->virtAddr & (PAGE_SIZE - 1);
|
||||
firstPageSize = PAGE_SIZE - firstPageOffset;
|
||||
|
||||
region->numLockedPages = (firstPageOffset
|
||||
+ region->numBytes +
|
||||
PAGE_SIZE - 1) / PAGE_SIZE;
|
||||
pages =
|
||||
kmalloc(region->numLockedPages *
|
||||
sizeof(struct page *), GFP_KERNEL);
|
||||
|
||||
if (pages == NULL) {
|
||||
region->numLockedPages = 0;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
userTask = memMap->userTask;
|
||||
|
||||
down_read(&userTask->mm->mmap_sem);
|
||||
rc = get_user_pages(userTask, /* task */
|
||||
userTask->mm, /* mm */
|
||||
(unsigned long)region->virtAddr, /* start */
|
||||
region->numLockedPages, /* len */
|
||||
memMap->dir == DMA_FROM_DEVICE, /* write */
|
||||
0, /* force */
|
||||
pages, /* pages (array of pointers to page) */
|
||||
NULL); /* vmas */
|
||||
up_read(&userTask->mm->mmap_sem);
|
||||
|
||||
if (rc != region->numLockedPages) {
|
||||
kfree(pages);
|
||||
region->numLockedPages = 0;
|
||||
|
||||
if (rc >= 0) {
|
||||
rc = -EINVAL;
|
||||
}
|
||||
} else {
|
||||
uint8_t *virtAddr = region->virtAddr;
|
||||
size_t bytesRemaining;
|
||||
int pageIdx;
|
||||
|
||||
rc = 0; /* Since get_user_pages returns +ve number */
|
||||
|
||||
region->lockedPages = pages;
|
||||
|
||||
/* We've locked the user pages. Now we need to walk them and figure */
|
||||
/* out the physical addresses. */
|
||||
|
||||
/* The first page may be partial */
|
||||
|
||||
dma_map_add_segment(memMap,
|
||||
region,
|
||||
virtAddr,
|
||||
PFN_PHYS(page_to_pfn
|
||||
(pages[0])) +
|
||||
firstPageOffset,
|
||||
firstPageSize);
|
||||
|
||||
virtAddr += firstPageSize;
|
||||
bytesRemaining =
|
||||
region->numBytes - firstPageSize;
|
||||
|
||||
for (pageIdx = 1;
|
||||
pageIdx < region->numLockedPages;
|
||||
pageIdx++) {
|
||||
size_t bytesThisPage =
|
||||
(bytesRemaining >
|
||||
PAGE_SIZE ? PAGE_SIZE :
|
||||
bytesRemaining);
|
||||
|
||||
DMA_MAP_PRINT
|
||||
("pageIdx:%d pages[pageIdx]=%p pfn=%u phys=%u\n",
|
||||
pageIdx, pages[pageIdx],
|
||||
page_to_pfn(pages[pageIdx]),
|
||||
PFN_PHYS(page_to_pfn
|
||||
(pages[pageIdx])));
|
||||
|
||||
dma_map_add_segment(memMap,
|
||||
region,
|
||||
virtAddr,
|
||||
PFN_PHYS(page_to_pfn
|
||||
(pages
|
||||
[pageIdx])),
|
||||
bytesThisPage);
|
||||
|
||||
virtAddr += bytesThisPage;
|
||||
bytesRemaining -= bytesThisPage;
|
||||
}
|
||||
}
|
||||
#else
|
||||
printk(KERN_ERR
|
||||
"%s: User mode pages are not yet supported\n",
|
||||
__func__);
|
||||
|
||||
/* user pages are not physically contiguous */
|
||||
|
||||
rc = -EINVAL;
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
{
|
||||
printk(KERN_ERR "%s: Unsupported memory type: %d\n",
|
||||
__func__, region->memType);
|
||||
|
||||
rc = -EINVAL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (rc != 0) {
|
||||
memMap->numRegionsUsed--;
|
||||
}
|
||||
|
||||
out:
|
||||
|
||||
DMA_MAP_PRINT("returning %d\n", rc);
|
||||
|
||||
up(&memMap->lock);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_map_add_segment);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Maps in a memory region such that it can be used for performing a DMA.
|
||||
*
|
||||
* @return 0 on success, error code otherwise.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_mem(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
void *mem, /* Virtual address that we want to get a map of */
|
||||
size_t numBytes, /* Number of bytes being mapped */
|
||||
enum dma_data_direction dir /* Direction that the mapping will be going */
|
||||
) {
|
||||
int rc;
|
||||
|
||||
rc = dma_map_start(memMap, dir);
|
||||
if (rc == 0) {
|
||||
rc = dma_map_add_region(memMap, mem, numBytes);
|
||||
if (rc < 0) {
|
||||
/* Since the add fails, this function will fail, and the caller won't */
|
||||
/* call unmap, so we need to do it here. */
|
||||
|
||||
dma_unmap(memMap, 0);
|
||||
}
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_map_mem);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Setup a descriptor ring for a given memory map.
|
||||
*
|
||||
* It is assumed that the descriptor ring has already been initialized, and
|
||||
* this routine will only reallocate a new descriptor ring if the existing
|
||||
* one is too small.
|
||||
*
|
||||
* @return 0 on success, error code otherwise.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_create_descriptor_ring(DMA_Device_t dev, /* DMA device (where the ring is stored) */
|
||||
DMA_MemMap_t *memMap, /* Memory map that will be used */
|
||||
dma_addr_t devPhysAddr /* Physical address of device */
|
||||
) {
|
||||
int rc;
|
||||
int numDescriptors;
|
||||
DMA_DeviceAttribute_t *devAttr;
|
||||
DMA_Region_t *region;
|
||||
DMA_Segment_t *segment;
|
||||
dma_addr_t srcPhysAddr;
|
||||
dma_addr_t dstPhysAddr;
|
||||
int regionIdx;
|
||||
int segmentIdx;
|
||||
|
||||
devAttr = &DMA_gDeviceAttribute[dev];
|
||||
|
||||
down(&memMap->lock);
|
||||
|
||||
/* Figure out how many descriptors we need */
|
||||
|
||||
numDescriptors = 0;
|
||||
for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
|
||||
region = &memMap->region[regionIdx];
|
||||
|
||||
for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed;
|
||||
segmentIdx++) {
|
||||
segment = ®ion->segment[segmentIdx];
|
||||
|
||||
if (memMap->dir == DMA_TO_DEVICE) {
|
||||
srcPhysAddr = segment->physAddr;
|
||||
dstPhysAddr = devPhysAddr;
|
||||
} else {
|
||||
srcPhysAddr = devPhysAddr;
|
||||
dstPhysAddr = segment->physAddr;
|
||||
}
|
||||
|
||||
rc =
|
||||
dma_calculate_descriptor_count(dev, srcPhysAddr,
|
||||
dstPhysAddr,
|
||||
segment->
|
||||
numBytes);
|
||||
if (rc < 0) {
|
||||
printk(KERN_ERR
|
||||
"%s: dma_calculate_descriptor_count failed: %d\n",
|
||||
__func__, rc);
|
||||
goto out;
|
||||
}
|
||||
numDescriptors += rc;
|
||||
}
|
||||
}
|
||||
|
||||
/* Adjust the size of the ring, if it isn't big enough */
|
||||
|
||||
if (numDescriptors > devAttr->ring.descriptorsAllocated) {
|
||||
dma_free_descriptor_ring(&devAttr->ring);
|
||||
rc =
|
||||
dma_alloc_descriptor_ring(&devAttr->ring,
|
||||
numDescriptors);
|
||||
if (rc < 0) {
|
||||
printk(KERN_ERR
|
||||
"%s: dma_alloc_descriptor_ring failed: %d\n",
|
||||
__func__, rc);
|
||||
goto out;
|
||||
}
|
||||
} else {
|
||||
rc =
|
||||
dma_init_descriptor_ring(&devAttr->ring,
|
||||
numDescriptors);
|
||||
if (rc < 0) {
|
||||
printk(KERN_ERR
|
||||
"%s: dma_init_descriptor_ring failed: %d\n",
|
||||
__func__, rc);
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
/* Populate the descriptors */
|
||||
|
||||
for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
|
||||
region = &memMap->region[regionIdx];
|
||||
|
||||
for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed;
|
||||
segmentIdx++) {
|
||||
segment = ®ion->segment[segmentIdx];
|
||||
|
||||
if (memMap->dir == DMA_TO_DEVICE) {
|
||||
srcPhysAddr = segment->physAddr;
|
||||
dstPhysAddr = devPhysAddr;
|
||||
} else {
|
||||
srcPhysAddr = devPhysAddr;
|
||||
dstPhysAddr = segment->physAddr;
|
||||
}
|
||||
|
||||
rc =
|
||||
dma_add_descriptors(&devAttr->ring, dev,
|
||||
srcPhysAddr, dstPhysAddr,
|
||||
segment->numBytes);
|
||||
if (rc < 0) {
|
||||
printk(KERN_ERR
|
||||
"%s: dma_add_descriptors failed: %d\n",
|
||||
__func__, rc);
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
rc = 0;
|
||||
|
||||
out:
|
||||
|
||||
up(&memMap->lock);
|
||||
return rc;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_map_create_descriptor_ring);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Maps in a memory region such that it can be used for performing a DMA.
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
int dirtied /* non-zero if any of the pages were modified */
|
||||
) {
|
||||
|
||||
int rc = 0;
|
||||
int regionIdx;
|
||||
int segmentIdx;
|
||||
DMA_Region_t *region;
|
||||
DMA_Segment_t *segment;
|
||||
|
||||
down(&memMap->lock);
|
||||
|
||||
for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
|
||||
region = &memMap->region[regionIdx];
|
||||
|
||||
for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed;
|
||||
segmentIdx++) {
|
||||
segment = ®ion->segment[segmentIdx];
|
||||
|
||||
switch (region->memType) {
|
||||
case DMA_MEM_TYPE_VMALLOC:
|
||||
{
|
||||
printk(KERN_ERR
|
||||
"%s: vmalloc'd pages are not yet supported\n",
|
||||
__func__);
|
||||
rc = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
case DMA_MEM_TYPE_KMALLOC:
|
||||
{
|
||||
#if ALLOW_MAP_OF_KMALLOC_MEMORY
|
||||
dma_unmap_single(NULL,
|
||||
segment->physAddr,
|
||||
segment->numBytes,
|
||||
memMap->dir);
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
case DMA_MEM_TYPE_DMA:
|
||||
{
|
||||
dma_sync_single_for_cpu(NULL,
|
||||
segment->
|
||||
physAddr,
|
||||
segment->
|
||||
numBytes,
|
||||
memMap->dir);
|
||||
break;
|
||||
}
|
||||
|
||||
case DMA_MEM_TYPE_USER:
|
||||
{
|
||||
/* Nothing to do here. */
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
{
|
||||
printk(KERN_ERR
|
||||
"%s: Unsupported memory type: %d\n",
|
||||
__func__, region->memType);
|
||||
rc = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
segment->virtAddr = NULL;
|
||||
segment->physAddr = 0;
|
||||
segment->numBytes = 0;
|
||||
}
|
||||
|
||||
if (region->numLockedPages > 0) {
|
||||
int pageIdx;
|
||||
|
||||
/* Some user pages were locked. We need to go and unlock them now. */
|
||||
|
||||
for (pageIdx = 0; pageIdx < region->numLockedPages;
|
||||
pageIdx++) {
|
||||
struct page *page =
|
||||
region->lockedPages[pageIdx];
|
||||
|
||||
if (memMap->dir == DMA_FROM_DEVICE) {
|
||||
SetPageDirty(page);
|
||||
}
|
||||
page_cache_release(page);
|
||||
}
|
||||
kfree(region->lockedPages);
|
||||
region->numLockedPages = 0;
|
||||
region->lockedPages = NULL;
|
||||
}
|
||||
|
||||
region->memType = DMA_MEM_TYPE_NONE;
|
||||
region->virtAddr = NULL;
|
||||
region->numBytes = 0;
|
||||
region->numSegmentsUsed = 0;
|
||||
}
|
||||
memMap->userTask = NULL;
|
||||
memMap->numRegionsUsed = 0;
|
||||
memMap->inUse = 0;
|
||||
|
||||
out:
|
||||
up(&memMap->lock);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dma_unmap);
|
||||
|
|
|
@ -26,15 +26,9 @@
|
|||
/* ---- Include Files ---------------------------------------------------- */
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/semaphore.h>
|
||||
#include <csp/dmacHw.h>
|
||||
#include <mach/timer.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/pagemap.h>
|
||||
|
||||
/* ---- Constants and Types ---------------------------------------------- */
|
||||
|
||||
|
@ -111,78 +105,6 @@ typedef struct {
|
|||
|
||||
} DMA_DescriptorRing_t;
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* The DMA_MemType_t and DMA_MemMap_t are helper structures used to setup
|
||||
* DMA chains from a variety of memory sources.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#define DMA_MEM_MAP_MIN_SIZE 4096 /* Pages less than this size are better */
|
||||
/* off not being DMA'd. */
|
||||
|
||||
typedef enum {
|
||||
DMA_MEM_TYPE_NONE, /* Not a valid setting */
|
||||
DMA_MEM_TYPE_VMALLOC, /* Memory came from vmalloc call */
|
||||
DMA_MEM_TYPE_KMALLOC, /* Memory came from kmalloc call */
|
||||
DMA_MEM_TYPE_DMA, /* Memory came from dma_alloc_xxx call */
|
||||
DMA_MEM_TYPE_USER, /* Memory came from user space. */
|
||||
|
||||
} DMA_MemType_t;
|
||||
|
||||
/* A segment represents a physically and virtually contiguous chunk of memory. */
|
||||
/* i.e. each segment can be DMA'd */
|
||||
/* A user of the DMA code will add memory regions. Each region may need to be */
|
||||
/* represented by one or more segments. */
|
||||
|
||||
typedef struct {
|
||||
void *virtAddr; /* Virtual address used for this segment */
|
||||
dma_addr_t physAddr; /* Physical address this segment maps to */
|
||||
size_t numBytes; /* Size of the segment, in bytes */
|
||||
|
||||
} DMA_Segment_t;
|
||||
|
||||
/* A region represents a virtually contiguous chunk of memory, which may be */
|
||||
/* made up of multiple segments. */
|
||||
|
||||
typedef struct {
|
||||
DMA_MemType_t memType;
|
||||
void *virtAddr;
|
||||
size_t numBytes;
|
||||
|
||||
/* Each region (virtually contiguous) consists of one or more segments. Each */
|
||||
/* segment is virtually and physically contiguous. */
|
||||
|
||||
int numSegmentsUsed;
|
||||
int numSegmentsAllocated;
|
||||
DMA_Segment_t *segment;
|
||||
|
||||
/* When a region corresponds to user memory, we need to lock all of the pages */
|
||||
/* down before we can figure out the physical addresses. The lockedPage array contains */
|
||||
/* the pages that were locked, and which subsequently need to be unlocked once the */
|
||||
/* memory is unmapped. */
|
||||
|
||||
unsigned numLockedPages;
|
||||
struct page **lockedPages;
|
||||
|
||||
} DMA_Region_t;
|
||||
|
||||
typedef struct {
|
||||
int inUse; /* Is this mapping currently being used? */
|
||||
struct semaphore lock; /* Acquired when using this structure */
|
||||
enum dma_data_direction dir; /* Direction this transfer is intended for */
|
||||
|
||||
/* In the event that we're mapping user memory, we need to know which task */
|
||||
/* the memory is for, so that we can obtain the correct mm locks. */
|
||||
|
||||
struct task_struct *userTask;
|
||||
|
||||
int numRegionsUsed;
|
||||
int numRegionsAllocated;
|
||||
DMA_Region_t *region;
|
||||
|
||||
} DMA_MemMap_t;
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* The DMA_DeviceAttribute_t contains information which describes a
|
||||
|
@ -568,124 +490,6 @@ int dma_alloc_double_dst_descriptors(DMA_Handle_t handle, /* DMA Handle */
|
|||
size_t numBytes /* Number of bytes in each destination buffer */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Initializes a DMA_MemMap_t data structure
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_init_mem_map(DMA_MemMap_t *memMap /* Stores state information about the map */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Releases any memory currently being held by a memory mapping structure.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_term_mem_map(DMA_MemMap_t *memMap /* Stores state information about the map */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Looks at a memory address and categorizes it.
|
||||
*
|
||||
* @return One of the values from the DMA_MemType_t enumeration.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
DMA_MemType_t dma_mem_type(void *addr);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Sets the process (aka userTask) associated with a mem map. This is
|
||||
* required if user-mode segments will be added to the mapping.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
static inline void dma_mem_map_set_user_task(DMA_MemMap_t *memMap,
|
||||
struct task_struct *task)
|
||||
{
|
||||
memMap->userTask = task;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Looks at a memory address and determines if we support DMA'ing to/from
|
||||
* that type of memory.
|
||||
*
|
||||
* @return boolean -
|
||||
* return value != 0 means dma supported
|
||||
* return value == 0 means dma not supported
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_mem_supports_dma(void *addr);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Initializes a memory map for use. Since this function acquires a
|
||||
* sempaphore within the memory map, it is VERY important that dma_unmap
|
||||
* be called when you're finished using the map.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_start(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
enum dma_data_direction dir /* Direction that the mapping will be going */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Adds a segment of memory to a memory map.
|
||||
*
|
||||
* @return 0 on success, error code otherwise.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
void *mem, /* Virtual address that we want to get a map of */
|
||||
size_t numBytes /* Number of bytes being mapped */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Creates a descriptor ring from a memory mapping.
|
||||
*
|
||||
* @return 0 on success, error code otherwise.
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_create_descriptor_ring(DMA_Device_t dev, /* DMA device (where the ring is stored) */
|
||||
DMA_MemMap_t *memMap, /* Memory map that will be used */
|
||||
dma_addr_t devPhysAddr /* Physical address of device */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Maps in a memory region such that it can be used for performing a DMA.
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_map_mem(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
void *addr, /* Virtual address that we want to get a map of */
|
||||
size_t count, /* Number of bytes being mapped */
|
||||
enum dma_data_direction dir /* Direction that the mapping will be going */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Maps in a memory region such that it can be used for performing a DMA.
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
/****************************************************************************/
|
||||
|
||||
int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
|
||||
int dirtied /* non-zero if any of the pages were modified */
|
||||
);
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Initiates a transfer when the descriptors have already been setup.
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#include <mach/aemif.h>
|
||||
#include <mach/spi.h>
|
||||
|
||||
#define DA850_EVM_PHY_ID "0:00"
|
||||
#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
|
||||
#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
|
||||
#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
|
||||
|
||||
|
|
|
@ -54,7 +54,7 @@ static inline int have_tvp7002(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#define DM365_EVM_PHY_ID "0:01"
|
||||
#define DM365_EVM_PHY_ID "davinci_mdio-0:01"
|
||||
/*
|
||||
* A MAX-II CPLD is used for various board control functions.
|
||||
*/
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
#include <mach/usb.h>
|
||||
#include <mach/aemif.h>
|
||||
|
||||
#define DM644X_EVM_PHY_ID "0:01"
|
||||
#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
|
||||
#define LXT971_PHY_ID (0x001378e2)
|
||||
#define LXT971_PHY_MASK (0xfffffff0)
|
||||
|
||||
|
|
|
@ -736,7 +736,7 @@ static struct davinci_uart_config uart_config __initdata = {
|
|||
.enabled_uarts = (1 << 0),
|
||||
};
|
||||
|
||||
#define DM646X_EVM_PHY_ID "0:01"
|
||||
#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
|
||||
/*
|
||||
* The following EDMA channels/slots are not being used by drivers (for
|
||||
* example: Timer, GPIO, UART events etc) on dm646x, hence they are being
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include <mach/mmc.h>
|
||||
#include <mach/usb.h>
|
||||
|
||||
#define NEUROS_OSD2_PHY_ID "0:01"
|
||||
#define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
|
||||
#define LXT971_PHY_ID 0x001378e2
|
||||
#define LXT971_PHY_MASK 0xfffffff0
|
||||
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
#include <mach/da8xx.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#define HAWKBOARD_PHY_ID "0:07"
|
||||
#define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
|
||||
#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
|
||||
#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
|
||||
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
#include <mach/mux.h>
|
||||
#include <mach/usb.h>
|
||||
|
||||
#define SFFSDR_PHY_ID "0:01"
|
||||
#define SFFSDR_PHY_ID "davinci_mdio-0:01"
|
||||
static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
|
||||
/* U-Boot Environment: Block 0
|
||||
* UBL: Block 1
|
||||
|
|
|
@ -153,34 +153,6 @@ static struct clk pll1_sysclk3 = {
|
|||
.div_reg = PLLDIV3,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk4 = {
|
||||
.name = "pll1_sysclk4",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV4,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk5 = {
|
||||
.name = "pll1_sysclk5",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV5,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk6 = {
|
||||
.name = "pll0_sysclk6",
|
||||
.parent = &pll0_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV6,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk7 = {
|
||||
.name = "pll1_sysclk7",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV7,
|
||||
};
|
||||
|
||||
static struct clk i2c0_clk = {
|
||||
.name = "i2c0",
|
||||
.parent = &pll0_aux_clk,
|
||||
|
@ -397,10 +369,6 @@ static struct clk_lookup da850_clks[] = {
|
|||
CLK(NULL, "pll1_aux", &pll1_aux_clk),
|
||||
CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
|
||||
CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
|
||||
CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
|
||||
CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
|
||||
CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
|
||||
CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
|
||||
CLK("i2c_davinci.1", NULL, &i2c0_clk),
|
||||
CLK(NULL, "timer0", &timerp64_0_clk),
|
||||
CLK("watchdog", NULL, &timerp64_1_clk),
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include <asm/mach/arch.h>
|
||||
#include <linux/irq.h>
|
||||
#include <plat/time.h>
|
||||
#include <plat/ehci-orion.h>
|
||||
#include <plat/common.h>
|
||||
#include <plat/addr-map.h>
|
||||
#include "common.h"
|
||||
|
@ -71,7 +72,7 @@ void __init dove_map_io(void)
|
|||
****************************************************************************/
|
||||
void __init dove_ehci0_init(void)
|
||||
{
|
||||
orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
|
||||
orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include <mach/hardware.h>
|
||||
#include <mach/fb.h>
|
||||
#include <mach/ep93xx_spi.h>
|
||||
#include <mach/gpio-ep93xx.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -153,7 +154,6 @@ static struct i2c_board_info vision_i2c_info[] __initdata = {
|
|||
}, {
|
||||
I2C_BOARD_INFO("pca9539", 0x74),
|
||||
.platform_data = &pca953x_74_gpio_data,
|
||||
.irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)),
|
||||
}, {
|
||||
I2C_BOARD_INFO("pca9539", 0x75),
|
||||
.platform_data = &pca953x_75_gpio_data,
|
||||
|
@ -348,6 +348,8 @@ static void __init vision_init_machine(void)
|
|||
"pca9539:74"))
|
||||
pr_warn("cannot request interrupt gpio for pca9539:74\n");
|
||||
|
||||
vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
|
||||
|
||||
ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
|
||||
ARRAY_SIZE(vision_i2c_info));
|
||||
ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
|
||||
#include "common.h"
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static struct sleep_save exynos4210_clock_save[] = {
|
||||
SAVE_ITEM(S5P_CLKSRC_IMAGE),
|
||||
SAVE_ITEM(S5P_CLKSRC_LCD1),
|
||||
|
@ -42,6 +43,7 @@ static struct sleep_save exynos4210_clock_save[] = {
|
|||
SAVE_ITEM(S5P_CLKGATE_IP_LCD1),
|
||||
SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210),
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct clksrc_clk *sysclks[] = {
|
||||
/* nothing here yet */
|
||||
|
|
|
@ -32,12 +32,14 @@
|
|||
|
||||
#include "common.h"
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static struct sleep_save exynos4212_clock_save[] = {
|
||||
SAVE_ITEM(S5P_CLKSRC_IMAGE),
|
||||
SAVE_ITEM(S5P_CLKDIV_IMAGE),
|
||||
SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212),
|
||||
SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212),
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct clk *clk_src_mpll_user_list[] = {
|
||||
[0] = &clk_fin_mpll,
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
|
||||
#include "common.h"
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static struct sleep_save exynos4_clock_save[] = {
|
||||
SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
|
||||
SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
|
||||
|
@ -93,6 +94,7 @@ static struct sleep_save exynos4_clock_save[] = {
|
|||
SAVE_ITEM(S5P_CLKGATE_SCLKCPU),
|
||||
SAVE_ITEM(S5P_CLKGATE_IP_CPU),
|
||||
};
|
||||
#endif
|
||||
|
||||
struct clk clk_sclk_hdmi27m = {
|
||||
.name = "sclk_hdmi27m",
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/io.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/smp_plat.h>
|
||||
|
||||
#include <mach/regs-pmu.h>
|
||||
|
||||
|
|
|
@ -15,11 +15,13 @@
|
|||
#include <linux/serial_core.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <mach/map.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/regs-serial.h>
|
||||
#include <plat/exynos4.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
/*
|
||||
* The following lookup table is used to override device names when devices
|
||||
|
@ -60,7 +62,7 @@ static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
|
|||
|
||||
static void __init exynos4210_dt_map_io(void)
|
||||
{
|
||||
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
|
||||
exynos_init_io(NULL, 0);
|
||||
s3c24xx_init_clocks(24000000);
|
||||
}
|
||||
|
||||
|
@ -79,7 +81,9 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
|
|||
/* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
|
||||
.init_irq = exynos4_init_irq,
|
||||
.map_io = exynos4210_dt_map_io,
|
||||
.handle_irq = gic_handle_irq,
|
||||
.init_machine = exynos4210_dt_machine_init,
|
||||
.timer = &exynos4_timer,
|
||||
.dt_compat = exynos4210_dt_compat,
|
||||
.restart = exynos4_restart,
|
||||
MACHINE_END
|
||||
|
|
|
@ -220,14 +220,14 @@ static struct s3c_fb_pd_win nuri_fb_win0 = {
|
|||
.lower_margin = 1,
|
||||
.hsync_len = 48,
|
||||
.vsync_len = 3,
|
||||
.xres = 1280,
|
||||
.yres = 800,
|
||||
.xres = 1024,
|
||||
.yres = 600,
|
||||
.refresh = 60,
|
||||
},
|
||||
.max_bpp = 24,
|
||||
.default_bpp = 16,
|
||||
.virtual_x = 1280,
|
||||
.virtual_y = 800,
|
||||
.virtual_x = 1024,
|
||||
.virtual_y = 2 * 600,
|
||||
};
|
||||
|
||||
static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
|
||||
|
|
|
@ -910,7 +910,7 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = {
|
|||
.bus_type = FIMC_MIPI_CSI2,
|
||||
.board_info = &m5mols_board_info,
|
||||
.i2c_bus_num = 0,
|
||||
.clk_frequency = 21600000UL,
|
||||
.clk_frequency = 24000000UL,
|
||||
.csi_data_align = 32,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/smp_scu.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
|
|
@ -206,7 +206,7 @@ static void exynos4_pm_prepare(void)
|
|||
|
||||
}
|
||||
|
||||
static int exynos4_pm_add(struct device *dev)
|
||||
static int exynos4_pm_add(struct device *dev, struct subsys_interface *sif)
|
||||
{
|
||||
pm_cpu_prep = exynos4_pm_prepare;
|
||||
pm_cpu_sleep = exynos4_cpu_suspend;
|
||||
|
@ -384,7 +384,9 @@ static void exynos4_pm_resume(void)
|
|||
|
||||
exynos4_restore_pll();
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
scu_enable(S5P_VA_SCU);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/smp.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/smp_scu.h>
|
||||
#include <asm/hardware/arm_timer.h>
|
||||
#include <asm/hardware/timer-sp.h>
|
||||
|
@ -72,9 +73,7 @@ static void __init highbank_map_io(void)
|
|||
|
||||
void highbank_set_cpu_jump(int cpu, void *jump_addr)
|
||||
{
|
||||
#ifdef CONFIG_SMP
|
||||
cpu = cpu_logical_map(cpu);
|
||||
#endif
|
||||
writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
|
||||
__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
|
||||
outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
|
||||
|
|
|
@ -22,6 +22,18 @@ config ARCH_MX25
|
|||
config MACH_MX27
|
||||
bool
|
||||
|
||||
config ARCH_MX5
|
||||
bool
|
||||
|
||||
config ARCH_MX50
|
||||
bool
|
||||
|
||||
config ARCH_MX51
|
||||
bool
|
||||
|
||||
config ARCH_MX53
|
||||
bool
|
||||
|
||||
config SOC_IMX1
|
||||
bool
|
||||
select ARCH_MX1
|
||||
|
@ -73,6 +85,31 @@ config SOC_IMX35
|
|||
select MXC_AVIC
|
||||
select SMP_ON_UP if SMP
|
||||
|
||||
config SOC_IMX5
|
||||
select CPU_V7
|
||||
select MXC_TZIC
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select ARCH_MXC_AUDMUX_V2
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_MX5
|
||||
bool
|
||||
|
||||
config SOC_IMX50
|
||||
bool
|
||||
select SOC_IMX5
|
||||
select ARCH_MX50
|
||||
|
||||
config SOC_IMX51
|
||||
bool
|
||||
select SOC_IMX5
|
||||
select ARCH_MX5
|
||||
select ARCH_MX51
|
||||
|
||||
config SOC_IMX53
|
||||
bool
|
||||
select SOC_IMX5
|
||||
select ARCH_MX5
|
||||
select ARCH_MX53
|
||||
|
||||
if ARCH_IMX_V4_V5
|
||||
|
||||
|
@ -592,6 +629,207 @@ config MACH_VPR200
|
|||
Include support for VPR200 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
comment "i.MX5 platforms:"
|
||||
|
||||
config MACH_MX50_RDP
|
||||
bool "Support MX50 reference design platform"
|
||||
depends on BROKEN
|
||||
select SOC_IMX50
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Include support for MX50 reference design platform (RDP) board. This
|
||||
includes specific configurations for the board and its peripherals.
|
||||
|
||||
comment "i.MX51 machines:"
|
||||
|
||||
config MACH_IMX51_DT
|
||||
bool "Support i.MX51 platforms from device tree"
|
||||
select SOC_IMX51
|
||||
select USE_OF
|
||||
select MACH_MX51_BABBAGE
|
||||
help
|
||||
Include support for Freescale i.MX51 based platforms
|
||||
using the device tree for discovery
|
||||
|
||||
config MACH_MX51_BABBAGE
|
||||
bool "Support MX51 BABBAGE platforms"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Include support for MX51 Babbage platform, also known as MX51EVK in
|
||||
u-boot. This includes specific configurations for the board and its
|
||||
peripherals.
|
||||
|
||||
config MACH_MX51_3DS
|
||||
bool "Support MX51PDK (3DS)"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_DEBUG_BOARD
|
||||
help
|
||||
Include support for MX51PDK (3DS) platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_EUKREA_CPUIMX51
|
||||
bool "Support Eukrea CPUIMX51 module"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Include support for Eukrea CPUIMX51 platform. This includes
|
||||
specific configurations for the module and its peripherals.
|
||||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
depends on MACH_EUKREA_CPUIMX51
|
||||
default MACH_EUKREA_MBIMX51_BASEBOARD
|
||||
|
||||
config MACH_EUKREA_MBIMX51_BASEBOARD
|
||||
prompt "Eukrea MBIMX51 development board"
|
||||
bool
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMX51 evaluation board.
|
||||
|
||||
endchoice
|
||||
|
||||
config MACH_EUKREA_CPUIMX51SD
|
||||
bool "Support Eukrea CPUIMX51SD module"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Include support for Eukrea CPUIMX51SD platform. This includes
|
||||
specific configurations for the module and its peripherals.
|
||||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
depends on MACH_EUKREA_CPUIMX51SD
|
||||
default MACH_EUKREA_MBIMXSD51_BASEBOARD
|
||||
|
||||
config MACH_EUKREA_MBIMXSD51_BASEBOARD
|
||||
prompt "Eukrea MBIMXSD development board"
|
||||
bool
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMXSD evaluation board.
|
||||
|
||||
endchoice
|
||||
|
||||
config MX51_EFIKA_COMMON
|
||||
bool
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_PATA_IMX
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
|
||||
config MACH_MX51_EFIKAMX
|
||||
bool "Support MX51 Genesi Efika MX nettop"
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MX51_EFIKA_COMMON
|
||||
help
|
||||
Include support for Genesi Efika MX nettop. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX51_EFIKASB
|
||||
bool "Support MX51 Genesi Efika Smartbook"
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MX51_EFIKA_COMMON
|
||||
help
|
||||
Include support for Genesi Efika Smartbook. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
comment "i.MX53 machines:"
|
||||
|
||||
config MACH_IMX53_DT
|
||||
bool "Support i.MX53 platforms from device tree"
|
||||
select SOC_IMX53
|
||||
select USE_OF
|
||||
select MACH_MX53_ARD
|
||||
select MACH_MX53_EVK
|
||||
select MACH_MX53_LOCO
|
||||
select MACH_MX53_SMD
|
||||
help
|
||||
Include support for Freescale i.MX53 based platforms
|
||||
using the device tree for discovery
|
||||
|
||||
config MACH_MX53_EVK
|
||||
bool "Support MX53 EVK platforms"
|
||||
select SOC_IMX53
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
Include support for MX53 EVK platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX53_SMD
|
||||
bool "Support MX53 SMD platforms"
|
||||
select SOC_IMX53
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
help
|
||||
Include support for MX53 SMD platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX53_LOCO
|
||||
bool "Support MX53 LOCO platforms"
|
||||
select SOC_IMX53
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
Include support for MX53 LOCO platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX53_ARD
|
||||
bool "Support MX53 ARD platforms"
|
||||
select SOC_IMX53
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
help
|
||||
Include support for MX53 ARD platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
comment "i.MX6 family:"
|
||||
|
||||
config SOC_IMX6Q
|
||||
|
|
|
@ -11,6 +11,8 @@ obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
|
|||
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
|
||||
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o
|
||||
|
||||
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clock-mx51-mx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
|
||||
|
||||
|
@ -75,3 +77,22 @@ obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o
|
|||
ifeq ($(CONFIG_PM),y)
|
||||
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
|
||||
endif
|
||||
|
||||
# i.MX5 based machines
|
||||
obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
|
||||
obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o
|
||||
obj-$(CONFIG_MACH_MX53_EVK) += mach-mx53_evk.o
|
||||
obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o
|
||||
obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o
|
||||
obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += mach-cpuimx51.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
|
||||
obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
|
||||
obj-$(CONFIG_MACH_MX51_EFIKAMX) += mach-mx51_efikamx.o
|
||||
obj-$(CONFIG_MACH_MX51_EFIKASB) += mach-mx51_efikasb.o
|
||||
obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
|
||||
|
||||
obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
|
||||
obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
|
||||
|
|
|
@ -22,6 +22,18 @@ zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
|
|||
params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
|
||||
|
||||
zreladdr-$(CONFIG_SOC_IMX50) += 0x70008000
|
||||
params_phys-$(CONFIG_SOC_IMX50) := 0x70000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX50) := 0x70800000
|
||||
|
||||
zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000
|
||||
params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
|
||||
|
||||
zreladdr-$(CONFIG_SOC_IMX53) += 0x70008000
|
||||
params_phys-$(CONFIG_SOC_IMX53) := 0x70000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX53) := 0x70800000
|
||||
|
||||
zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
|
||||
params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
|
||||
initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
|
||||
|
|
|
@ -814,6 +814,16 @@ DEF_PFD(pll3_pfd_540m, PFD_480, PFD1, &pll3_usb_otg);
|
|||
DEF_PFD(pll3_pfd_508m, PFD_480, PFD2, &pll3_usb_otg);
|
||||
DEF_PFD(pll3_pfd_454m, PFD_480, PFD3, &pll3_usb_otg);
|
||||
|
||||
static unsigned long twd_clk_get_rate(struct clk *clk)
|
||||
{
|
||||
return clk_get_rate(clk->parent) / 2;
|
||||
}
|
||||
|
||||
static struct clk twd_clk = {
|
||||
.parent = &arm_clk,
|
||||
.get_rate = twd_clk_get_rate,
|
||||
};
|
||||
|
||||
static unsigned long pll2_200m_get_rate(struct clk *clk)
|
||||
{
|
||||
return clk_get_rate(clk->parent) / 2;
|
||||
|
@ -1894,6 +1904,7 @@ static struct clk_lookup lookups[] = {
|
|||
_REGISTER_CLOCK("20ec000.sdma", NULL, sdma_clk),
|
||||
_REGISTER_CLOCK("20bc000.wdog", NULL, dummy_clk),
|
||||
_REGISTER_CLOCK("20c0000.wdog", NULL, dummy_clk),
|
||||
_REGISTER_CLOCK("smp_twd", NULL, twd_clk),
|
||||
_REGISTER_CLOCK(NULL, "ckih", ckih_clk),
|
||||
_REGISTER_CLOCK(NULL, "ckil_clk", ckil_clk),
|
||||
_REGISTER_CLOCK(NULL, "aips_tz1_clk", aips_tz1_clk),
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue