powepc/booke: Separate out E.HV check and ivor setup code.
Move the E.HV check and CPU_FTR_EMB_HV flag manipulation to the cpu setup code. Create a separate routine for E.HV ivors setup. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>hifive-unleashed-5.1
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d0832a7507
commit
7e0f4872a3
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@ -16,6 +16,8 @@
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/cputable.h>
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#include <asm/ppc_asm.h>
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#include <asm/ppc_asm.h>
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#include <asm/mmu-book3e.h>
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#include <asm/asm-offsets.h>
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_GLOBAL(__e500_icache_setup)
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_GLOBAL(__e500_icache_setup)
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mfspr r0, SPRN_L1CSR1
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mfspr r0, SPRN_L1CSR1
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@ -73,12 +75,33 @@ _GLOBAL(__setup_cpu_e500v2)
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mtlr r4
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mtlr r4
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blr
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blr
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_GLOBAL(__setup_cpu_e500mc)
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_GLOBAL(__setup_cpu_e500mc)
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mr r5, r4
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mflr r5
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mflr r4
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bl __e500_icache_setup
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bl __e500_icache_setup
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bl __e500_dcache_setup
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bl __e500_dcache_setup
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bl __setup_e500mc_ivors
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bl __setup_e500mc_ivors
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mtlr r4
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/*
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* We only want to touch IVOR38-41 if we're running on hardware
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* that supports category E.HV. The architectural way to determine
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* this is MMUCFG[LPIDSIZE].
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*/
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mfspr r3, SPRN_MMUCFG
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rlwinm. r3, r3, 0, MMUCFG_LPIDSIZE
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beq 1f
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bl __setup_ehv_ivors
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b 2f
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1:
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lwz r3, CPU_SPEC_FEATURES(r4)
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/* We need this check as cpu_setup is also called for
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* the secondary cores. So, if we have already cleared
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* the feature on the primary core, avoid doing it on the
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* secondary core.
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*/
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andis. r6, r3, CPU_FTR_EMB_HV@h
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beq 2f
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rlwinm r3, r3, 0, ~CPU_FTR_EMB_HV
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stw r3, CPU_SPEC_FEATURES(r4)
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2:
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mtlr r5
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blr
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blr
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#endif
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#endif
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/* Right now, restore and setup are the same thing */
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/* Right now, restore and setup are the same thing */
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@ -895,15 +895,11 @@ _GLOBAL(__setup_e500mc_ivors)
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mtspr SPRN_IVOR36,r3
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mtspr SPRN_IVOR36,r3
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li r3,CriticalDoorbell@l
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li r3,CriticalDoorbell@l
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mtspr SPRN_IVOR37,r3
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mtspr SPRN_IVOR37,r3
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sync
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blr
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/*
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/* setup ehv ivors for */
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* We only want to touch IVOR38-41 if we're running on hardware
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_GLOBAL(__setup_ehv_ivors)
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* that supports category E.HV. The architectural way to determine
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* this is MMUCFG[LPIDSIZE].
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*/
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mfspr r3, SPRN_MMUCFG
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andis. r3, r3, MMUCFG_LPIDSIZE@h
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beq no_hv
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li r3,GuestDoorbell@l
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li r3,GuestDoorbell@l
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mtspr SPRN_IVOR38,r3
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mtspr SPRN_IVOR38,r3
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li r3,CriticalGuestDoorbell@l
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li r3,CriticalGuestDoorbell@l
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@ -912,14 +908,8 @@ _GLOBAL(__setup_e500mc_ivors)
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mtspr SPRN_IVOR40,r3
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mtspr SPRN_IVOR40,r3
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li r3,Ehvpriv@l
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li r3,Ehvpriv@l
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mtspr SPRN_IVOR41,r3
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mtspr SPRN_IVOR41,r3
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skip_hv_ivors:
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sync
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sync
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blr
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blr
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no_hv:
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lwz r3, CPU_SPEC_FEATURES(r5)
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rlwinm r3, r3, 0, ~CPU_FTR_EMB_HV
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stw r3, CPU_SPEC_FEATURES(r5)
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b skip_hv_ivors
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#ifdef CONFIG_SPE
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#ifdef CONFIG_SPE
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/*
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/*
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