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ASoC: Add jd function for rt5663. 

Add initial setting for rt5663 jd to irq.

Signed-off-by: Jack Yu <jack.yu@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
hifive-unleashed-5.1
Jack Yu 2016-10-03 10:43:27 +08:00 committed by Mark Brown
parent 1001354ca3
commit 7e7e76bd56
2 changed files with 20 additions and 1 deletions
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11
sound/soc/codecs/rt5663.c
View File

@ -3140,12 +3140,21 @@ static int rt5663_i2c_probe(struct i2c_client *i2c,
RT5668_LDO1_DVO_0_9V | RT5668_AMP_HP_3X);
break;
case CODEC_TYPE_RT5663:
regmap_update_bits(rt5663->regmap, RT5663_DIG_MISC,
RT5668_DIG_GATE_CTRL_MASK, RT5668_DIG_GATE_CTRL_EN);
regmap_update_bits(rt5663->regmap, RT5663_AUTO_1MRC_CLK,
RT5668_IRQ_POW_SAV_MASK, RT5668_IRQ_POW_SAV_EN);
regmap_update_bits(rt5663->regmap, RT5663_IRQ_1,
RT5663_EN_IRQ_JD1_MASK, RT5663_EN_IRQ_JD1_EN);
regmap_update_bits(rt5663->regmap, RT5663_GPIO_1,
RT5663_GPIO1_TYPE_MASK, RT5663_GPIO1_TYPE_EN);
regmap_write(rt5663->regmap, RT5663_VREF_RECMIX, 0x0032);
regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa2be);
msleep(20);
regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf2be);
regmap_update_bits(rt5663->regmap, RT5663_GPIO_2,
RT5663_GP1_PIN_CONF_MASK, RT5663_GP1_PIN_CONF_OUTPUT);
RT5663_GP1_PIN_CONF_MASK | RT5663_SEL_GPIO1_MASK,
RT5663_GP1_PIN_CONF_OUTPUT | RT5663_SEL_GPIO1_EN);
/* DACREF LDO control */
regmap_update_bits(rt5663->regmap, RT5663_DACREF_LDO, 0x3e0e,
0x3a0a);

10
sound/soc/codecs/rt5663.h
View File

@ -996,11 +996,21 @@
#define RT5663_EN_IRQ_INLINE_NOR (0x1 << 3)
#define RT5663_EN_IRQ_INLINE_BYP (0x0 << 3)
/* RT5663: GPIO Control 1 (0x00c0) */
#define RT5663_GPIO1_TYPE_MASK (0x1 << 15)
#define RT5663_GPIO1_TYPE_SHIFT 15
#define RT5663_GPIO1_TYPE_EN (0x1 << 15)
#define RT5663_GPIO1_TYPE_DIS (0x0 << 15)
/* RT5663: IRQ Control 1 (0x00c1) */
#define RT5663_EN_IRQ_JD1_MASK (0x1 << 6)
#define RT5663_EN_IRQ_JD1_SHIFT 6
#define RT5663_EN_IRQ_JD1_EN (0x1 << 6)
#define RT5663_EN_IRQ_JD1_DIS (0x0 << 6)
#define RT5663_SEL_GPIO1_MASK (0x1 << 2)
#define RT5663_SEL_GPIO1_SHIFT 6
#define RT5663_SEL_GPIO1_EN (0x1 << 2)
#define RT5663_SEL_GPIO1_DIS (0x0 << 2)
/* RT5663: Inline Command Function 2 (0x00dc) */
#define RT5663_PWR_MIC_DET_MASK (0x1)