drm/i915: Move num_pipes to intel info
Requested by Daniel. v2: Fix incorrect num_pipe settings. (Chris) Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
a15326a57c
commit
7eb552aeae
|
@ -1630,14 +1630,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
mutex_init(&dev_priv->rps.hw_lock);
|
||||
mutex_init(&dev_priv->modeset_restore_lock);
|
||||
|
||||
if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
|
||||
dev_priv->num_pipe = 3;
|
||||
else if (IS_MOBILE(dev) || !IS_GEN2(dev))
|
||||
dev_priv->num_pipe = 2;
|
||||
else
|
||||
dev_priv->num_pipe = 1;
|
||||
|
||||
ret = drm_vblank_init(dev, dev_priv->num_pipe);
|
||||
ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
|
||||
if (ret)
|
||||
goto out_gem_unload;
|
||||
|
||||
|
|
|
@ -136,74 +136,74 @@ extern int intel_agp_enabled;
|
|||
.driver_data = (unsigned long) info }
|
||||
|
||||
static const struct intel_device_info intel_i830_info = {
|
||||
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
|
||||
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_845g_info = {
|
||||
.gen = 2,
|
||||
.gen = 2, .num_pipes = 1,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_i85x_info = {
|
||||
.gen = 2, .is_i85x = 1, .is_mobile = 1,
|
||||
.gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
|
||||
.cursor_needs_physical = 1,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_i865g_info = {
|
||||
.gen = 2,
|
||||
.gen = 2, .num_pipes = 1,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_i915g_info = {
|
||||
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1,
|
||||
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
};
|
||||
static const struct intel_device_info intel_i915gm_info = {
|
||||
.gen = 3, .is_mobile = 1,
|
||||
.gen = 3, .is_mobile = 1, .num_pipes = 2,
|
||||
.cursor_needs_physical = 1,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
.supports_tv = 1,
|
||||
};
|
||||
static const struct intel_device_info intel_i945g_info = {
|
||||
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1,
|
||||
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
};
|
||||
static const struct intel_device_info intel_i945gm_info = {
|
||||
.gen = 3, .is_i945gm = 1, .is_mobile = 1,
|
||||
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
|
||||
.has_hotplug = 1, .cursor_needs_physical = 1,
|
||||
.has_overlay = 1, .overlay_needs_physical = 1,
|
||||
.supports_tv = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_i965g_info = {
|
||||
.gen = 4, .is_broadwater = 1,
|
||||
.gen = 4, .is_broadwater = 1, .num_pipes = 2,
|
||||
.has_hotplug = 1,
|
||||
.has_overlay = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_i965gm_info = {
|
||||
.gen = 4, .is_crestline = 1,
|
||||
.gen = 4, .is_crestline = 1, .num_pipes = 2,
|
||||
.is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
|
||||
.has_overlay = 1,
|
||||
.supports_tv = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_g33_info = {
|
||||
.gen = 3, .is_g33 = 1,
|
||||
.gen = 3, .is_g33 = 1, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_overlay = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_g45_info = {
|
||||
.gen = 4, .is_g4x = 1, .need_gfx_hws = 1,
|
||||
.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
|
||||
.has_pipe_cxsr = 1, .has_hotplug = 1,
|
||||
.has_bsd_ring = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_gm45_info = {
|
||||
.gen = 4, .is_g4x = 1,
|
||||
.gen = 4, .is_g4x = 1, .num_pipes = 2,
|
||||
.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
|
||||
.has_pipe_cxsr = 1, .has_hotplug = 1,
|
||||
.supports_tv = 1,
|
||||
|
@ -211,26 +211,26 @@ static const struct intel_device_info intel_gm45_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_pineview_info = {
|
||||
.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
|
||||
.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_overlay = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_ironlake_d_info = {
|
||||
.gen = 5,
|
||||
.gen = 5, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_bsd_ring = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_ironlake_m_info = {
|
||||
.gen = 5, .is_mobile = 1,
|
||||
.gen = 5, .is_mobile = 1, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_fbc = 1,
|
||||
.has_bsd_ring = 1,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_sandybridge_d_info = {
|
||||
.gen = 6,
|
||||
.gen = 6, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_bsd_ring = 1,
|
||||
.has_blt_ring = 1,
|
||||
|
@ -239,7 +239,7 @@ static const struct intel_device_info intel_sandybridge_d_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_sandybridge_m_info = {
|
||||
.gen = 6, .is_mobile = 1,
|
||||
.gen = 6, .is_mobile = 1, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_fbc = 1,
|
||||
.has_bsd_ring = 1,
|
||||
|
@ -249,7 +249,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_ivybridge_d_info = {
|
||||
.is_ivybridge = 1, .gen = 7,
|
||||
.is_ivybridge = 1, .gen = 7, .num_pipes = 3,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_bsd_ring = 1,
|
||||
.has_blt_ring = 1,
|
||||
|
@ -258,7 +258,7 @@ static const struct intel_device_info intel_ivybridge_d_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_ivybridge_m_info = {
|
||||
.is_ivybridge = 1, .gen = 7, .is_mobile = 1,
|
||||
.is_ivybridge = 1, .gen = 7, .is_mobile = 1, .num_pipes = 3,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_fbc = 0, /* FBC is not enabled on Ivybridge mobile yet */
|
||||
.has_bsd_ring = 1,
|
||||
|
@ -268,7 +268,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_valleyview_m_info = {
|
||||
.gen = 7, .is_mobile = 1,
|
||||
.gen = 7, .is_mobile = 1, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_fbc = 0,
|
||||
.has_bsd_ring = 1,
|
||||
|
@ -279,7 +279,7 @@ static const struct intel_device_info intel_valleyview_m_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_valleyview_d_info = {
|
||||
.gen = 7,
|
||||
.gen = 7, .num_pipes = 2,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_fbc = 0,
|
||||
.has_bsd_ring = 1,
|
||||
|
@ -290,7 +290,7 @@ static const struct intel_device_info intel_valleyview_d_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_haswell_d_info = {
|
||||
.is_haswell = 1, .gen = 7,
|
||||
.is_haswell = 1, .gen = 7, .num_pipes = 3,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_bsd_ring = 1,
|
||||
.has_blt_ring = 1,
|
||||
|
@ -299,7 +299,7 @@ static const struct intel_device_info intel_haswell_d_info = {
|
|||
};
|
||||
|
||||
static const struct intel_device_info intel_haswell_m_info = {
|
||||
.is_haswell = 1, .gen = 7, .is_mobile = 1,
|
||||
.is_haswell = 1, .gen = 7, .is_mobile = 1, .num_pipes = 3,
|
||||
.need_gfx_hws = 1, .has_hotplug = 1,
|
||||
.has_bsd_ring = 1,
|
||||
.has_blt_ring = 1,
|
||||
|
|
|
@ -93,7 +93,7 @@ enum port {
|
|||
I915_GEM_DOMAIN_INSTRUCTION | \
|
||||
I915_GEM_DOMAIN_VERTEX)
|
||||
|
||||
#define for_each_pipe(p) for ((p) = 0; (p) < dev_priv->num_pipe; (p)++)
|
||||
#define for_each_pipe(p) for ((p) = 0; (p) < INTEL_INFO(dev)->num_pipes; (p)++)
|
||||
|
||||
#define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \
|
||||
list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
|
||||
|
@ -341,6 +341,7 @@ struct drm_i915_gt_funcs {
|
|||
|
||||
struct intel_device_info {
|
||||
u32 display_mmio_offset;
|
||||
u8 num_pipes:3;
|
||||
u8 gen;
|
||||
u8 is_mobile:1;
|
||||
u8 is_i85x:1;
|
||||
|
@ -912,7 +913,6 @@ typedef struct drm_i915_private {
|
|||
struct work_struct hotplug_work;
|
||||
bool enable_hotplug_processing;
|
||||
|
||||
int num_pipe;
|
||||
int num_pch_pll;
|
||||
|
||||
unsigned long cfb_size;
|
||||
|
|
|
@ -254,10 +254,9 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
|
|||
struct timeval *vblank_time,
|
||||
unsigned flags)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct drm_crtc *crtc;
|
||||
|
||||
if (pipe < 0 || pipe >= dev_priv->num_pipe) {
|
||||
if (pipe < 0 || pipe >= INTEL_INFO(dev)->num_pipes) {
|
||||
DRM_ERROR("Invalid crtc %d\n", pipe);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
|
@ -2346,10 +2346,10 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
|||
return 0;
|
||||
}
|
||||
|
||||
if(intel_crtc->plane > dev_priv->num_pipe) {
|
||||
if (intel_crtc->plane > INTEL_INFO(dev)->num_pipes) {
|
||||
DRM_ERROR("no plane for crtc: plane %d, num_pipes %d\n",
|
||||
intel_crtc->plane,
|
||||
dev_priv->num_pipe);
|
||||
INTEL_INFO(dev)->num_pipes);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -5390,7 +5390,7 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
|
|||
return false;
|
||||
}
|
||||
|
||||
if (dev_priv->num_pipe == 2)
|
||||
if (INTEL_INFO(dev)->num_pipes == 2)
|
||||
return true;
|
||||
|
||||
switch (intel_crtc->pipe) {
|
||||
|
@ -8887,9 +8887,10 @@ void intel_modeset_init(struct drm_device *dev)
|
|||
dev->mode_config.fb_base = dev_priv->gtt.mappable_base;
|
||||
|
||||
DRM_DEBUG_KMS("%d display pipe%s available.\n",
|
||||
dev_priv->num_pipe, dev_priv->num_pipe > 1 ? "s" : "");
|
||||
INTEL_INFO(dev)->num_pipes,
|
||||
INTEL_INFO(dev)->num_pipes > 1 ? "s" : "");
|
||||
|
||||
for (i = 0; i < dev_priv->num_pipe; i++) {
|
||||
for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) {
|
||||
intel_crtc_init(dev, i);
|
||||
ret = intel_plane_init(dev, i);
|
||||
if (ret)
|
||||
|
@ -8946,10 +8947,11 @@ static void intel_enable_pipe_a(struct drm_device *dev)
|
|||
static bool
|
||||
intel_check_plane_mapping(struct intel_crtc *crtc)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
u32 reg, val;
|
||||
|
||||
if (dev_priv->num_pipe == 1)
|
||||
if (INTEL_INFO(dev)->num_pipes == 1)
|
||||
return true;
|
||||
|
||||
reg = DSPCNTR(!crtc->plane);
|
||||
|
@ -9391,10 +9393,9 @@ intel_display_print_error_state(struct seq_file *m,
|
|||
struct drm_device *dev,
|
||||
struct intel_display_error_state *error)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
int i;
|
||||
|
||||
seq_printf(m, "Num Pipes: %d\n", dev_priv->num_pipe);
|
||||
seq_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev)->num_pipes);
|
||||
for_each_pipe(i) {
|
||||
seq_printf(m, "Pipe [%d]:\n", i);
|
||||
seq_printf(m, " CONF: %08x\n", error->pipe[i].conf);
|
||||
|
|
|
@ -225,7 +225,7 @@ int intel_fbdev_init(struct drm_device *dev)
|
|||
ifbdev->helper.funcs = &intel_fb_helper_funcs;
|
||||
|
||||
ret = drm_fb_helper_init(dev, &ifbdev->helper,
|
||||
dev_priv->num_pipe,
|
||||
INTEL_INFO(dev)->num_pipes,
|
||||
INTELFB_CONN_LIMIT);
|
||||
if (ret) {
|
||||
kfree(ifbdev);
|
||||
|
|
|
@ -338,7 +338,7 @@ void intel_panel_enable_backlight(struct drm_device *dev,
|
|||
if (tmp & BLM_PWM_ENABLE)
|
||||
goto set_level;
|
||||
|
||||
if (dev_priv->num_pipe == 3)
|
||||
if (INTEL_INFO(dev)->num_pipes == 3)
|
||||
tmp &= ~BLM_PIPE_SELECT_IVB;
|
||||
else
|
||||
tmp &= ~BLM_PIPE_SELECT;
|
||||
|
|
Loading…
Reference in a new issue