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drm/amdgpu: refine the PTE encoding of PRT for navi10 

Due to GCR change from navi10, the PTE encoding of PRT
needs change VSCTL = 01111 (was 0XX1X).

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
alistair/sunxi64-5.4-dsi
Jack Xiao 2019-02-22 15:34:00 +08:00 committed by Alex Deucher
parent 7596ab68ff
commit 7f95167ce1
2 changed files with 7 additions and 0 deletions
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5
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
View File

@ -1585,6 +1585,11 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
if ((mapping->flags & AMDGPU_PTE_PRT) &&
(adev->asic_type >= CHIP_VEGA10)) {
flags |= AMDGPU_PTE_PRT;
if (adev->asic_type >= CHIP_NAVI10) {
flags |= AMDGPU_PTE_SNOOPED;
flags |= AMDGPU_PTE_LOG;
flags |= AMDGPU_PTE_SYSTEM;
}
flags &= ~AMDGPU_PTE_VALID;
}

2
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
View File

@ -67,6 +67,8 @@ struct amdgpu_bo_list_entry;
/* PDE is handled as PTE for VEGA10 */
#define AMDGPU_PDE_PTE (1ULL << 54)
#define AMDGPU_PTE_LOG (1ULL << 55)
/* PTE is handled as PDE for VEGA10 (Translate Further) */
#define AMDGPU_PTE_TF (1ULL << 56)