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ARM: dts: sun4i: Add CSI1 controller and pinmux options 

The CSI controller driver now supports the second CSI controller, CSI1.

Add a device node for it. Pinmuxing options for the MCLK output, the
standard 8-bit interface, and a secondary 24-bit interface are included.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
alistair/sensors
Chen-Yu Tsai 2020-01-06 16:42:34 +08:00 committed by Maxime Ripard
parent 06dfaf1dc2
commit 7faf7fbf25
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1 changed files with 35 additions and 0 deletions
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35
arch/arm/boot/dts/sun4i-a10.dtsi
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@ -624,6 +624,16 @@
status = "disabled";
};
csi1: csi@1c1d000 {
compatible = "allwinner,sun4i-a10-csi1";
reg = <0x01c1d000 0x1000>;
interrupts = <43>;
clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>;
clock-names = "bus", "ram";
resets = <&ccu RST_CSI1>;
status = "disabled";
};
spi3: spi@1c1f000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c1f000 0x1000>;
@ -670,6 +680,31 @@
function = "can";
};
/omit-if-no-ref/
csi1_8bits_pg_pins: csi1-8bits-pg-pins {
pins = "PG0", "PG2", "PG3", "PG4", "PG5",
"PG6", "PG7", "PG8", "PG9", "PG10",
"PG11";
function = "csi1";
};
/omit-if-no-ref/
csi1_24bits_ph_pins: csi1-24bits-ph-pins {
pins = "PH0", "PH1", "PH2", "PH3", "PH4",
"PH5", "PH6", "PH7", "PH8", "PH9",
"PH10", "PH11", "PH12", "PH13", "PH14",
"PH15", "PH16", "PH17", "PH18", "PH19",
"PH20", "PH21", "PH22", "PH23", "PH24",
"PH25", "PH26", "PH27";
function = "csi1";
};
/omit-if-no-ref/
csi1_clk_pg_pin: csi1-clk-pg-pin {
pins = "PG1";
function = "csi1";
};
emac_pins: emac0-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",