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drm/amd/display: Prevent bandwidth overflow 

[Why]
At very high pixel clock, bandwidth calculation exceeds 32 bit size
and overflow value. This causes the resulting selection of link rate
to be inaccurate.

[How]
Change order of operation and use fixed point to deal with integer
accuracy. Also address bug found when forcing link rate.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
zero-sugar-mainline-defconfig
Chris Park 2020-11-24 20:11:25 -05:00 committed by Alex Deucher
parent 3083a9845e
commit 80089dd841
1 changed files with 5 additions and 2 deletions
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7
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View File

@ -3444,10 +3444,13 @@ uint32_t dc_bandwidth_in_kbps_from_timing(
{
uint32_t bits_per_channel = 0;
uint32_t kbps;
struct fixed31_32 link_bw_kbps;
if (timing->flags.DSC) {
kbps = (timing->pix_clk_100hz * timing->dsc_cfg.bits_per_pixel);
kbps = kbps / 160 + ((kbps % 160) ? 1 : 0);
link_bw_kbps = dc_fixpt_from_int(timing->pix_clk_100hz);
link_bw_kbps = dc_fixpt_div_int(link_bw_kbps, 160);
link_bw_kbps = dc_fixpt_mul_int(link_bw_kbps, timing->dsc_cfg.bits_per_pixel);
kbps = dc_fixpt_ceil(link_bw_kbps);
return kbps;
}