drm/amdgpu:Fixed wrong emit frame size for enc
Emit frame size should match with corresponding function, uvd_v6_0_enc_ring_emit_vm_flush has 5 amdgpu_ring_write Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1618,7 +1618,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_enc_ring_vm_funcs = {
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.set_wptr = uvd_v6_0_enc_ring_set_wptr,
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.emit_frame_size =
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4 + /* uvd_v6_0_enc_ring_emit_pipeline_sync */
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6 + /* uvd_v6_0_enc_ring_emit_vm_flush */
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5 + /* uvd_v6_0_enc_ring_emit_vm_flush */
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5 + 5 + /* uvd_v6_0_enc_ring_emit_fence x2 vm fence */
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1, /* uvd_v6_0_enc_ring_insert_end */
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.emit_ib_size = 5, /* uvd_v6_0_enc_ring_emit_ib */
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