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mmc: sdhci-acpi: Fix Braswell eMMC timeout clock frequency 

Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.  A similar fix was done
for sdhci-pci, however in the sdhci-acpi case the
HID/UID is not unique so the capabilities register
values are matched also.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
hifive-unleashed-5.1
Adrian Hunter 2014-10-06 15:23:07 +03:00 committed by Ulf Hansson
parent 7dafca835a
commit 8024379e0a
1 changed files with 5 additions and 0 deletions
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5
drivers/mmc/host/sdhci-acpi.c
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@ -137,6 +137,11 @@ static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
/* Platform specific code during emmc proble slot goes here */
if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
return 0;
}