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powerpc/io: Add __raw_writeq_be() __raw_rm_writeq_be() 

Add byte-swapping versions of __raw_writeq() and __raw_rm_writeq().

This allows us to avoid sparse warnings caused by passing __be64 to
__raw_writeq(), which takes unsigned long:

  arch/powerpc/platforms/powernv/pci-ioda.c:1981:38:
  warning: incorrect type in argument 1 (different base types)
      expected unsigned long [unsigned] v
      got restricted __be64 [usertype] <noident>

It's also generally preferable to use a byte-swapping accessor rather
than doing it by hand in the code, which is more bug prone.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Reviewed-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
hifive-unleashed-5.1
Michael Ellerman 2018-05-14 22:50:31 +10:00
parent d2032678e5
commit 8056fe28d0
1 changed files with 10 additions and 0 deletions
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10
arch/powerpc/include/asm/io.h
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@ -367,6 +367,11 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
*(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v;
}
static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr)
{
__raw_writeq((__force unsigned long)cpu_to_be64(v), addr);
}
/*
* Real mode versions of the above. Those instructions are only supposed
* to be used in hypervisor real mode as per the architecture spec.
@ -395,6 +400,11 @@ static inline void __raw_rm_writeq(u64 val, volatile void __iomem *paddr)
: : "r" (val), "r" (paddr) : "memory");
}
static inline void __raw_rm_writeq_be(u64 val, volatile void __iomem *paddr)
{
__raw_rm_writeq((__force u64)cpu_to_be64(val), paddr);
}
static inline u8 __raw_rm_readb(volatile void __iomem *paddr)
{
u8 ret;