drivers: net: xgene: Add backward compatibility
This patch adds xgene_enet_check_phy_hanlde() function that checks whether MDIO driver is probed successfully and sets pdata->mdio_driver to true. If MDIO driver is not probed, ethernet driver falls back to backward compatibility mode. Since enum xgene_enet_cmd is used by MDIO driver, removing this from ethernet driver. Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Tested-by: Fushen Chen <fchen@apm.com> Tested-by: Toan Le <toanle@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -572,7 +572,9 @@ static void xgene_gmac_init(struct xgene_enet_pdata *pdata)
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{
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u32 value;
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xgene_gmac_reset(pdata);
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if (!pdata->mdio_driver)
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xgene_gmac_reset(pdata);
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xgene_gmac_set_speed(pdata);
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xgene_gmac_set_mac_addr(pdata);
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@ -680,6 +682,11 @@ static int xgene_enet_reset(struct xgene_enet_pdata *pdata)
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if (!xgene_ring_mgr_init(pdata))
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return -ENODEV;
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if (pdata->mdio_driver) {
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xgene_enet_config_ring_if_assoc(pdata);
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return 0;
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}
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if (dev->of_node) {
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clk_prepare_enable(pdata->clk);
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udelay(5);
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@ -799,21 +806,47 @@ static void xgene_enet_adjust_link(struct net_device *ndev)
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}
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}
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static int xgene_enet_phy_connect(struct net_device *ndev)
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#ifdef CONFIG_ACPI
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static struct acpi_device *acpi_phy_find_device(struct device *dev)
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{
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struct acpi_reference_args args;
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struct fwnode_handle *fw_node;
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int status;
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fw_node = acpi_fwnode_handle(ACPI_COMPANION(dev));
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status = acpi_node_get_property_reference(fw_node, "phy-handle", 0,
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&args);
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if (ACPI_FAILURE(status)) {
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dev_dbg(dev, "No matching phy in ACPI table\n");
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return NULL;
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}
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return args.adev;
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}
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#endif
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int xgene_enet_phy_connect(struct net_device *ndev)
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{
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struct xgene_enet_pdata *pdata = netdev_priv(ndev);
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struct device_node *phy_np;
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struct device_node *np;
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struct phy_device *phy_dev;
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struct device *dev = &pdata->pdev->dev;
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struct acpi_device *adev;
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int i;
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if (dev->of_node) {
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phy_np = of_parse_phandle(dev->of_node, "phy-handle", 0);
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if (!phy_np) {
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for (i = 0 ; i < 2; i++) {
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np = of_parse_phandle(dev->of_node, "phy-handle", i);
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if (np)
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break;
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}
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if (!np) {
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netdev_dbg(ndev, "No phy-handle found in DT\n");
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return -ENODEV;
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}
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phy_dev = of_phy_connect(ndev, phy_np, &xgene_enet_adjust_link,
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phy_dev = of_phy_connect(ndev, np, &xgene_enet_adjust_link,
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0, pdata->phy_mode);
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if (!phy_dev) {
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netdev_err(ndev, "Could not connect to PHY\n");
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@ -822,6 +855,11 @@ static int xgene_enet_phy_connect(struct net_device *ndev)
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pdata->phy_dev = phy_dev;
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} else {
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#ifdef CONFIG_ACPI
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adev = acpi_phy_find_device(dev);
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if (adev)
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pdata->phy_dev = adev->driver_data;
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phy_dev = pdata->phy_dev;
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if (!phy_dev ||
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@ -830,6 +868,7 @@ static int xgene_enet_phy_connect(struct net_device *ndev)
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netdev_err(ndev, "Could not connect to PHY\n");
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return -ENODEV;
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}
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#endif
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}
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pdata->phy_speed = SPEED_UNKNOWN;
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@ -930,6 +969,12 @@ int xgene_enet_mdio_config(struct xgene_enet_pdata *pdata)
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return ret;
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}
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void xgene_enet_phy_disconnect(struct xgene_enet_pdata *pdata)
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{
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if (pdata->phy_dev)
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phy_disconnect(pdata->phy_dev);
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}
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void xgene_enet_mdio_remove(struct xgene_enet_pdata *pdata)
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{
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if (pdata->phy_dev)
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@ -301,11 +301,6 @@ enum xgene_enet_ring_bufnum {
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RING_BUFNUM_INVALID
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};
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enum xgene_enet_cmd {
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XGENE_ENET_WR_CMD = BIT(31),
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XGENE_ENET_RD_CMD = BIT(30)
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};
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enum xgene_enet_err_code {
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HBF_READ_DATA = 3,
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HBF_LL_READ = 4,
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@ -351,6 +346,8 @@ void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,
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int xgene_enet_mdio_config(struct xgene_enet_pdata *pdata);
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void xgene_enet_mdio_remove(struct xgene_enet_pdata *pdata);
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bool xgene_ring_mgr_init(struct xgene_enet_pdata *p);
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int xgene_enet_phy_connect(struct net_device *ndev);
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void xgene_enet_phy_disconnect(struct xgene_enet_pdata *pdata);
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extern const struct xgene_mac_ops xgene_gmac_ops;
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extern const struct xgene_port_ops xgene_gport_ops;
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@ -763,7 +763,7 @@ static int xgene_enet_close(struct net_device *ndev)
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mac_ops->tx_disable(pdata);
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mac_ops->rx_disable(pdata);
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if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
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if (pdata->phy_dev)
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phy_stop(pdata->phy_dev);
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else
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cancel_delayed_work_sync(&pdata->link_work);
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@ -1295,6 +1295,23 @@ static int xgene_enet_get_irqs(struct xgene_enet_pdata *pdata)
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return 0;
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}
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static int xgene_enet_check_phy_handle(struct xgene_enet_pdata *pdata)
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{
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int ret;
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if (pdata->phy_mode == PHY_INTERFACE_MODE_XGMII)
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return 0;
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if (!IS_ENABLED(CONFIG_MDIO_XGENE))
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return 0;
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ret = xgene_enet_phy_connect(pdata->ndev);
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if (!ret)
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pdata->mdio_driver = true;
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return 0;
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}
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static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
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{
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struct platform_device *pdev;
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@ -1380,6 +1397,10 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
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if (ret)
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return ret;
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ret = xgene_enet_check_phy_handle(pdata);
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if (ret)
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return ret;
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pdata->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pdata->clk)) {
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/* Firmware may have set up the clock already. */
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@ -1574,7 +1595,7 @@ static int xgene_enet_probe(struct platform_device *pdev)
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struct net_device *ndev;
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struct xgene_enet_pdata *pdata;
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struct device *dev = &pdev->dev;
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const struct xgene_mac_ops *mac_ops;
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void (*link_state)(struct work_struct *);
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const struct of_device_id *of_id;
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int ret;
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@ -1636,14 +1657,17 @@ static int xgene_enet_probe(struct platform_device *pdev)
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if (ret)
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goto err_netdev;
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mac_ops = pdata->mac_ops;
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if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII) {
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ret = xgene_enet_mdio_config(pdata);
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if (ret)
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goto err_netdev;
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} else {
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INIT_DELAYED_WORK(&pdata->link_work, mac_ops->link_state);
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link_state = pdata->mac_ops->link_state;
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if (pdata->phy_mode == PHY_INTERFACE_MODE_XGMII) {
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INIT_DELAYED_WORK(&pdata->link_work, link_state);
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} else if (!pdata->mdio_driver) {
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if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
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ret = xgene_enet_mdio_config(pdata);
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else
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INIT_DELAYED_WORK(&pdata->link_work, link_state);
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}
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if (ret)
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goto err;
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xgene_enet_napi_add(pdata);
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ret = register_netdev(ndev);
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@ -1676,11 +1700,11 @@ static int xgene_enet_remove(struct platform_device *pdev)
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dev_close(ndev);
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rtnl_unlock();
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mac_ops->rx_disable(pdata);
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mac_ops->tx_disable(pdata);
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if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
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if (pdata->mdio_driver)
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xgene_enet_phy_disconnect(pdata);
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else if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
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xgene_enet_mdio_remove(pdata);
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unregister_netdev(ndev);
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pdata->port_ops->shutdown(pdata);
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xgene_enet_delete_desc_rings(pdata);
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@ -38,6 +38,7 @@
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#include "xgene_enet_hw.h"
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#include "xgene_enet_cle.h"
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#include "xgene_enet_ring2.h"
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#include "../../../phy/mdio-xgene.h"
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#define XGENE_DRV_VERSION "v1.0"
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#define XGENE_ENET_MAX_MTU 1536
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@ -214,6 +215,7 @@ struct xgene_enet_pdata {
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u32 mss;
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u8 tx_delay;
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u8 rx_delay;
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bool mdio_driver;
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};
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struct xgene_indirect_ctl {
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@ -223,34 +225,6 @@ struct xgene_indirect_ctl {
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void __iomem *cmd_done;
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};
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/* Set the specified value into a bit-field defined by its starting position
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* and length within a single u64.
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*/
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static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val)
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{
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return (val & ((1ULL << len) - 1)) << pos;
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}
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#define SET_VAL(field, val) \
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xgene_enet_set_field_value(field ## _POS, field ## _LEN, val)
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#define SET_BIT(field) \
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xgene_enet_set_field_value(field ## _POS, 1, 1)
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/* Get the value from a bit-field defined by its starting position
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* and length within the specified u64.
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*/
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static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src)
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{
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return (src >> pos) & ((1ULL << len) - 1);
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}
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#define GET_VAL(field, src) \
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xgene_enet_get_field_value(field ## _POS, field ## _LEN, src)
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#define GET_BIT(field, src) \
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xgene_enet_get_field_value(field ## _POS, 1, src)
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static inline struct device *ndev_to_dev(struct net_device *ndev)
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{
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return ndev->dev.parent;
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@ -366,7 +366,9 @@ static void xgene_sgmac_init(struct xgene_enet_pdata *p)
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u32 cfg_bypass_reg, rx_dv_gate_reg;
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u32 data, offset;
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xgene_sgmac_reset(p);
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if (!(p->enet_id == XGENE_ENET2 && p->mdio_driver))
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xgene_sgmac_reset(p);
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xgene_sgmii_enable_autoneg(p);
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xgene_sgmac_set_speed(p);
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xgene_sgmac_set_mac_addr(p);
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@ -445,6 +447,11 @@ static int xgene_enet_reset(struct xgene_enet_pdata *p)
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if (!xgene_ring_mgr_init(p))
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return -ENODEV;
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if (p->mdio_driver && p->enet_id == XGENE_ENET2) {
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xgene_enet_config_ring_if_assoc(p);
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return 0;
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}
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if (p->enet_id == XGENE_ENET2)
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xgene_enet_wr_clkrst_csr(p, XGENET_CONFIG_REG_ADDR, SGMII_EN);
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