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ARM: dts: r8a7790: Stop grouping clocks under a "clocks" subnode

The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
hifive-unleashed-5.1
Geert Uytterhoeven 2017-08-18 11:16:54 +02:00 committed by Simon Horman
parent 58d6c357b1
commit 80e1a5f318
1 changed files with 60 additions and 65 deletions

View File

@ -1061,77 +1061,72 @@
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; };
clocks { /* External root clock */
#address-cells = <2>; extal_clk: extal {
#size-cells = <2>; compatible = "fixed-clock";
ranges; #clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* External root clock */ /* External PCIe clock - can be overridden by the board */
extal_clk: extal { pcie_bus_clk: pcie_bus {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
/* This value must be overriden by the board. */ clock-frequency = <0>;
clock-frequency = <0>; };
};
/* External PCIe clock - can be overridden by the board */ /*
pcie_bus_clk: pcie_bus { * The external audio clocks are configured as 0 Hz fixed frequency
compatible = "fixed-clock"; * clocks by default.
#clock-cells = <0>; * Boards that provide audio clocks should override them.
clock-frequency = <0>; */
}; audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* /* External SCIF clock */
* The external audio clocks are configured as 0 Hz fixed frequency clocks by scif_clk: scif {
* default. Boards that provide audio clocks should override them. compatible = "fixed-clock";
*/ #clock-cells = <0>;
audio_clk_a: audio_clk_a { /* This value must be overridden by the board. */
compatible = "fixed-clock"; clock-frequency = <0>;
#clock-cells = <0>; };
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External SCIF clock */ /* External USB clock - can be overridden by the board */
scif_clk: scif { usb_extal_clk: usb_extal {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
/* This value must be overridden by the board. */ clock-frequency = <48000000>;
clock-frequency = <0>; };
};
/* External USB clock - can be overridden by the board */ /* External CAN clock */
usb_extal_clk: usb_extal { can_clk: can {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <48000000>; /* This value must be overridden by the board. */
}; clock-frequency = <0>;
};
/* External CAN clock */ cpg: clock-controller@e6150000 {
can_clk: can { compatible = "renesas,r8a7790-cpg-mssr";
compatible = "fixed-clock"; reg = <0 0xe6150000 0 0x1000>;
#clock-cells = <0>; clocks = <&extal_clk>, <&usb_extal_clk>;
/* This value must be overridden by the board. */ clock-names = "extal", "usb_extal";
clock-frequency = <0>; #clock-cells = <2>;
}; #power-domain-cells = <0>;
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7790-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
clocks = <&extal_clk>, <&usb_extal_clk>;
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
};
}; };
prr: chipid@ff000044 { prr: chipid@ff000044 {