net: dsa: mv88e6xxx: use 4-bit port for PVT data
The Cross-chip Port Based VLAN Table (PVT) supports two indexing modes, one using 5-bit for device and 4-bit for port, the other using 4-bit for device and 5-bit for port, configured via the Global 2 Misc register. Only 4 bits for the source port are needed when interconnecting 88E6xxx switch devices since they all support less than 16 physical ports. The full 5 bits are needed when interconnecting a device with 98DXxxx switch devices since they support more than 16 physical ports. Add a mv88e6xxx_pvt_setup helper to set the 4-bit port PVT mode, which will be extended later to also initialize the PVT content. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1198,6 +1198,17 @@ static int mv88e6xxx_atu_setup(struct mv88e6xxx_chip *chip)
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return mv88e6xxx_g1_atu_set_age_time(chip, 300000);
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}
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static int mv88e6xxx_pvt_setup(struct mv88e6xxx_chip *chip)
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{
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if (!mv88e6xxx_has_pvt(chip))
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return 0;
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/* Clear 5 Bit Port for usage with Marvell Link Street devices:
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* use 4 bits for the Src_Port/Src_Trunk and 5 bits for the Src_Dev.
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*/
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return mv88e6xxx_g2_misc_4_bit_port(chip);
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}
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static void mv88e6xxx_port_fast_age(struct dsa_switch *ds, int port)
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{
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struct mv88e6xxx_chip *chip = ds->priv;
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@ -2594,6 +2605,10 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
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goto unlock;
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}
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err = mv88e6xxx_pvt_setup(chip);
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if (err)
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goto unlock;
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err = mv88e6xxx_atu_setup(chip);
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if (err)
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goto unlock;
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@ -784,6 +784,31 @@ static int mv88e6xxx_g2_watchdog_setup(struct mv88e6xxx_chip *chip)
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return err;
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}
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/* Offset 0x1D: Misc Register */
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static int mv88e6xxx_g2_misc_5_bit_port(struct mv88e6xxx_chip *chip,
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bool port_5_bit)
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{
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u16 val;
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int err;
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err = mv88e6xxx_g2_read(chip, GLOBAL2_MISC, &val);
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if (err)
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return err;
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if (port_5_bit)
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val |= GLOBAL2_MISC_5_BIT_PORT;
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else
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val &= ~GLOBAL2_MISC_5_BIT_PORT;
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return mv88e6xxx_g2_write(chip, GLOBAL2_MISC, val);
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}
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int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip)
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{
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return mv88e6xxx_g2_misc_5_bit_port(chip, false);
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}
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static void mv88e6xxx_g2_irq_mask(struct irq_data *d)
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{
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struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);
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@ -42,6 +42,8 @@ int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip,
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int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
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struct ethtool_eeprom *eeprom, u8 *data);
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int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip);
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int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip);
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int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip);
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void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip);
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@ -110,6 +112,11 @@ static inline int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
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return -EOPNOTSUPP;
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}
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int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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@ -439,6 +439,7 @@
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#define GLOBAL2_WDOG_FORCE_IRQ BIT(0)
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#define GLOBAL2_QOS_WEIGHT 0x1c
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#define GLOBAL2_MISC 0x1d
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#define GLOBAL2_MISC_5_BIT_PORT BIT(14)
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#define MV88E6XXX_N_FID 4096
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