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drm/radeon: don't power gate paused UVD streams 

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Christian König 2014-01-10 16:05:05 +01:00 committed by Alex Deucher
parent 7f4237c6da
commit 8158eb9e32
2 changed files with 6 additions and 0 deletions
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4
drivers/gpu/drm/radeon/radeon_pm.c
View File

@ -924,6 +924,10 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable)
if (rdev->asic->dpm.powergate_uvd) {
mutex_lock(&rdev->pm.mutex);
/* don't powergate anything if we
have active but pause streams */
enable |= rdev->pm.dpm.sd > 0;
enable |= rdev->pm.dpm.hd > 0;
/* enable/disable UVD */
radeon_dpm_powergate_uvd(rdev, !enable);
mutex_unlock(&rdev->pm.mutex);

2
drivers/gpu/drm/radeon/radeon_uvd.c
View File

@ -778,6 +778,8 @@ static void radeon_uvd_idle_work_handler(struct work_struct *work)
if (radeon_fence_count_emitted(rdev, R600_RING_TYPE_UVD_INDEX) == 0) {
if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd,
&rdev->pm.dpm.hd);
radeon_dpm_enable_uvd(rdev, false);
} else {
radeon_set_uvd_clocks(rdev, 0, 0);