scsi: megaraid_sas: Rename scratch_pad registers

Rename the scratch pad registers to match firmware headers.  No functional
change.

Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
Signed-off-by: Shivasharan S <shivasharan.srikanteshwara@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Shivasharan S 2018-10-16 23:37:51 -07:00 committed by Martin K. Petersen
parent 34bd9f27e3
commit 81b7645223
3 changed files with 45 additions and 46 deletions

View file

@ -1606,11 +1606,10 @@ struct megasas_register_set {
u32 reserved_3[3]; /*00A4h*/
u32 outbound_scratch_pad ; /*00B0h*/
u32 outbound_scratch_pad_2; /*00B4h*/
u32 outbound_scratch_pad_3; /*00B8h*/
u32 outbound_scratch_pad_4; /*00BCh*/
u32 outbound_scratch_pad_0; /*00B0h*/
u32 outbound_scratch_pad_1; /*00B4h*/
u32 outbound_scratch_pad_2; /*00B8h*/
u32 outbound_scratch_pad_3; /*00BCh*/
u32 inbound_low_queue_port ; /*00C0h*/

View file

@ -595,7 +595,7 @@ megasas_disable_intr_ppc(struct megasas_instance *instance)
static u32
megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
{
return readl(&(regs)->outbound_scratch_pad);
return readl(&(regs)->outbound_scratch_pad_0);
}
/**
@ -720,7 +720,7 @@ megasas_disable_intr_skinny(struct megasas_instance *instance)
static u32
megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
{
return readl(&(regs)->outbound_scratch_pad);
return readl(&(regs)->outbound_scratch_pad_0);
}
/**
@ -865,7 +865,7 @@ megasas_disable_intr_gen2(struct megasas_instance *instance)
static u32
megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
{
return readl(&(regs)->outbound_scratch_pad);
return readl(&(regs)->outbound_scratch_pad_0);
}
/**
@ -5299,7 +5299,7 @@ static int megasas_init_fw(struct megasas_instance *instance)
{
u32 max_sectors_1;
u32 max_sectors_2, tmp_sectors, msix_enable;
u32 scratch_pad_2, scratch_pad_3, scratch_pad_4, status_reg;
u32 scratch_pad_1, scratch_pad_2, scratch_pad_3, status_reg;
resource_size_t base_addr;
struct megasas_register_set __iomem *reg_set;
struct megasas_ctrl_info *ctrl_info = NULL;
@ -5395,9 +5395,9 @@ static int megasas_init_fw(struct megasas_instance *instance)
fusion = instance->ctrl_context;
if (instance->adapter_type == VENTURA_SERIES) {
scratch_pad_3 =
readl(&instance->reg_set->outbound_scratch_pad_3);
instance->max_raid_mapsize = ((scratch_pad_3 >>
scratch_pad_2 =
readl(&instance->reg_set->outbound_scratch_pad_2);
instance->max_raid_mapsize = ((scratch_pad_2 >>
MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) &
MR_MAX_RAID_MAP_SIZE_MASK);
}
@ -5408,17 +5408,17 @@ static int megasas_init_fw(struct megasas_instance *instance)
if (msix_enable && !msix_disable) {
int irq_flags = PCI_IRQ_MSIX;
scratch_pad_2 = readl
(&instance->reg_set->outbound_scratch_pad_2);
scratch_pad_1 = readl
(&instance->reg_set->outbound_scratch_pad_1);
/* Check max MSI-X vectors */
if (fusion) {
if (instance->adapter_type == THUNDERBOLT_SERIES) {
/* Thunderbolt Series*/
instance->msix_vectors = (scratch_pad_2
instance->msix_vectors = (scratch_pad_1
& MR_MAX_REPLY_QUEUES_OFFSET) + 1;
fw_msix_count = instance->msix_vectors;
} else {
instance->msix_vectors = ((scratch_pad_2
instance->msix_vectors = ((scratch_pad_1
& MR_MAX_REPLY_QUEUES_EXT_OFFSET)
>> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
@ -5442,7 +5442,7 @@ static int megasas_init_fw(struct megasas_instance *instance)
}
if (rdpq_enable)
instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
instance->is_rdpq = (scratch_pad_1 & MR_RDPQ_MODE_OFFSET) ?
1 : 0;
fw_msix_count = instance->msix_vectors;
/* Save 1-15 reply post index address to local memory
@ -5518,12 +5518,12 @@ static int megasas_init_fw(struct megasas_instance *instance)
goto fail_init_adapter;
if (instance->adapter_type == VENTURA_SERIES) {
scratch_pad_4 =
readl(&instance->reg_set->outbound_scratch_pad_4);
if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >=
scratch_pad_3 =
readl(&instance->reg_set->outbound_scratch_pad_3);
if ((scratch_pad_3 & MR_NVME_PAGE_SIZE_MASK) >=
MR_DEFAULT_NVME_PAGE_SHIFT)
instance->nvme_page_size =
(1 << (scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK));
(1 << (scratch_pad_3 & MR_NVME_PAGE_SIZE_MASK));
dev_info(&instance->pdev->dev,
"NVME page size\t: (%d)\n", instance->nvme_page_size);
@ -6169,7 +6169,7 @@ megasas_set_dma_mask(struct megasas_instance *instance)
{
u64 consistent_mask;
struct pci_dev *pdev;
u32 scratch_pad_2;
u32 scratch_pad_1;
pdev = instance->pdev;
consistent_mask = (instance->adapter_type == VENTURA_SERIES) ?
@ -6187,10 +6187,10 @@ megasas_set_dma_mask(struct megasas_instance *instance)
* If 32 bit DMA mask fails, then try for 64 bit mask
* for FW capable of handling 64 bit DMA.
*/
scratch_pad_2 = readl
(&instance->reg_set->outbound_scratch_pad_2);
scratch_pad_1 = readl
(&instance->reg_set->outbound_scratch_pad_1);
if (!(scratch_pad_2 & MR_CAN_HANDLE_64_BIT_DMA_OFFSET))
if (!(scratch_pad_1 & MR_CAN_HANDLE_64_BIT_DMA_OFFSET))
goto fail_set_dma_mask;
else if (dma_set_mask_and_coherent(&pdev->dev,
DMA_BIT_MASK(64)))

View file

@ -262,10 +262,10 @@ megasas_fusion_update_can_queue(struct megasas_instance *instance, int fw_boot_c
reg_set = instance->reg_set;
/* ventura FW does not fill outbound_scratch_pad_3 with queue depth */
/* ventura FW does not fill outbound_scratch_pad_2 with queue depth */
if (instance->adapter_type < VENTURA_SERIES)
cur_max_fw_cmds =
readl(&instance->reg_set->outbound_scratch_pad_3) & 0x00FFFF;
readl(&instance->reg_set->outbound_scratch_pad_2) & 0x00FFFF;
if (dual_qdepth_disable || !cur_max_fw_cmds)
cur_max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
@ -974,7 +974,7 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)
struct megasas_header *frame_hdr;
const char *sys_info;
MFI_CAPABILITIES *drv_ops;
u32 scratch_pad_2;
u32 scratch_pad_1;
ktime_t time;
bool cur_fw_64bit_dma_capable;
@ -985,14 +985,14 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)
cmd = fusion->ioc_init_cmd;
scratch_pad_2 = readl
(&instance->reg_set->outbound_scratch_pad_2);
scratch_pad_1 = readl
(&instance->reg_set->outbound_scratch_pad_1);
cur_rdpq_mode = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ? 1 : 0;
cur_rdpq_mode = (scratch_pad_1 & MR_RDPQ_MODE_OFFSET) ? 1 : 0;
if (instance->adapter_type == INVADER_SERIES) {
cur_fw_64bit_dma_capable =
(scratch_pad_2 & MR_CAN_HANDLE_64_BIT_DMA_OFFSET) ? true : false;
(scratch_pad_1 & MR_CAN_HANDLE_64_BIT_DMA_OFFSET) ? true : false;
if (instance->consistent_mask_64bit && !cur_fw_64bit_dma_capable) {
dev_err(&instance->pdev->dev, "Driver was operating on 64bit "
@ -1010,7 +1010,7 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)
goto fail_fw_init;
}
instance->fw_sync_cache_support = (scratch_pad_2 &
instance->fw_sync_cache_support = (scratch_pad_1 &
MR_CAN_HANDLE_SYNC_CACHE_OFFSET) ? 1 : 0;
dev_info(&instance->pdev->dev, "FW supports sync cache\t: %s\n",
instance->fw_sync_cache_support ? "Yes" : "No");
@ -1642,7 +1642,7 @@ megasas_init_adapter_fusion(struct megasas_instance *instance)
{
struct megasas_register_set __iomem *reg_set;
struct fusion_context *fusion;
u32 scratch_pad_2;
u32 scratch_pad_1;
int i = 0, count;
fusion = instance->ctrl_context;
@ -1659,20 +1659,20 @@ megasas_init_adapter_fusion(struct megasas_instance *instance)
megasas_configure_queue_sizes(instance);
scratch_pad_2 = readl(&instance->reg_set->outbound_scratch_pad_2);
/* If scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK is set,
scratch_pad_1 = readl(&instance->reg_set->outbound_scratch_pad_1);
/* If scratch_pad_1 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK is set,
* Firmware support extended IO chain frame which is 4 times more than
* legacy Firmware.
* Legacy Firmware - Frame size is (8 * 128) = 1K
* 1M IO Firmware - Frame size is (8 * 128 * 4) = 4K
*/
if (scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK)
if (scratch_pad_1 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK)
instance->max_chain_frame_sz =
((scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_MASK) >>
((scratch_pad_1 & MEGASAS_MAX_CHAIN_SIZE_MASK) >>
MEGASAS_MAX_CHAIN_SHIFT) * MEGASAS_1MB_IO;
else
instance->max_chain_frame_sz =
((scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_MASK) >>
((scratch_pad_1 & MEGASAS_MAX_CHAIN_SIZE_MASK) >>
MEGASAS_MAX_CHAIN_SHIFT) * MEGASAS_256K_IO;
if (instance->max_chain_frame_sz < MEGASAS_CHAIN_FRAME_SZ_MIN) {
@ -3737,7 +3737,7 @@ megasas_release_fusion(struct megasas_instance *instance)
static u32
megasas_read_fw_status_reg_fusion(struct megasas_register_set __iomem *regs)
{
return readl(&(regs)->outbound_scratch_pad);
return readl(&(regs)->outbound_scratch_pad_0);
}
/**
@ -4869,8 +4869,8 @@ void megasas_fusion_crash_dump(struct megasas_instance *instance)
"crash dump and initiating OCR\n");
status_reg |= MFI_STATE_CRASH_DUMP_DONE;
writel(status_reg,
&instance->reg_set->outbound_scratch_pad);
readl(&instance->reg_set->outbound_scratch_pad);
&instance->reg_set->outbound_scratch_pad_0);
readl(&instance->reg_set->outbound_scratch_pad_0);
return;
}
megasas_alloc_host_crash_buffer(instance);
@ -4908,8 +4908,8 @@ void megasas_fusion_crash_dump(struct megasas_instance *instance)
status_reg &= ~MFI_STATE_DMADONE;
}
writel(status_reg, &instance->reg_set->outbound_scratch_pad);
readl(&instance->reg_set->outbound_scratch_pad);
writel(status_reg, &instance->reg_set->outbound_scratch_pad_0);
readl(&instance->reg_set->outbound_scratch_pad_0);
msleep(MEGASAS_WAIT_FOR_NEXT_DMA_MSECS);
status_reg = instance->instancet->read_fw_status_reg(
@ -4922,8 +4922,8 @@ void megasas_fusion_crash_dump(struct megasas_instance *instance)
instance->fw_crash_buffer_size = instance->drv_buf_index;
instance->fw_crash_state = AVAILABLE;
instance->drv_buf_index = 0;
writel(status_reg, &instance->reg_set->outbound_scratch_pad);
readl(&instance->reg_set->outbound_scratch_pad);
writel(status_reg, &instance->reg_set->outbound_scratch_pad_0);
readl(&instance->reg_set->outbound_scratch_pad_0);
if (!partial_copy)
megasas_reset_fusion(instance->host, 0);
}