crypto: atmel-sha - add support to hmac(shaX)
This patch adds support to the hmac(shaX) algorithms. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>hifive-unleashed-5.1
Cyrille Pitchen
Herbert Xu
parent
69303cf0f1
commit
81d8750b2b
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@ -26,6 +26,7 @@
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#define SHA_MR_ALGO_SHA384 (2 << 8)
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#define SHA_MR_ALGO_SHA512 (3 << 8)
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#define SHA_MR_ALGO_SHA224 (4 << 8)
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#define SHA_MR_HMAC (1 << 11)
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#define SHA_MR_DUALBUFF (1 << 16)
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#define SHA_IER 0x10
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@ -42,6 +43,9 @@
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#define SHA_ISR_URAT_MR (0x2 << 12)
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#define SHA_ISR_URAT_WO (0x5 << 12)
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#define SHA_MSR 0x20
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#define SHA_BCR 0x30
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#define SHA_HW_VERSION 0xFC
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#define SHA_TPR 0x108
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@ -51,13 +51,20 @@
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#define SHA_FLAGS_CPU BIT(5)
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#define SHA_FLAGS_DMA_READY BIT(6)
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/* bits[10:8] are reserved. */
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/* bits[11:8] are reserved. */
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#define SHA_FLAGS_ALGO_MASK SHA_MR_ALGO_MASK
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#define SHA_FLAGS_SHA1 SHA_MR_ALGO_SHA1
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#define SHA_FLAGS_SHA256 SHA_MR_ALGO_SHA256
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#define SHA_FLAGS_SHA384 SHA_MR_ALGO_SHA384
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#define SHA_FLAGS_SHA512 SHA_MR_ALGO_SHA512
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#define SHA_FLAGS_SHA224 SHA_MR_ALGO_SHA224
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#define SHA_FLAGS_HMAC SHA_MR_HMAC
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#define SHA_FLAGS_HMAC_SHA1 (SHA_FLAGS_HMAC | SHA_FLAGS_SHA1)
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#define SHA_FLAGS_HMAC_SHA256 (SHA_FLAGS_HMAC | SHA_FLAGS_SHA256)
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#define SHA_FLAGS_HMAC_SHA384 (SHA_FLAGS_HMAC | SHA_FLAGS_SHA384)
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#define SHA_FLAGS_HMAC_SHA512 (SHA_FLAGS_HMAC | SHA_FLAGS_SHA512)
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#define SHA_FLAGS_HMAC_SHA224 (SHA_FLAGS_HMAC | SHA_FLAGS_SHA224)
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#define SHA_FLAGS_MODE_MASK (SHA_FLAGS_HMAC | SHA_FLAGS_ALGO_MASK)
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#define SHA_FLAGS_FINUP BIT(16)
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#define SHA_FLAGS_SG BIT(17)
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@ -67,8 +74,10 @@
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#define SHA_FLAGS_IDATAR0 BIT(26)
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#define SHA_FLAGS_WAIT_DATARDY BIT(27)
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#define SHA_OP_INIT 0
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#define SHA_OP_UPDATE 1
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#define SHA_OP_FINAL 2
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#define SHA_OP_DIGEST 3
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#define SHA_BUFFER_LEN (PAGE_SIZE / 16)
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@ -80,6 +89,7 @@ struct atmel_sha_caps {
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bool has_sha224;
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bool has_sha_384_512;
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bool has_uihv;
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bool has_hmac;
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};
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struct atmel_sha_dev;
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@ -105,6 +115,7 @@ struct atmel_sha_reqctx {
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unsigned int total; /* total request */
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size_t block_size;
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size_t hash_size;
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u8 buffer[SHA_BUFFER_LEN + SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
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};
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@ -152,6 +163,8 @@ struct atmel_sha_dev {
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struct atmel_sha_caps caps;
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struct scatterlist tmp;
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u32 hw_version;
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};
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@ -1522,11 +1535,579 @@ static int atmel_sha_cpu_start(struct atmel_sha_dev *dd,
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return atmel_sha_cpu_transfer(dd);
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}
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static int atmel_sha_cpu_hash(struct atmel_sha_dev *dd,
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const void *data, unsigned int datalen,
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bool auto_padding,
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atmel_sha_fn_t resume)
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{
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struct ahash_request *req = dd->req;
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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u32 msglen = (auto_padding) ? datalen : 0;
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u32 mr = SHA_MR_MODE_AUTO;
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if (!(IS_ALIGNED(datalen, ctx->block_size) || auto_padding))
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return atmel_sha_complete(dd, -EINVAL);
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mr |= (ctx->flags & SHA_FLAGS_ALGO_MASK);
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atmel_sha_write(dd, SHA_MR, mr);
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atmel_sha_write(dd, SHA_MSR, msglen);
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atmel_sha_write(dd, SHA_BCR, msglen);
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atmel_sha_write(dd, SHA_CR, SHA_CR_FIRST);
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sg_init_one(&dd->tmp, data, datalen);
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return atmel_sha_cpu_start(dd, &dd->tmp, datalen, false, true, resume);
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}
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/* hmac functions */
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struct atmel_sha_hmac_key {
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bool valid;
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unsigned int keylen;
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u8 buffer[SHA512_BLOCK_SIZE];
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u8 *keydup;
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};
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static inline void atmel_sha_hmac_key_init(struct atmel_sha_hmac_key *hkey)
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{
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memset(hkey, 0, sizeof(*hkey));
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}
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static inline void atmel_sha_hmac_key_release(struct atmel_sha_hmac_key *hkey)
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{
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kfree(hkey->keydup);
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memset(hkey, 0, sizeof(*hkey));
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}
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static inline int atmel_sha_hmac_key_set(struct atmel_sha_hmac_key *hkey,
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const u8 *key,
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unsigned int keylen)
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{
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atmel_sha_hmac_key_release(hkey);
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if (keylen > sizeof(hkey->buffer)) {
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hkey->keydup = kmemdup(key, keylen, GFP_KERNEL);
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if (!hkey->keydup)
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return -ENOMEM;
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} else {
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memcpy(hkey->buffer, key, keylen);
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}
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hkey->valid = true;
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hkey->keylen = keylen;
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return 0;
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}
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static inline bool atmel_sha_hmac_key_get(const struct atmel_sha_hmac_key *hkey,
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const u8 **key,
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unsigned int *keylen)
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{
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if (!hkey->valid)
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return false;
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*keylen = hkey->keylen;
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*key = (hkey->keydup) ? hkey->keydup : hkey->buffer;
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return true;
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}
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struct atmel_sha_hmac_ctx {
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struct atmel_sha_ctx base;
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struct atmel_sha_hmac_key hkey;
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u32 ipad[SHA512_BLOCK_SIZE / sizeof(u32)];
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u32 opad[SHA512_BLOCK_SIZE / sizeof(u32)];
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atmel_sha_fn_t resume;
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};
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static int atmel_sha_hmac_setup(struct atmel_sha_dev *dd,
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atmel_sha_fn_t resume);
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static int atmel_sha_hmac_prehash_key(struct atmel_sha_dev *dd,
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const u8 *key, unsigned int keylen);
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static int atmel_sha_hmac_prehash_key_done(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_compute_ipad_hash(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_compute_opad_hash(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_setup_done(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_init_done(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_final(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_final_done(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_digest2(struct atmel_sha_dev *dd);
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static int atmel_sha_hmac_setup(struct atmel_sha_dev *dd,
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atmel_sha_fn_t resume)
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{
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struct ahash_request *req = dd->req;
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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unsigned int keylen;
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const u8 *key;
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size_t bs;
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hmac->resume = resume;
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switch (ctx->flags & SHA_FLAGS_ALGO_MASK) {
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case SHA_FLAGS_SHA1:
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ctx->block_size = SHA1_BLOCK_SIZE;
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ctx->hash_size = SHA1_DIGEST_SIZE;
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break;
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case SHA_FLAGS_SHA224:
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ctx->block_size = SHA224_BLOCK_SIZE;
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ctx->hash_size = SHA256_DIGEST_SIZE;
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break;
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case SHA_FLAGS_SHA256:
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ctx->block_size = SHA256_BLOCK_SIZE;
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ctx->hash_size = SHA256_DIGEST_SIZE;
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break;
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case SHA_FLAGS_SHA384:
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ctx->block_size = SHA384_BLOCK_SIZE;
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ctx->hash_size = SHA512_DIGEST_SIZE;
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break;
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case SHA_FLAGS_SHA512:
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ctx->block_size = SHA512_BLOCK_SIZE;
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ctx->hash_size = SHA512_DIGEST_SIZE;
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break;
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default:
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return atmel_sha_complete(dd, -EINVAL);
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}
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bs = ctx->block_size;
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if (likely(!atmel_sha_hmac_key_get(&hmac->hkey, &key, &keylen)))
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return resume(dd);
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/* Compute K' from K. */
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if (unlikely(keylen > bs))
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return atmel_sha_hmac_prehash_key(dd, key, keylen);
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/* Prepare ipad. */
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memcpy((u8 *)hmac->ipad, key, keylen);
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memset((u8 *)hmac->ipad + keylen, 0, bs - keylen);
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return atmel_sha_hmac_compute_ipad_hash(dd);
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}
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static int atmel_sha_hmac_prehash_key(struct atmel_sha_dev *dd,
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const u8 *key, unsigned int keylen)
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{
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return atmel_sha_cpu_hash(dd, key, keylen, true,
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atmel_sha_hmac_prehash_key_done);
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}
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static int atmel_sha_hmac_prehash_key_done(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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size_t ds = crypto_ahash_digestsize(tfm);
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size_t bs = ctx->block_size;
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size_t i, num_words = ds / sizeof(u32);
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/* Prepare ipad. */
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for (i = 0; i < num_words; ++i)
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hmac->ipad[i] = atmel_sha_read(dd, SHA_REG_DIGEST(i));
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memset((u8 *)hmac->ipad + ds, 0, bs - ds);
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return atmel_sha_hmac_compute_ipad_hash(dd);
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}
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static int atmel_sha_hmac_compute_ipad_hash(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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size_t bs = ctx->block_size;
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size_t i, num_words = bs / sizeof(u32);
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memcpy(hmac->opad, hmac->ipad, bs);
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for (i = 0; i < num_words; ++i) {
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hmac->ipad[i] ^= 0x36363636;
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hmac->opad[i] ^= 0x5c5c5c5c;
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}
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return atmel_sha_cpu_hash(dd, hmac->ipad, bs, false,
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atmel_sha_hmac_compute_opad_hash);
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}
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static int atmel_sha_hmac_compute_opad_hash(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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size_t bs = ctx->block_size;
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size_t hs = ctx->hash_size;
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size_t i, num_words = hs / sizeof(u32);
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for (i = 0; i < num_words; ++i)
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hmac->ipad[i] = atmel_sha_read(dd, SHA_REG_DIGEST(i));
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return atmel_sha_cpu_hash(dd, hmac->opad, bs, false,
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atmel_sha_hmac_setup_done);
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}
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static int atmel_sha_hmac_setup_done(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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size_t hs = ctx->hash_size;
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size_t i, num_words = hs / sizeof(u32);
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for (i = 0; i < num_words; ++i)
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hmac->opad[i] = atmel_sha_read(dd, SHA_REG_DIGEST(i));
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atmel_sha_hmac_key_release(&hmac->hkey);
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return hmac->resume(dd);
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}
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static int atmel_sha_hmac_start(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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int err;
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err = atmel_sha_hw_init(dd);
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if (err)
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return atmel_sha_complete(dd, err);
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switch (ctx->op) {
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case SHA_OP_INIT:
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err = atmel_sha_hmac_setup(dd, atmel_sha_hmac_init_done);
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break;
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case SHA_OP_UPDATE:
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dd->resume = atmel_sha_done;
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err = atmel_sha_update_req(dd);
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break;
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case SHA_OP_FINAL:
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dd->resume = atmel_sha_hmac_final;
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err = atmel_sha_final_req(dd);
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break;
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case SHA_OP_DIGEST:
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err = atmel_sha_hmac_setup(dd, atmel_sha_hmac_digest2);
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break;
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default:
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return atmel_sha_complete(dd, -EINVAL);
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}
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return err;
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}
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static int atmel_sha_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
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unsigned int keylen)
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{
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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if (atmel_sha_hmac_key_set(&hmac->hkey, key, keylen)) {
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crypto_ahash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
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return -EINVAL;
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}
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return 0;
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}
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static int atmel_sha_hmac_init(struct ahash_request *req)
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{
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int err;
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err = atmel_sha_init(req);
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if (err)
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return err;
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return atmel_sha_enqueue(req, SHA_OP_INIT);
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}
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static int atmel_sha_hmac_init_done(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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size_t bs = ctx->block_size;
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size_t hs = ctx->hash_size;
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ctx->bufcnt = 0;
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ctx->digcnt[0] = bs;
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ctx->digcnt[1] = 0;
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ctx->flags |= SHA_FLAGS_RESTORE;
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memcpy(ctx->digest, hmac->ipad, hs);
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return atmel_sha_complete(dd, 0);
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}
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static int atmel_sha_hmac_final(struct atmel_sha_dev *dd)
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{
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struct ahash_request *req = dd->req;
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struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
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u32 *digest = (u32 *)ctx->digest;
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size_t ds = crypto_ahash_digestsize(tfm);
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size_t bs = ctx->block_size;
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size_t hs = ctx->hash_size;
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size_t i, num_words;
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u32 mr;
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/* Save d = SHA((K' + ipad) | msg). */
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num_words = ds / sizeof(u32);
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for (i = 0; i < num_words; ++i)
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digest[i] = atmel_sha_read(dd, SHA_REG_DIGEST(i));
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/* Restore context to finish computing SHA((K' + opad) | d). */
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atmel_sha_write(dd, SHA_CR, SHA_CR_WUIHV);
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num_words = hs / sizeof(u32);
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for (i = 0; i < num_words; ++i)
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atmel_sha_write(dd, SHA_REG_DIN(i), hmac->opad[i]);
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mr = SHA_MR_MODE_AUTO | SHA_MR_UIHV;
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mr |= (ctx->flags & SHA_FLAGS_ALGO_MASK);
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atmel_sha_write(dd, SHA_MR, mr);
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atmel_sha_write(dd, SHA_MSR, bs + ds);
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atmel_sha_write(dd, SHA_BCR, ds);
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atmel_sha_write(dd, SHA_CR, SHA_CR_FIRST);
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sg_init_one(&dd->tmp, digest, ds);
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return atmel_sha_cpu_start(dd, &dd->tmp, ds, false, true,
|
||||
atmel_sha_hmac_final_done);
|
||||
}
|
||||
|
||||
static int atmel_sha_hmac_final_done(struct atmel_sha_dev *dd)
|
||||
{
|
||||
/*
|
||||
* req->result might not be sizeof(u32) aligned, so copy the
|
||||
* digest into ctx->digest[] before memcpy() the data into
|
||||
* req->result.
|
||||
*/
|
||||
atmel_sha_copy_hash(dd->req);
|
||||
atmel_sha_copy_ready_hash(dd->req);
|
||||
return atmel_sha_complete(dd, 0);
|
||||
}
|
||||
|
||||
static int atmel_sha_hmac_digest(struct ahash_request *req)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = atmel_sha_init(req);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return atmel_sha_enqueue(req, SHA_OP_DIGEST);
|
||||
}
|
||||
|
||||
static int atmel_sha_hmac_digest2(struct atmel_sha_dev *dd)
|
||||
{
|
||||
struct ahash_request *req = dd->req;
|
||||
struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
|
||||
size_t hs = ctx->hash_size;
|
||||
size_t i, num_words = hs / sizeof(u32);
|
||||
bool use_dma = false;
|
||||
u32 mr;
|
||||
|
||||
/* Special case for empty message. */
|
||||
if (!req->nbytes)
|
||||
return atmel_sha_complete(dd, -EINVAL); // TODO:
|
||||
|
||||
/* Check DMA threshold and alignment. */
|
||||
if (req->nbytes > ATMEL_SHA_DMA_THRESHOLD &&
|
||||
atmel_sha_dma_check_aligned(dd, req->src, req->nbytes))
|
||||
use_dma = true;
|
||||
|
||||
/* Write both initial hash values to compute a HMAC. */
|
||||
atmel_sha_write(dd, SHA_CR, SHA_CR_WUIHV);
|
||||
for (i = 0; i < num_words; ++i)
|
||||
atmel_sha_write(dd, SHA_REG_DIN(i), hmac->ipad[i]);
|
||||
|
||||
atmel_sha_write(dd, SHA_CR, SHA_CR_WUIEHV);
|
||||
for (i = 0; i < num_words; ++i)
|
||||
atmel_sha_write(dd, SHA_REG_DIN(i), hmac->opad[i]);
|
||||
|
||||
/* Write the Mode, Message Size, Bytes Count then Control Registers. */
|
||||
mr = (SHA_MR_HMAC | SHA_MR_DUALBUFF);
|
||||
mr |= ctx->flags & SHA_FLAGS_ALGO_MASK;
|
||||
if (use_dma)
|
||||
mr |= SHA_MR_MODE_IDATAR0;
|
||||
else
|
||||
mr |= SHA_MR_MODE_AUTO;
|
||||
atmel_sha_write(dd, SHA_MR, mr);
|
||||
|
||||
atmel_sha_write(dd, SHA_MSR, req->nbytes);
|
||||
atmel_sha_write(dd, SHA_BCR, req->nbytes);
|
||||
|
||||
atmel_sha_write(dd, SHA_CR, SHA_CR_FIRST);
|
||||
|
||||
/* Process data. */
|
||||
if (use_dma)
|
||||
return atmel_sha_dma_start(dd, req->src, req->nbytes,
|
||||
atmel_sha_hmac_final_done);
|
||||
|
||||
return atmel_sha_cpu_start(dd, req->src, req->nbytes, false, true,
|
||||
atmel_sha_hmac_final_done);
|
||||
}
|
||||
|
||||
static int atmel_sha_hmac_cra_init(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct atmel_sha_hmac_ctx *hmac = crypto_tfm_ctx(tfm);
|
||||
|
||||
crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
|
||||
sizeof(struct atmel_sha_reqctx));
|
||||
hmac->base.start = atmel_sha_hmac_start;
|
||||
atmel_sha_hmac_key_init(&hmac->hkey);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void atmel_sha_hmac_cra_exit(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct atmel_sha_hmac_ctx *hmac = crypto_tfm_ctx(tfm);
|
||||
|
||||
atmel_sha_hmac_key_release(&hmac->hkey);
|
||||
}
|
||||
|
||||
static struct ahash_alg sha_hmac_algs[] = {
|
||||
{
|
||||
.init = atmel_sha_hmac_init,
|
||||
.update = atmel_sha_update,
|
||||
.final = atmel_sha_final,
|
||||
.digest = atmel_sha_hmac_digest,
|
||||
.setkey = atmel_sha_hmac_setkey,
|
||||
.export = atmel_sha_export,
|
||||
.import = atmel_sha_import,
|
||||
.halg = {
|
||||
.digestsize = SHA1_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct atmel_sha_reqctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(sha1)",
|
||||
.cra_driver_name = "atmel-hmac-sha1",
|
||||
.cra_priority = 100,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = SHA1_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = atmel_sha_hmac_cra_init,
|
||||
.cra_exit = atmel_sha_hmac_cra_exit,
|
||||
}
|
||||
}
|
||||
},
|
||||
{
|
||||
.init = atmel_sha_hmac_init,
|
||||
.update = atmel_sha_update,
|
||||
.final = atmel_sha_final,
|
||||
.digest = atmel_sha_hmac_digest,
|
||||
.setkey = atmel_sha_hmac_setkey,
|
||||
.export = atmel_sha_export,
|
||||
.import = atmel_sha_import,
|
||||
.halg = {
|
||||
.digestsize = SHA224_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct atmel_sha_reqctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(sha224)",
|
||||
.cra_driver_name = "atmel-hmac-sha224",
|
||||
.cra_priority = 100,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = SHA224_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = atmel_sha_hmac_cra_init,
|
||||
.cra_exit = atmel_sha_hmac_cra_exit,
|
||||
}
|
||||
}
|
||||
},
|
||||
{
|
||||
.init = atmel_sha_hmac_init,
|
||||
.update = atmel_sha_update,
|
||||
.final = atmel_sha_final,
|
||||
.digest = atmel_sha_hmac_digest,
|
||||
.setkey = atmel_sha_hmac_setkey,
|
||||
.export = atmel_sha_export,
|
||||
.import = atmel_sha_import,
|
||||
.halg = {
|
||||
.digestsize = SHA256_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct atmel_sha_reqctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(sha256)",
|
||||
.cra_driver_name = "atmel-hmac-sha256",
|
||||
.cra_priority = 100,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = SHA256_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = atmel_sha_hmac_cra_init,
|
||||
.cra_exit = atmel_sha_hmac_cra_exit,
|
||||
}
|
||||
}
|
||||
},
|
||||
{
|
||||
.init = atmel_sha_hmac_init,
|
||||
.update = atmel_sha_update,
|
||||
.final = atmel_sha_final,
|
||||
.digest = atmel_sha_hmac_digest,
|
||||
.setkey = atmel_sha_hmac_setkey,
|
||||
.export = atmel_sha_export,
|
||||
.import = atmel_sha_import,
|
||||
.halg = {
|
||||
.digestsize = SHA384_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct atmel_sha_reqctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(sha384)",
|
||||
.cra_driver_name = "atmel-hmac-sha384",
|
||||
.cra_priority = 100,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = SHA384_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = atmel_sha_hmac_cra_init,
|
||||
.cra_exit = atmel_sha_hmac_cra_exit,
|
||||
}
|
||||
}
|
||||
},
|
||||
{
|
||||
.init = atmel_sha_hmac_init,
|
||||
.update = atmel_sha_update,
|
||||
.final = atmel_sha_final,
|
||||
.digest = atmel_sha_hmac_digest,
|
||||
.setkey = atmel_sha_hmac_setkey,
|
||||
.export = atmel_sha_export,
|
||||
.import = atmel_sha_import,
|
||||
.halg = {
|
||||
.digestsize = SHA512_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct atmel_sha_reqctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(sha512)",
|
||||
.cra_driver_name = "atmel-hmac-sha512",
|
||||
.cra_priority = 100,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = SHA512_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = atmel_sha_hmac_cra_init,
|
||||
.cra_exit = atmel_sha_hmac_cra_exit,
|
||||
}
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
static void atmel_sha_unregister_algs(struct atmel_sha_dev *dd)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (dd->caps.has_hmac)
|
||||
for (i = 0; i < ARRAY_SIZE(sha_hmac_algs); i++)
|
||||
crypto_unregister_ahash(&sha_hmac_algs[i]);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sha_1_256_algs); i++)
|
||||
crypto_unregister_ahash(&sha_1_256_algs[i]);
|
||||
|
||||
|
|
@ -1563,8 +2144,21 @@ static int atmel_sha_register_algs(struct atmel_sha_dev *dd)
|
|||
}
|
||||
}
|
||||
|
||||
if (dd->caps.has_hmac) {
|
||||
for (i = 0; i < ARRAY_SIZE(sha_hmac_algs); i++) {
|
||||
err = crypto_register_ahash(&sha_hmac_algs[i]);
|
||||
if (err)
|
||||
goto err_sha_hmac_algs;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
/*i = ARRAY_SIZE(sha_hmac_algs);*/
|
||||
err_sha_hmac_algs:
|
||||
for (j = 0; j < i; j++)
|
||||
crypto_unregister_ahash(&sha_hmac_algs[j]);
|
||||
i = ARRAY_SIZE(sha_384_512_algs);
|
||||
err_sha_384_512_algs:
|
||||
for (j = 0; j < i; j++)
|
||||
crypto_unregister_ahash(&sha_384_512_algs[j]);
|
||||
|
|
@ -1634,6 +2228,7 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
|
|||
dd->caps.has_sha224 = 0;
|
||||
dd->caps.has_sha_384_512 = 0;
|
||||
dd->caps.has_uihv = 0;
|
||||
dd->caps.has_hmac = 0;
|
||||
|
||||
/* keep only major version number */
|
||||
switch (dd->hw_version & 0xff0) {
|
||||
|
|
@ -1643,6 +2238,7 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
|
|||
dd->caps.has_sha224 = 1;
|
||||
dd->caps.has_sha_384_512 = 1;
|
||||
dd->caps.has_uihv = 1;
|
||||
dd->caps.has_hmac = 1;
|
||||
break;
|
||||
case 0x420:
|
||||
dd->caps.has_dma = 1;
|
||||
|
|
|
|||
Loading…
Reference in New Issue