irqchip/qcom-pdc: Add irqdomain for wakeup capable GPIOs
Introduce a new domain for wakeup capable GPIOs. The domain can be requested using the bus token DOMAIN_BUS_WAKEUP. In the following patches, we will specify PDC as the wakeup-parent for the TLMM GPIO irqchip. Requesting a wakeup GPIO will setup the GPIO and the corresponding PDC interrupt as its parent. Co-developed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1573855915-9841-5-git-send-email-ilina@codeaurora.org
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@ -13,12 +13,13 @@
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/soc/qcom/irq.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#define PDC_MAX_IRQS 168
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#define PDC_MAX_GPIO_IRQS 256
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#define CLEAR_INTR(reg, intr) (reg & ~(1 << intr))
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#define ENABLE_INTR(reg, intr) (reg | (1 << intr))
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@ -26,6 +27,8 @@
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#define IRQ_ENABLE_BANK 0x10
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#define IRQ_i_CFG 0x110
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#define PDC_NO_PARENT_IRQ ~0UL
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struct pdc_pin_region {
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u32 pin_base;
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u32 parent_base;
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@ -65,23 +68,35 @@ static void pdc_enable_intr(struct irq_data *d, bool on)
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static void qcom_pdc_gic_disable(struct irq_data *d)
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{
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if (d->hwirq == GPIO_NO_WAKE_IRQ)
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return;
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pdc_enable_intr(d, false);
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irq_chip_disable_parent(d);
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}
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static void qcom_pdc_gic_enable(struct irq_data *d)
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{
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if (d->hwirq == GPIO_NO_WAKE_IRQ)
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return;
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pdc_enable_intr(d, true);
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irq_chip_enable_parent(d);
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}
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static void qcom_pdc_gic_mask(struct irq_data *d)
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{
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if (d->hwirq == GPIO_NO_WAKE_IRQ)
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return;
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irq_chip_mask_parent(d);
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}
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static void qcom_pdc_gic_unmask(struct irq_data *d)
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{
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if (d->hwirq == GPIO_NO_WAKE_IRQ)
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return;
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irq_chip_unmask_parent(d);
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}
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@ -124,6 +139,9 @@ static int qcom_pdc_gic_set_type(struct irq_data *d, unsigned int type)
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int pin_out = d->hwirq;
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enum pdc_irq_config_bits pdc_type;
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if (pin_out == GPIO_NO_WAKE_IRQ)
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return 0;
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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pdc_type = PDC_EDGE_RISING;
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@ -181,8 +199,7 @@ static irq_hw_number_t get_parent_hwirq(int pin)
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return (region->parent_base + pin - region->pin_base);
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}
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WARN_ON(1);
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return ~0UL;
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return PDC_NO_PARENT_IRQ;
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}
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static int qcom_pdc_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
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@ -211,17 +228,17 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq,
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ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type);
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if (ret)
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return -EINVAL;
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parent_hwirq = get_parent_hwirq(hwirq);
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if (parent_hwirq == ~0UL)
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return -EINVAL;
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return ret;
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ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
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&qcom_pdc_gic_chip, NULL);
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if (ret)
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return ret;
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parent_hwirq = get_parent_hwirq(hwirq);
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if (parent_hwirq == PDC_NO_PARENT_IRQ)
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return 0;
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if (type & IRQ_TYPE_EDGE_BOTH)
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type = IRQ_TYPE_EDGE_RISING;
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@ -244,6 +261,60 @@ static const struct irq_domain_ops qcom_pdc_ops = {
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.free = irq_domain_free_irqs_common,
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};
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static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *data)
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{
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struct irq_fwspec *fwspec = data;
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struct irq_fwspec parent_fwspec;
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irq_hw_number_t hwirq, parent_hwirq;
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unsigned int type;
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int ret;
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ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type);
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if (ret)
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return ret;
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ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
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&qcom_pdc_gic_chip, NULL);
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if (ret)
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return ret;
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if (hwirq == GPIO_NO_WAKE_IRQ)
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return 0;
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parent_hwirq = get_parent_hwirq(hwirq);
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if (parent_hwirq == PDC_NO_PARENT_IRQ)
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return 0;
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if (type & IRQ_TYPE_EDGE_BOTH)
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type = IRQ_TYPE_EDGE_RISING;
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if (type & IRQ_TYPE_LEVEL_MASK)
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type = IRQ_TYPE_LEVEL_HIGH;
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parent_fwspec.fwnode = domain->parent->fwnode;
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parent_fwspec.param_count = 3;
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parent_fwspec.param[0] = 0;
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parent_fwspec.param[1] = parent_hwirq;
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parent_fwspec.param[2] = type;
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return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,
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&parent_fwspec);
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}
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static int qcom_pdc_gpio_domain_select(struct irq_domain *d,
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struct irq_fwspec *fwspec,
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enum irq_domain_bus_token bus_token)
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{
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return bus_token == DOMAIN_BUS_WAKEUP;
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}
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static const struct irq_domain_ops qcom_pdc_gpio_ops = {
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.select = qcom_pdc_gpio_domain_select,
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.alloc = qcom_pdc_gpio_alloc,
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.free = irq_domain_free_irqs_common,
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};
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static int pdc_setup_pin_mapping(struct device_node *np)
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{
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int ret, n;
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@ -282,7 +353,7 @@ static int pdc_setup_pin_mapping(struct device_node *np)
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static int qcom_pdc_init(struct device_node *node, struct device_node *parent)
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{
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struct irq_domain *parent_domain, *pdc_domain;
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struct irq_domain *parent_domain, *pdc_domain, *pdc_gpio_domain;
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int ret;
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pdc_base = of_iomap(node, 0);
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@ -313,8 +384,23 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent)
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goto fail;
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}
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pdc_gpio_domain = irq_domain_create_hierarchy(parent_domain,
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IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP,
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PDC_MAX_GPIO_IRQS,
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of_fwnode_handle(node),
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&qcom_pdc_gpio_ops, NULL);
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if (!pdc_gpio_domain) {
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pr_err("%pOF: PDC domain add failed for GPIO domain\n", node);
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ret = -ENOMEM;
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goto remove;
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}
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irq_domain_update_bus_token(pdc_gpio_domain, DOMAIN_BUS_WAKEUP);
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return 0;
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remove:
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irq_domain_remove(pdc_domain);
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fail:
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kfree(pdc_region);
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iounmap(pdc_base);
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21
include/linux/soc/qcom/irq.h
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21
include/linux/soc/qcom/irq.h
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@ -0,0 +1,21 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __QCOM_IRQ_H
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#define __QCOM_IRQ_H
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#include <linux/irqdomain.h>
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#define GPIO_NO_WAKE_IRQ ~0U
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/**
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* QCOM specific IRQ domain flags that distinguishes the handling of wakeup
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* capable interrupts by different interrupt controllers.
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*
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* IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP: Line must be masked at TLMM and the
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* interrupt configuration is done at PDC
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* IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP: Interrupt configuration is handled at TLMM
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*/
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#define IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 0)
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#define IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 1)
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#endif
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