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arm64: dts: meson: g12a: Add SAR ADC node 

This patch adds the SAR ADC controller node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
hifive-unleashed-5.2
Neil Armstrong 2019-03-25 11:03:37 +01:00 committed by Kevin Hilman
parent 55fbc7287e
commit 820873cf38
1 changed files with 15 additions and 0 deletions
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15
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
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@ -5,6 +5,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/g12a-clkc.h>
#include <dt-bindings/clock/g12a-aoclkc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -290,6 +291,20 @@
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
saradc: adc@9000 {
compatible = "amlogic,meson-g12a-saradc",
"amlogic,meson-saradc";
reg = <0x0 0x9000 0x0 0x48>;
#io-channel-cells = <1>;
interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>,
<&clkc_AO CLKID_AO_SAR_ADC>,
<&clkc_AO CLKID_AO_SAR_ADC_CLK>,
<&clkc_AO CLKID_AO_SAR_ADC_SEL>;
clock-names = "clkin", "core", "adc_clk", "adc_sel";
status = "disabled";
};
};
gic: interrupt-controller@ffc01000 {