usb: chipidea: add OTG fsm operation functions implementation
Add OTG HNP and SRP operation functions implementation: - charge vbus - drive vbus - connection signaling - drive sof - start data pulse - add fsm timer - delete fsm timer - start host - start gadget Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>hifive-unleashed-5.1
Li Jun
Greg Kroah-Hartman
parent
95f5555fa0
commit
826cfe751f
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@ -44,9 +44,14 @@
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#define DEVICEADDR_USBADR (0x7FUL << 25)
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/* PORTSC */
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#define PORTSC_CCS BIT(0)
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#define PORTSC_CSC BIT(1)
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#define PORTSC_PEC BIT(3)
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#define PORTSC_OCC BIT(5)
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#define PORTSC_FPR BIT(6)
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#define PORTSC_SUSP BIT(7)
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#define PORTSC_HSP BIT(9)
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#define PORTSC_PP BIT(12)
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#define PORTSC_PTC (0x0FUL << 16)
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#define PORTSC_PHCD(d) ((d) ? BIT(22) : BIT(23))
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/* PTS and PTW for non lpm version only */
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@ -56,6 +61,9 @@
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#define PORTSC_PTW BIT(28)
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#define PORTSC_STS BIT(29)
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#define PORTSC_W1C_BITS \
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(PORTSC_CSC | PORTSC_PEC | PORTSC_OCC)
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/* DEVLC */
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#define DEVLC_PFSC BIT(23)
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#define DEVLC_PSPD (0x03UL << 25)
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@ -72,6 +80,7 @@
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/* OTGSC */
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#define OTGSC_IDPU BIT(5)
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#define OTGSC_HADP BIT(6)
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#define OTGSC_ID BIT(8)
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#define OTGSC_AVV BIT(9)
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#define OTGSC_ASV BIT(10)
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@ -141,6 +141,7 @@ struct hw_bank {
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* @role: current role
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* @is_otg: if the device is otg-capable
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* @fsm: otg finite state machine
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* @fsm_timer: pointer to timer list of otg fsm
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* @work: work for role changing
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* @wq: workqueue thread
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* @qh_pool: allocation pool for queue heads
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@ -177,6 +178,7 @@ struct ci_hdrc {
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enum ci_role role;
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bool is_otg;
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struct otg_fsm fsm;
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struct ci_otg_fsm_timer_list *fsm_timer;
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struct work_struct work;
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struct workqueue_struct *wq;
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@ -19,12 +19,208 @@
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#include <linux/usb/gadget.h>
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#include <linux/usb/hcd.h>
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#include <linux/usb/chipidea.h>
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#include <linux/regulator/consumer.h>
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#include "ci.h"
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#include "bits.h"
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#include "otg.h"
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#include "otg_fsm.h"
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/*
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* Add timer to active timer list
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*/
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static void ci_otg_add_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
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{
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struct ci_otg_fsm_timer *tmp_timer;
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struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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if (t >= NUM_CI_OTG_FSM_TIMERS)
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return;
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/*
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* Check if the timer is already in the active list,
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* if so update timer count
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*/
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list_for_each_entry(tmp_timer, active_timers, list)
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if (tmp_timer == timer) {
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timer->count = timer->expires;
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return;
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}
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timer->count = timer->expires;
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list_add_tail(&timer->list, active_timers);
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/* Enable 1ms irq */
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if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
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hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
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}
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/*
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* Remove timer from active timer list
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*/
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static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
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{
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struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
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struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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if (t >= NUM_CI_OTG_FSM_TIMERS)
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return;
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list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
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if (tmp_timer == timer)
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list_del(&timer->list);
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/* Disable 1ms irq if there is no any active timer */
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if (list_empty(active_timers))
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hw_write_otgsc(ci, OTGSC_1MSIE, 0);
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}
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/* -------------------------------------------------------------*/
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/* Operations that will be called from OTG Finite State Machine */
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/* -------------------------------------------------------------*/
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static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (t < NUM_OTG_FSM_TIMERS)
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ci_otg_add_timer(ci, t);
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return;
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}
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static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (t < NUM_OTG_FSM_TIMERS)
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ci_otg_del_timer(ci, t);
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return;
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}
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/*
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* A-device drive vbus: turn on vbus regulator and enable port power
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* Data pulse irq should be disabled while vbus is on.
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*/
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static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
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{
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int ret;
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (on) {
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/* Enable power power */
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hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
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PORTSC_PP);
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if (ci->platdata->reg_vbus) {
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ret = regulator_enable(ci->platdata->reg_vbus);
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if (ret) {
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dev_err(ci->dev,
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"Failed to enable vbus regulator, ret=%d\n",
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ret);
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return;
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}
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}
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/* Disable data pulse irq */
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hw_write_otgsc(ci, OTGSC_DPIE, 0);
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fsm->a_srp_det = 0;
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fsm->power_up = 0;
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} else {
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if (ci->platdata->reg_vbus)
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regulator_disable(ci->platdata->reg_vbus);
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fsm->a_bus_drop = 1;
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fsm->a_bus_req = 0;
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}
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}
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/*
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* Control data line by Run Stop bit.
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*/
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static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (on)
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hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
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else
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hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
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}
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/*
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* Generate SOF by host.
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* This is controlled through suspend/resume the port.
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* In host mode, controller will automatically send SOF.
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* Suspend will block the data on the port.
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*/
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static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (on)
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hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_FPR,
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PORTSC_FPR);
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else
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hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_SUSP,
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PORTSC_SUSP);
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}
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/*
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* Start SRP pulsing by data-line pulsing,
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* no v-bus pulsing followed
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*/
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static void ci_otg_start_pulse(struct otg_fsm *fsm)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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/* Hardware Assistant Data pulse */
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hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
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ci_otg_add_timer(ci, B_DATA_PLS);
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}
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static int ci_otg_start_host(struct otg_fsm *fsm, int on)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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mutex_unlock(&fsm->lock);
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if (on) {
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ci_role_stop(ci);
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ci_role_start(ci, CI_ROLE_HOST);
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} else {
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ci_role_stop(ci);
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hw_device_reset(ci, USBMODE_CM_DC);
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ci_role_start(ci, CI_ROLE_GADGET);
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}
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mutex_lock(&fsm->lock);
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return 0;
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}
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static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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mutex_unlock(&fsm->lock);
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if (on)
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usb_gadget_vbus_connect(&ci->gadget);
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else
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usb_gadget_vbus_disconnect(&ci->gadget);
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mutex_lock(&fsm->lock);
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return 0;
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}
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static struct otg_fsm_ops ci_otg_ops = {
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.drv_vbus = ci_otg_drv_vbus,
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.loc_conn = ci_otg_loc_conn,
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.loc_sof = ci_otg_loc_sof,
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.start_pulse = ci_otg_start_pulse,
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.add_timer = ci_otg_fsm_add_timer,
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.del_timer = ci_otg_fsm_del_timer,
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.start_host = ci_otg_start_host,
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.start_gadget = ci_otg_start_gadget,
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};
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int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
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{
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struct usb_otg *otg;
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@ -44,6 +240,7 @@ int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
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ci->fsm.power_up = 1;
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ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
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ci->transceiver->state = OTG_STATE_UNDEFINED;
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ci->fsm.ops = &ci_otg_ops;
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mutex_init(&ci->fsm.lock);
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@ -13,6 +13,31 @@
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#include <linux/usb/otg-fsm.h>
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enum ci_otg_fsm_timer_index {
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/*
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* CI specific timers, start from the end
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* of standard and auxiliary OTG timers
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*/
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B_DATA_PLS = NUM_OTG_FSM_TIMERS,
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B_SSEND_SRP,
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B_SESS_VLD,
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NUM_CI_OTG_FSM_TIMERS,
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};
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struct ci_otg_fsm_timer {
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unsigned long expires; /* Number of count increase to timeout */
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unsigned long count; /* Tick counter */
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void (*function)(void *, unsigned long); /* Timeout function */
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unsigned long data; /* Data passed to function */
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struct list_head list;
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};
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struct ci_otg_fsm_timer_list {
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struct ci_otg_fsm_timer *timer_list[NUM_CI_OTG_FSM_TIMERS];
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struct list_head active_timers;
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};
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#ifdef CONFIG_USB_OTG_FSM
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int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
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