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ASoC: Updates for v3.9

Browse source 
A fairly quiet release for ASoC:
 
 - Support for a wider range of hardware in the compressed stream code.
 - The ability to mute capture streams as well as playback streams while
   inactive.
 - DT support for AK4642, FSI, Samsung I2S and WM8962.
 - AC'97 support for Tegra.
 - New driver for max98090, replacing the stub which was there.
 
 Due to dependencies we've also got support for asynchronous I/O in regmap
 and DTification of DMA support for Samsung platforms (used only by the
 I2S driver and SPI) merged here as well.
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Merge tag 'asoc-3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next

ASoC: Updates for v3.9

A fairly quiet release for ASoC:

- Support for a wider range of hardware in the compressed stream code.
- The ability to mute capture streams as well as playback streams while
  inactive.
- DT support for AK4642, FSI, Samsung I2S and WM8962.
- AC'97 support for Tegra.
- New driver for max98090, replacing the stub which was there.

Due to dependencies we've also got support for asynchronous I/O in regmap
and DTification of DMA support for Samsung platforms (used only by the
I2S driver and SPI) merged here as well.
This commit is contained in:
Takashi Iwai 2013-02-11 14:03:37 +01:00
parent e9a25e04b8 699ba4546c
commit 83048ea7b1
532 changed files with 11505 additions and 4192 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
Documentation/device-mapper/dm-raid.txt
View file

@ -141,3 +141,4 @@ Version History
1.2.0 Handle creation of arrays that contain failed devices.
1.3.0 Added support for RAID 10
1.3.1 Allow device replacement/rebuild for RAID 10
1.3.2 Fix/improve redundancy checking for RAID10

17
Documentation/devicetree/bindings/sound/ak4642.txt Normal file
View file

@ -0,0 +1,17 @@
AK4642 I2C transmitter
This device supports I2C mode only.
Required properties:
- compatible : "asahi-kasei,ak4642" or "asahi-kasei,ak4643" or "asahi-kasei,ak4648"
- reg : The chip select number on the I2C bus
Example:
&i2c {
ak4648: ak4648@0x12 {
compatible = "asahi-kasei,ak4642";
reg = <0x12>;
};
};

12
Documentation/devicetree/bindings/sound/cs4271.txt
View file

@ -20,6 +20,18 @@ Optional properties:
!RESET pin
- cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
is enabled.
- cirrus,enable-soft-reset:
The CS4271 requires its LRCLK and MCLK to be stable before its RESET
line is de-asserted. That also means that clocks cannot be changed
without putting the chip back into hardware reset, which also requires
a complete re-initialization of all registers.
One (undocumented) workaround is to assert and de-assert the PDN bit
in the MODE2 register. This workaround can be enabled with this DT
property.
Note that this is not needed in case the clocks are stable
throughout the entire runtime of the codec.
Examples:

51
Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt Normal file
View file

@ -0,0 +1,51 @@
NVIDIA Tegra audio complex
Required properties:
- compatible : "nvidia,tegra-audio-wm9712"
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the WM9712's pins, and the jacks on the board:
WM9712 pins:
* MONOOUT
* HPOUTL
* HPOUTR
* LOUT2
* ROUT2
* OUT3
* LINEINL
* LINEINR
* PHONE
* PCBEEP
* MIC1
* MIC2
* Mic Bias
Board connectors:
* Headphone
* LineIn
* Mic
- nvidia,ac97-controller : The phandle of the Tegra AC97 controller
Example:
sound {
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
"nvidia,tegra-audio-wm9712";
nvidia,model = "Toradex Colibri T20";
nvidia,audio-routing =
"Headphone", "HPOUTL",
"Headphone", "HPOUTR",
"LineIn", "LINEINL",
"LineIn", "LINEINR",
"Mic", "MIC1";
nvidia,ac97-controller = <&ac97>;
};

22
Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt Normal file
View file

@ -0,0 +1,22 @@
NVIDIA Tegra 20 AC97 controller
Required properties:
- compatible : "nvidia,tegra20-ac97"
- reg : Should contain AC97 controller registers location and length
- interrupts : Should contain AC97 interrupt
- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
request selector for the AC97 controller
- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
of the GPIO used to reset the external AC97 codec
- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
of the GPIO corresponding with the AC97 DAP _FS line
Example:
ac97@70002000 {
compatible = "nvidia,tegra20-ac97";
reg = <0x70002000 0x200>;
interrupts = <0 81 0x04>;
nvidia,dma-request-selector = <&apbdma 12>;
nvidia,codec-reset-gpio = <&gpio 170 0>;
nvidia,codec-sync-gpio = <&gpio 120 0>;
};

46
Documentation/devicetree/bindings/sound/omap-twl4030.txt
View file

@ -6,6 +6,52 @@ Required properties:
- ti,mcbsp: phandle for the McBSP node
- ti,codec: phandle for the twl4030 audio node
Optional properties:
- ti,mcbsp-voice: phandle for the McBSP node connected to the voice port of twl
- ti, jack-det-gpio: Jack detect GPIO
- ti,audio-routing: List of connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source.
If the routing is not provided all possible connection will be available
Available audio endpoints for the audio-routing table:
Board connectors:
* Headset Stereophone
* Earpiece Spk
* Handsfree Spk
* Ext Spk
* Main Mic
* Sub Mic
* Headset Mic
* Carkit Mic
* Digital0 Mic
* Digital1 Mic
* Line In
twl4030 pins:
* HSOL
* HSOR
* EARPIECE
* HFL
* HFR
* PREDRIVEL
* PREDRIVER
* CARKITL
* CARKITR
* MAINMIC
* SUBMIC
* HSMIC
* DIGIMIC0
* DIGIMIC1
* CARKITMIC
* AUXL
* AUXR
* Headset Mic Bias
* Mic Bias 1 /* Used for Main Mic or Digimic0 */
* Mic Bias 2 /* Used for Sub Mic or Digimic1 */
Example:
sound {

26
Documentation/devicetree/bindings/sound/renesas,fsi.txt Normal file
View file

@ -0,0 +1,26 @@
Renesas FSI
Required properties:
- compatible : "renesas,sh_fsi2" or "renesas,sh_fsi"
- reg : Should contain the register physical address and length
- interrupts : Should contain FSI interrupt
- fsia,spdif-connection : FSI is connected by S/PDFI
- fsia,stream-mode-support : FSI supports 16bit stream mode.
- fsia,use-internal-clock : FSI uses internal clock when master mode.
- fsib,spdif-connection : same as fsia
- fsib,stream-mode-support : same as fsia
- fsib,use-internal-clock : same as fsia
Example:
sh_fsi2: sh_fsi2@0xec230000 {
compatible = "renesas,sh_fsi2";
reg = <0xec230000 0x400>;
interrupts = <0 146 0x4>;
fsia,spdif-connection;
fsia,stream-mode-support;
fsia,use-internal-clock;
};

14
Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt Normal file
View file

@ -0,0 +1,14 @@
Samsung SMDK audio complex
Required properties:
- compatible : "samsung,smdk-wm8994"
- samsung,i2s-controller: The phandle of the Samsung I2S0 controller
- samsung,audio-codec: The phandle of the WM8994 audio codec
Example:
sound {
compatible = "samsung,smdk-wm8994";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&wm8994>;
};

63
Documentation/devicetree/bindings/sound/samsung-i2s.txt Normal file
View file

@ -0,0 +1,63 @@
* Samsung I2S controller
Required SoC Specific Properties:
- compatible : "samsung,i2s-v5"
- reg: physical base address of the controller and length of memory mapped
region.
- dmas: list of DMA controller phandle and DMA request line ordered pairs.
- dma-names: identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas.
Optional SoC Specific Properties:
- samsung,supports-6ch: If the I2S Primary sound source has 5.1 Channel
support, this flag is enabled.
- samsung,supports-rstclr: This flag should be set if I2S software reset bit
control is required. When this flag is set I2S software reset bit will be
enabled or disabled based on need.
- samsung,supports-secdai:If I2S block has a secondary FIFO and internal DMA,
then this flag is enabled.
- samsung,idma-addr: Internal DMA register base address of the audio
sub system(used in secondary sound source).
Required Board Specific Properties:
- gpios: The gpio specifier for data out,data in, LRCLK, CDCLK and SCLK
interface lines. The format of the gpio specifier depends on the gpio
controller.
The syntax of samsung gpio specifier is
<[phandle of the gpio controller node]
[pin number within the gpio controller]
[mux function]
[flags and pull up/down]
[drive strength]>
Example:
- SoC Specific Portion:
i2s@03830000 {
compatible = "samsung,i2s-v5";
reg = <0x03830000 0x100>;
dmas = <&pdma0 10
&pdma0 9
&pdma0 8>;
dma-names = "tx", "rx", "tx-sec";
samsung,supports-6ch;
samsung,supports-rstclr;
samsung,supports-secdai;
samsung,idma-addr = <0x03000000>;
};
- Board Specific Portion:
i2s@03830000 {
gpios = <&gpz 0 2 0 0>, /* I2S_0_SCLK */
<&gpz 1 2 0 0>, /* I2S_0_CDCLK */
<&gpz 2 2 0 0>, /* I2S_0_LRCK */
<&gpz 3 2 0 0>, /* I2S_0_SDI */
<&gpz 4 2 0 0>, /* I2S_0_SDO[1] */
<&gpz 5 2 0 0>, /* I2S_0_SDO[2] */
<&gpz 6 2 0 0>; /* I2S_0_SDO[3] */
};

6
Documentation/devicetree/bindings/sound/tlv320aic3x.txt
View file

@ -11,6 +11,12 @@ Optional properties:
- gpio-reset - gpio pin number used for codec reset
- ai3x-gpio-func - <array of 2 int> - AIC3X_GPIO1 & AIC3X_GPIO2 Functionality
- ai3x-micbias-vg - MicBias Voltage required.
1 - MICBIAS output is powered to 2.0V,
2 - MICBIAS output is powered to 2.5V,
3 - MICBIAS output is connected to AVDD,
If this node is not mentioned or if the value is incorrect, then MicBias
is powered down.
Example:

16
Documentation/devicetree/bindings/sound/wm8962.txt Normal file
View file

@ -0,0 +1,16 @@
WM8962 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "wlf,wm8962"
- reg : the I2C address of the device.
Example:
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
};

0
Documentation/hid/hid-sensor.txt Executable file → Normal file
View file

2
Documentation/kernel-parameters.txt
View file

@ -2438,7 +2438,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
real-time workloads. It can also improve energy
efficiency for asymmetric multiprocessors.
rcu_nocbs_poll [KNL,BOOT]
rcu_nocb_poll [KNL,BOOT]
Rather than requiring that offloaded CPUs
(specified by rcu_nocbs= above) explicitly
awaken the corresponding "rcuoN" kthreads,

27
Documentation/x86/boot.txt
View file

@ -57,6 +57,10 @@ Protocol 2.10: (Kernel 2.6.31) Added a protocol for relaxed alignment
Protocol 2.11: (Kernel 3.6) Added a field for offset of EFI handover
protocol entry point.
Protocol 2.12: (Kernel 3.8) Added the xloadflags field and extension fields
to struct boot_params for for loading bzImage and ramdisk
above 4G in 64bit.
**** MEMORY LAYOUT
The traditional memory map for the kernel loader, used for Image or
@ -182,7 +186,7 @@ Offset Proto Name Meaning
0230/4 2.05+ kernel_alignment Physical addr alignment required for kernel
0234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not
0235/1 2.10+ min_alignment Minimum alignment, as a power of two
0236/2 N/A pad3 Unused
0236/2 2.12+ xloadflags Boot protocol option flags
0238/4 2.06+ cmdline_size Maximum size of the kernel command line
023C/4 2.07+ hardware_subarch Hardware subarchitecture
0240/8 2.07+ hardware_subarch_data Subarchitecture-specific data
@ -582,6 +586,27 @@ Protocol: 2.10+
misaligned kernel. Therefore, a loader should typically try each
power-of-two alignment from kernel_alignment down to this alignment.
Field name: xloadflags
Type: read
Offset/size: 0x236/2
Protocol: 2.12+
This field is a bitmask.
Bit 0 (read): XLF_KERNEL_64
- If 1, this kernel has the legacy 64-bit entry point at 0x200.
Bit 1 (read): XLF_CAN_BE_LOADED_ABOVE_4G
- If 1, kernel/boot_params/cmdline/ramdisk can be above 4G.
Bit 2 (read): XLF_EFI_HANDOVER_32
- If 1, the kernel supports the 32-bit EFI handoff entry point
given at handover_offset.
Bit 3 (read): XLF_EFI_HANDOVER_64
- If 1, the kernel supports the 64-bit EFI handoff entry point
given at handover_offset + 0x200.
Field name: cmdline_size
Type: read
Offset/size: 0x238/4

4
Documentation/x86/zero-page.txt
View file

@ -19,6 +19,9 @@ Offset Proto Name Meaning
090/010 ALL hd1_info hd1 disk parameter, OBSOLETE!!
0A0/010 ALL sys_desc_table System description table (struct sys_desc_table)
0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends
0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits
0C4/004 ALL ext_ramdisk_size ramdisk_size high 32bits
0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
140/080 ALL edid_info Video mode setup (struct edid_info)
1C0/020 ALL efi_info EFI 32 information (struct efi_info)
1E0/004 ALL alk_mem_k Alternative mem check, in KB
@ -27,6 +30,7 @@ Offset Proto Name Meaning
1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)
1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer
(below)
1EF/001 ALL sentinel Used to detect broken bootloaders
290/040 ALL edd_mbr_sig_buffer EDD MBR signatures
2D0/A00 ALL e820_map E820 memory map table
(array of struct e820entry)

8
MAINTAINERS
View file

@ -1489,7 +1489,7 @@ AVR32 ARCHITECTURE
M: Haavard Skinnemoen <hskinnemoen@gmail.com>
M: Hans-Christian Egtvedt <egtvedt@samfundet.no>
W: http://www.atmel.com/products/AVR32/
W: http://avr32linux.org/
W: http://mirror.egtvedt.no/avr32linux.org/
W: http://avrfreaks.net/
S: Maintained
F: arch/avr32/
@ -2966,7 +2966,7 @@ S: Maintained
F: drivers/net/ethernet/i825xx/eexpress.*
ETHERNET BRIDGE
M: Stephen Hemminger <shemminger@vyatta.com>
M: Stephen Hemminger <stephen@networkplumber.org>
L: bridge@lists.linux-foundation.org
L: netdev@vger.kernel.org
W: http://www.linuxfoundation.org/en/Net:Bridge
@ -4905,7 +4905,7 @@ S: Maintained
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
M: Mirko Lindner <mlindner@marvell.com>
M: Stephen Hemminger <shemminger@vyatta.com>
M: Stephen Hemminger <stephen@networkplumber.org>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/marvell/sk*
@ -5180,7 +5180,7 @@ S: Supported
F: drivers/infiniband/hw/nes/
NETEM NETWORK EMULATOR
M: Stephen Hemminger <shemminger@vyatta.com>
M: Stephen Hemminger <stephen@networkplumber.org>
L: netem@lists.linux-foundation.org
S: Maintained
F: net/sched/sch_netem.c

4
Makefile
View file

@ -1,8 +1,8 @@
VERSION = 3
PATCHLEVEL = 8
SUBLEVEL = 0
EXTRAVERSION = -rc5
NAME = Terrified Chipmunk
EXTRAVERSION = -rc7
NAME = Unicycling Gorilla
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"

26
arch/arm/boot/dts/exynos5250-smdk5250.dts
View file

@ -49,6 +49,11 @@
compatible = "samsung,s524ad0xd1";
reg = <0x51>;
};
wm8994: wm8994@1a {
compatible = "wlf,wm8994";
reg = <0x1a>;
};
};
i2c@121D0000 {
@ -204,4 +209,25 @@
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
};
i2s0: i2s@03830000 {
gpios = <&gpz 0 2 0 0>, <&gpz 1 2 0 0>, <&gpz 2 2 0 0>,
<&gpz 3 2 0 0>, <&gpz 4 2 0 0>, <&gpz 5 2 0 0>,
<&gpz 6 2 0 0>;
};
i2s1: i2s@12D60000 {
status = "disabled";
};
i2s2: i2s@12D70000 {
status = "disabled";
};
sound {
compatible = "samsung,smdk-wm8994";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&wm8994>;
};
};

44
arch/arm/boot/dts/exynos5250.dtsi
View file

@ -211,8 +211,9 @@
compatible = "samsung,exynos4210-spi";
reg = <0x12d20000 0x100>;
interrupts = <0 66 0>;
tx-dma-channel = <&pdma0 5>; /* preliminary */
rx-dma-channel = <&pdma0 4>; /* preliminary */
dmas = <&pdma0 5
&pdma0 4>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
};
@ -221,8 +222,9 @@
compatible = "samsung,exynos4210-spi";
reg = <0x12d30000 0x100>;
interrupts = <0 67 0>;
tx-dma-channel = <&pdma1 5>; /* preliminary */
rx-dma-channel = <&pdma1 4>; /* preliminary */
dmas = <&pdma1 5
&pdma1 4>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
};
@ -231,8 +233,9 @@
compatible = "samsung,exynos4210-spi";
reg = <0x12d40000 0x100>;
interrupts = <0 68 0>;
tx-dma-channel = <&pdma0 7>; /* preliminary */
rx-dma-channel = <&pdma0 6>; /* preliminary */
dmas = <&pdma0 7
&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
};
@ -269,6 +272,35 @@
#size-cells = <0>;
};
i2s0: i2s@03830000 {
compatible = "samsung,i2s-v5";
reg = <0x03830000 0x100>;
dmas = <&pdma0 10
&pdma0 9
&pdma0 8>;
dma-names = "tx", "rx", "tx-sec";
samsung,supports-6ch;
samsung,supports-rstclr;
samsung,supports-secdai;
samsung,idma-addr = <0x03000000>;
};
i2s1: i2s@12D60000 {
compatible = "samsung,i2s-v5";
reg = <0x12D60000 0x100>;
dmas = <&pdma1 12
&pdma1 11>;
dma-names = "tx", "rx";
};
i2s2: i2s@12D70000 {
compatible = "samsung,i2s-v5";
reg = <0x12D70000 0x100>;
dmas = <&pdma0 12
&pdma0 11>;
dma-names = "tx", "rx";
};
amba {
#address-cells = <1>;
#size-cells = <1>;

25
arch/arm/common/gic.c
View file

@ -351,6 +351,25 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
irq_set_chained_handler(irq, gic_handle_cascade_irq);
}
static u8 gic_get_cpumask(struct gic_chip_data *gic)
{
void __iomem *base = gic_data_dist_base(gic);
u32 mask, i;
for (i = mask = 0; i < 32; i += 4) {
mask = readl_relaxed(base + GIC_DIST_TARGET + i);
mask |= mask >> 16;
mask |= mask >> 8;
if (mask)
break;
}
if (!mask)
pr_crit("GIC CPU mask not found - kernel will fail to boot.\n");
return mask;
}
static void __init gic_dist_init(struct gic_chip_data *gic)
{
unsigned int i;
@ -369,7 +388,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
/*
* Set all global interrupts to this CPU only.
*/
cpumask = readl_relaxed(base + GIC_DIST_TARGET + 0);
cpumask = gic_get_cpumask(gic);
cpumask |= cpumask << 8;
cpumask |= cpumask << 16;
for (i = 32; i < gic_irqs; i += 4)
writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
@ -400,7 +421,7 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
* Get what the GIC says our CPU mask is.
*/
BUG_ON(cpu >= NR_GIC_CPU_IF);
cpu_mask = readl_relaxed(dist_base + GIC_DIST_TARGET + 0);
cpu_mask = gic_get_cpumask(gic);
gic_cpu_map[cpu] = cpu_mask;
/*

2
arch/arm/include/asm/memory.h
View file

@ -37,7 +37,7 @@
*/
#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000))
#define TASK_UNMAPPED_BASE (UL(CONFIG_PAGE_OFFSET) / 3)
#define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M)
/*
* The maximum size of a 26-bit user space task.

2
arch/arm/mach-exynos/Kconfig
View file

@ -414,7 +414,7 @@ config MACH_EXYNOS4_DT
select CPU_EXYNOS4210
select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD
select PINCTRL
select PINCTRL_EXYNOS4
select PINCTRL_EXYNOS
select USE_OF
help
Machine support for Samsung Exynos4 machine with device tree enabled.

6
arch/arm/mach-exynos/mach-exynos5-dt.c
View file

@ -104,6 +104,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
"exynos-tmu", NULL),
OF_DEV_AUXDATA("samsung,i2s-v5", 0x03830000,
"samsung-i2s.0", NULL),
OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D60000,
"samsung-i2s.1", NULL),
OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D70000,
"samsung-i2s.2", NULL),
{},
};

20
arch/arm/mach-pxa/pxa27x.c
View file

@ -53,17 +53,25 @@ static unsigned long ac97_reset_config[] = {
GPIO95_AC97_nRESET,
};
void pxa27x_assert_ac97reset(int reset_gpio, int on)
void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)
{
/*
* This helper function is used to work around a bug in the pxa27x's
* ac97 controller during a warm reset. The configuration of the
* reset_gpio is changed as follows:
* to_gpio == true: configured to generic output gpio and driven high
* to_gpio == false: configured to ac97 controller alt fn AC97_nRESET
*/
if (reset_gpio == 113)
pxa2xx_mfp_config(on ? &ac97_reset_config[0] :
&ac97_reset_config[1], 1);
pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] :
&ac97_reset_config[1], 1);
if (reset_gpio == 95)
pxa2xx_mfp_config(on ? &ac97_reset_config[2] :
&ac97_reset_config[3], 1);
pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] :
&ac97_reset_config[3], 1);
}
EXPORT_SYMBOL_GPL(pxa27x_assert_ac97reset);
EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
/* Crystal clock: 13MHz */
#define BASE_CLK 13000000

2
arch/arm/mach-realview/include/mach/irqs-eb.h
View file

@ -115,7 +115,7 @@
/*
* Only define NR_IRQS if less than NR_IRQS_EB
*/
#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
#define NR_IRQS_EB (IRQ_EB_GIC_START + 128)
#if defined(CONFIG_MACH_REALVIEW_EB) \
&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))

42
arch/arm/mach-shmobile/board-ap4evb.c
View file

@ -657,14 +657,8 @@ static struct platform_device lcdc_device = {
/* FSI */
#define IRQ_FSI evt2irq(0x1840)
static struct sh_fsi_platform_info fsi_info = {
.port_a = {
.flags = SH_FSI_BRS_INV,
},
.port_b = {
.flags = SH_FSI_BRS_INV |
SH_FSI_BRM_INV |
SH_FSI_LRS_INV |
SH_FSI_CLK_CPG |
.flags = SH_FSI_CLK_CPG |
SH_FSI_FMT_SPDIF,
},
};
@ -692,21 +686,21 @@ static struct platform_device fsi_device = {
},
};
static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
.fmt = SND_SOC_DAIFMT_LEFT_J,
.codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
.cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
.sysclk = 11289600,
};
static struct asoc_simple_card_info fsi2_ak4643_info = {
.name = "AK4643",
.card = "FSI2A-AK4643",
.cpu_dai = "fsia-dai",
.codec = "ak4642-codec.0-0013",
.platform = "sh_fsi2",
.codec_dai = "ak4642-hifi",
.init = &fsi2_ak4643_init_info,
.daifmt = SND_SOC_DAIFMT_LEFT_J,
.cpu_dai = {
.name = "fsia-dai",
.fmt = SND_SOC_DAIFMT_CBS_CFS,
},
.codec_dai = {
.name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600,
},
};
static struct platform_device fsi_ak4643_device = {
@ -815,18 +809,18 @@ static struct platform_device lcdc1_device = {
},
};
static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
.cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
};
static struct asoc_simple_card_info fsi2_hdmi_info = {
.name = "HDMI",
.card = "FSI2B-HDMI",
.cpu_dai = "fsib-dai",
.codec = "sh-mobile-hdmi",
.platform = "sh_fsi2",
.codec_dai = "sh_mobile_hdmi-hifi",
.init = &fsi2_hdmi_init_info,
.cpu_dai = {
.name = "fsib-dai",
.fmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF,
},
.codec_dai = {
.name = "sh_mobile_hdmi-hifi",
},
};
static struct platform_device fsi_hdmi_device = {

34
arch/arm/mach-shmobile/board-armadillo800eva.c
View file

@ -806,21 +806,21 @@ static struct platform_device fsi_device = {
};
/* FSI-WM8978 */
static struct asoc_simple_dai_init_info fsi_wm8978_init_info = {
.fmt = SND_SOC_DAIFMT_I2S,
.codec_daifmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF,
.cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
.sysclk = 12288000,
};
static struct asoc_simple_card_info fsi_wm8978_info = {
.name = "wm8978",
.card = "FSI2A-WM8978",
.cpu_dai = "fsia-dai",
.codec = "wm8978.0-001a",
.platform = "sh_fsi2",
.codec_dai = "wm8978-hifi",
.init = &fsi_wm8978_init_info,
.daifmt = SND_SOC_DAIFMT_I2S,
.cpu_dai = {
.name = "fsia-dai",
.fmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_IB_NF,
},
.codec_dai = {
.name = "wm8978-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF,
.sysclk = 12288000,
},
};
static struct platform_device fsi_wm8978_device = {
@ -832,18 +832,18 @@ static struct platform_device fsi_wm8978_device = {
};
/* FSI-HDMI */
static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
.cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
};
static struct asoc_simple_card_info fsi2_hdmi_info = {
.name = "HDMI",
.card = "FSI2B-HDMI",
.cpu_dai = "fsib-dai",
.codec = "sh-mobile-hdmi",
.platform = "sh_fsi2",
.codec_dai = "sh_mobile_hdmi-hifi",
.init = &fsi2_hdmi_init_info,
.cpu_dai = {
.name = "fsib-dai",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
},
.codec_dai = {
.name = "sh_mobile_hdmi-hifi",
},
};
static struct platform_device fsi_hdmi_device = {

20
arch/arm/mach-shmobile/board-kzm9g.c
View file

@ -525,21 +525,21 @@ static struct platform_device fsi_device = {
},
};
static struct asoc_simple_dai_init_info fsi2_ak4648_init_info = {
.fmt = SND_SOC_DAIFMT_LEFT_J,
.codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
.cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
.sysclk = 11289600,
};
static struct asoc_simple_card_info fsi2_ak4648_info = {
.name = "AK4648",
.card = "FSI2A-AK4648",
.cpu_dai = "fsia-dai",
.codec = "ak4642-codec.0-0012",
.platform = "sh_fsi2",
.codec_dai = "ak4642-hifi",
.init = &fsi2_ak4648_init_info,
.daifmt = SND_SOC_DAIFMT_LEFT_J,
.cpu_dai = {
.name = "fsia-dai",
.fmt = SND_SOC_DAIFMT_CBS_CFS,
},
.codec_dai = {
.name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600,
},
};
static struct platform_device fsi_ak4648_device = {

42
arch/arm/mach-shmobile/board-mackerel.c
View file

@ -502,18 +502,18 @@ static struct platform_device hdmi_lcdc_device = {
},
};
static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
.cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
};
static struct asoc_simple_card_info fsi2_hdmi_info = {
.name = "HDMI",
.card = "FSI2B-HDMI",
.cpu_dai = "fsib-dai",
.codec = "sh-mobile-hdmi",
.platform = "sh_fsi2",
.codec_dai = "sh_mobile_hdmi-hifi",
.init = &fsi2_hdmi_init_info,
.cpu_dai = {
.name = "fsib-dai",
.fmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF,
},
.codec_dai = {
.name = "sh_mobile_hdmi-hifi",
},
};
static struct platform_device fsi_hdmi_device = {
@ -858,16 +858,12 @@ static struct platform_device leds_device = {
#define IRQ_FSI evt2irq(0x1840)
static struct sh_fsi_platform_info fsi_info = {
.port_a = {
.flags = SH_FSI_BRS_INV,
.tx_id = SHDMA_SLAVE_FSIA_TX,
.rx_id = SHDMA_SLAVE_FSIA_RX,
},
.port_b = {
.flags = SH_FSI_BRS_INV |
SH_FSI_BRM_INV |
SH_FSI_LRS_INV |
SH_FSI_CLK_CPG |
SH_FSI_FMT_SPDIF,
.flags = SH_FSI_CLK_CPG |
SH_FSI_FMT_SPDIF,
}
};
@ -896,21 +892,21 @@ static struct platform_device fsi_device = {
},
};
static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
.fmt = SND_SOC_DAIFMT_LEFT_J,
.codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
.cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
.sysclk = 11289600,
};
static struct asoc_simple_card_info fsi2_ak4643_info = {
.name = "AK4643",
.card = "FSI2A-AK4643",
.cpu_dai = "fsia-dai",
.codec = "ak4642-codec.0-0013",
.platform = "sh_fsi2",
.codec_dai = "ak4642-hifi",
.init = &fsi2_ak4643_init_info,
.daifmt = SND_SOC_DAIFMT_LEFT_J,
.cpu_dai = {
.name = "fsia-dai",
.fmt = SND_SOC_DAIFMT_CBS_CFS,
},
.codec_dai = {
.name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600,
},
};
static struct platform_device fsi_ak4643_device = {

2
arch/arm/mm/dma-mapping.c
View file

@ -640,7 +640,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
if (is_coherent || nommu())
addr = __alloc_simple_buffer(dev, size, gfp, &page);
else if (gfp & GFP_ATOMIC)
else if (!(gfp & __GFP_WAIT))
addr = __alloc_from_pool(size, &page);
else if (!IS_ENABLED(CONFIG_CMA))
addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);

10
arch/arm/plat-samsung/dma-ops.c
View file

@ -19,7 +19,8 @@
#include <mach/dma.h>
static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
struct samsung_dma_req *param)
struct samsung_dma_req *param,
struct device *dev, char *ch_name)
{
dma_cap_mask_t mask;
void *filter_param;
@ -33,7 +34,12 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
*/
filter_param = (dma_ch == DMACH_DT_PROP) ?
(void *)param->dt_dmach_prop : (void *)dma_ch;
return (unsigned)dma_request_channel(mask, pl330_filter, filter_param);
if (dev->of_node)
return (unsigned)dma_request_slave_channel(dev, ch_name);
else
return (unsigned)dma_request_channel(mask, pl330_filter,
filter_param);
}
static int samsung_dmadev_release(unsigned ch, void *param)

3
arch/arm/plat-samsung/include/plat/dma-ops.h
View file

@ -39,7 +39,8 @@ struct samsung_dma_config {
};
struct samsung_dma_ops {
unsigned (*request)(enum dma_ch ch, struct samsung_dma_req *param);
unsigned (*request)(enum dma_ch ch, struct samsung_dma_req *param,
struct device *dev, char *ch_name);
int (*release)(unsigned ch, void *param);
int (*config)(unsigned ch, struct samsung_dma_config *param);
int (*prepare)(unsigned ch, struct samsung_dma_prep *param);

3
arch/arm/plat-samsung/s3c-dma-ops.c
View file

@ -36,7 +36,8 @@ static void s3c_dma_cb(struct s3c2410_dma_chan *channel, void *param,
}
static unsigned s3c_dma_request(enum dma_ch dma_ch,
struct samsung_dma_req *param)
struct samsung_dma_req *param,
struct device *dev, char *ch_name)
{
struct cb_data *data;

10
arch/avr32/include/asm/dma-mapping.h
View file

@ -336,4 +336,14 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif /* __ASM_AVR32_DMA_MAPPING_H */

10
arch/blackfin/include/asm/dma-mapping.h
View file

@ -154,4 +154,14 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
_dma_sync((dma_addr_t)vaddr, size, dir);
}
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif /* _BLACKFIN_DMA_MAPPING_H */

15
arch/c6x/include/asm/dma-mapping.h
View file

@ -89,4 +89,19 @@ extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif /* _ASM_C6X_DMA_MAPPING_H */

10
arch/cris/include/asm/dma-mapping.h
View file

@ -158,5 +158,15 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
{
}
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif

15
arch/frv/include/asm/dma-mapping.h
View file

@ -132,4 +132,19 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
flush_write_buffers();
}
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif /* _ASM_DMA_MAPPING_H */

10
arch/m68k/include/asm/dma-mapping.h
View file

@ -115,4 +115,14 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t handle)
#include <asm-generic/dma-mapping-broken.h>
#endif
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif /* _M68K_DMA_MAPPING_H */

3
arch/mips/bcm47xx/Kconfig
View file

@ -8,8 +8,10 @@ config BCM47XX_SSB
select SSB_DRIVER_EXTIF
select SSB_EMBEDDED
select SSB_B43_PCI_BRIDGE if PCI
select SSB_DRIVER_PCICORE if PCI
select SSB_PCICORE_HOSTMODE if PCI
select SSB_DRIVER_GPIO
select GPIOLIB
default y
help
Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support.
@ -25,6 +27,7 @@ config BCM47XX_BCMA
select BCMA_HOST_PCI if PCI
select BCMA_DRIVER_PCI_HOSTMODE if PCI
select BCMA_DRIVER_GPIO
select GPIOLIB
default y
help
Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.

9
arch/mips/cavium-octeon/executive/cvmx-l2c.c
View file

@ -30,6 +30,7 @@
* measurement, and debugging facilities.
*/
#include <linux/compiler.h>
#include <linux/irqflags.h>
#include <asm/octeon/cvmx.h>
#include <asm/octeon/cvmx-l2c.h>
@ -285,22 +286,22 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
*/
static void fault_in(uint64_t addr, int len)
{
volatile char *ptr;
volatile char dummy;
char *ptr;
/*
* Adjust addr and length so we get all cache lines even for
* small ranges spanning two cache lines.
*/
len += addr & CVMX_CACHE_LINE_MASK;
addr &= ~CVMX_CACHE_LINE_MASK;
ptr = (volatile char *)cvmx_phys_to_ptr(addr);
ptr = cvmx_phys_to_ptr(addr);
/*
* Invalidate L1 cache to make sure all loads result in data
* being in L2.
*/
CVMX_DCACHE_INVALIDATE;
while (len > 0) {
dummy += *ptr;
ACCESS_ONCE(*ptr);
len -= CVMX_CACHE_LINE_SIZE;
ptr += CVMX_CACHE_LINE_SIZE;
}

2
arch/mips/include/asm/dsp.h
View file

@ -16,7 +16,7 @@
#include <asm/mipsregs.h>
#define DSP_DEFAULT 0x00000000
#define DSP_MASK 0x3ff
#define DSP_MASK 0x3f
#define __enable_dsp_hazard() \
do { \

1
arch/mips/include/asm/inst.h
View file

@ -353,6 +353,7 @@ union mips_instruction {
struct u_format u_format;
struct c_format c_format;
struct r_format r_format;
struct p_format p_format;
struct f_format f_format;
struct ma_format ma_format;
struct b_format b_format;

2
arch/mips/include/asm/mach-pnx833x/war.h
View file

@ -21,4 +21,4 @@
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
#endif /* __ASM_MIPS_MACH_PNX8550_WAR_H */
#endif /* __ASM_MIPS_MACH_PNX833X_WAR_H */

1
arch/mips/include/asm/pgtable-64.h
View file

@ -230,6 +230,7 @@ static inline void pud_clear(pud_t *pudp)
#else
#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))
#define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
#endif
#define __pgd_offset(address) pgd_index(address)

1
arch/mips/include/uapi/asm/Kbuild
View file

@ -3,6 +3,7 @@ include include/uapi/asm-generic/Kbuild.asm
header-y += auxvec.h
header-y += bitsperlong.h
header-y += break.h
header-y += byteorder.h
header-y += cachectl.h
header-y += errno.h

0
arch/mips/include/asm/break.h → arch/mips/include/uapi/asm/break.h
View file

36
arch/mips/kernel/ftrace.c
View file

@ -25,6 +25,12 @@
#define MCOUNT_OFFSET_INSNS 4
#endif
/* Arch override because MIPS doesn't need to run this from stop_machine() */
void arch_ftrace_update_code(int command)
{
ftrace_modify_all_code(command);
}
/*
* Check if the address is in kernel space
*
@ -89,6 +95,24 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
return 0;
}
#ifndef CONFIG_64BIT
static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1,
unsigned int new_code2)
{
int faulted;
safe_store_code(new_code1, ip, faulted);
if (unlikely(faulted))
return -EFAULT;
ip += 4;
safe_store_code(new_code2, ip, faulted);
if (unlikely(faulted))
return -EFAULT;
flush_icache_range(ip, ip + 8); /* original ip + 12 */
return 0;
}
#endif
/*
* The details about the calling site of mcount on MIPS
*
@ -131,8 +155,18 @@ int ftrace_make_nop(struct module *mod,
* needed.
*/
new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F;
#ifdef CONFIG_64BIT
return ftrace_modify_code(ip, new);
#else
/*
* On 32 bit MIPS platforms, gcc adds a stack adjust
* instruction in the delay slot after the branch to
* mcount and expects mcount to restore the sp on return.
* This is based on a legacy API and does nothing but
* waste instructions so it's being removed at runtime.
*/
return ftrace_modify_code_2(ip, new, INSN_NOP);
#endif
}
int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)

7
arch/mips/kernel/mcount.S
View file

@ -46,9 +46,8 @@
PTR_L a5, PT_R9(sp)
PTR_L a6, PT_R10(sp)
PTR_L a7, PT_R11(sp)
PTR_ADDIU sp, PT_SIZE
#else
PTR_ADDIU sp, (PT_SIZE + 8)
PTR_ADDIU sp, PT_SIZE
#endif
.endm
@ -69,7 +68,9 @@ NESTED(ftrace_caller, PT_SIZE, ra)
.globl _mcount
_mcount:
b ftrace_stub
nop
addiu sp,sp,8
/* When tracing is activated, it calls ftrace_caller+8 (aka here) */
lw t1, function_trace_stop
bnez t1, ftrace_stub
nop

2
arch/mips/kernel/vpe.c
View file

@ -705,7 +705,7 @@ static int vpe_run(struct vpe * v)
printk(KERN_WARNING
"VPE loader: TC %d is already in use.\n",
t->index);
v->tc->index);
return -ENOEXEC;
}
} else {

2
arch/mips/lantiq/irq.c
View file

@ -408,7 +408,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
#endif
/* tell oprofile which irq to use */
cp0_perfcount_irq = LTQ_PERF_IRQ;
cp0_perfcount_irq = irq_create_mapping(ltq_domain, LTQ_PERF_IRQ);
/*
* if the timer irq is not one of the mips irqs we need to

2
arch/mips/lib/delay.c
View file

@ -21,7 +21,7 @@ void __delay(unsigned long loops)
" .set noreorder \n"
" .align 3 \n"
"1: bnez %0, 1b \n"
#if __SIZEOF_LONG__ == 4
#if BITS_PER_LONG == 32
" subu %0, 1 \n"
#else
" dsubu %0, 1 \n"

6
arch/mips/mm/ioremap.c
View file

@ -190,9 +190,3 @@ void __iounmap(const volatile void __iomem *addr)
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(__iounmap);
int __virt_addr_valid(const volatile void *kaddr)
{
return pfn_valid(PFN_DOWN(virt_to_phys(kaddr)));
}
EXPORT_SYMBOL_GPL(__virt_addr_valid);

6
arch/mips/mm/mmap.c
View file

@ -192,3 +192,9 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
return ret;
}
int __virt_addr_valid(const volatile void *kaddr)
{
return pfn_valid(PFN_DOWN(virt_to_phys(kaddr)));
}
EXPORT_SYMBOL_GPL(__virt_addr_valid);

5
arch/mips/netlogic/xlr/setup.c
View file

@ -193,8 +193,11 @@ static void nlm_init_node(void)
void __init prom_init(void)
{
int i, *argv, *envp; /* passed as 32 bit ptrs */
int *argv, *envp; /* passed as 32 bit ptrs */
struct psb_info *prom_infop;
#ifdef CONFIG_SMP
int i;
#endif
/* truncate to 32 bit and sign extend all args */
argv = (int *)(long)(int)fw_arg1;

2
arch/mips/pci/pci-ar71xx.c
View file

@ -24,7 +24,7 @@
#include <asm/mach-ath79/pci.h>
#define AR71XX_PCI_MEM_BASE 0x10000000
#define AR71XX_PCI_MEM_SIZE 0x08000000
#define AR71XX_PCI_MEM_SIZE 0x07000000
#define AR71XX_PCI_WIN0_OFFS 0x10000000
#define AR71XX_PCI_WIN1_OFFS 0x11000000

2
arch/mips/pci/pci-ar724x.c
View file

@ -21,7 +21,7 @@
#define AR724X_PCI_CTRL_SIZE 0x100
#define AR724X_PCI_MEM_BASE 0x10000000
#define AR724X_PCI_MEM_SIZE 0x08000000
#define AR724X_PCI_MEM_SIZE 0x04000000
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c

15
arch/mn10300/include/asm/dma-mapping.h
View file

@ -168,4 +168,19 @@ void dma_cache_sync(void *vaddr, size_t size,
mn10300_dcache_flush_inv();
}
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif

15
arch/parisc/include/asm/dma-mapping.h
View file

@ -238,4 +238,19 @@ void * sba_get_iommu(struct parisc_device *dev);
/* At the moment, we panic on error for IOMMU resource exaustion */
#define dma_mapping_error(dev, x) 0
/* This API cannot be supported on PA-RISC */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif

2
arch/powerpc/kernel/entry_32.S
View file

@ -439,6 +439,8 @@ ret_from_fork:
ret_from_kernel_thread:
REST_NVGPRS(r1)
bl schedule_tail
li r3,0
stw r3,0(r1)
mtlr r14
mr r3,r15
PPC440EP_ERR42

13
arch/powerpc/kernel/entry_64.S
View file

@ -664,6 +664,19 @@ resume_kernel:
ld r4,TI_FLAGS(r9)
andi. r0,r4,_TIF_NEED_RESCHED
bne 1b
/*
* arch_local_irq_restore() from preempt_schedule_irq above may
* enable hard interrupt but we really should disable interrupts
* when we return from the interrupt, and so that we don't get
* interrupted after loading SRR0/1.
*/
#ifdef CONFIG_PPC_BOOK3E
wrteei 0
#else
ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */
mtmsrd r10,1 /* Update machine state */
#endif /* CONFIG_PPC_BOOK3E */
#endif /* CONFIG_PREEMPT */
.globl fast_exc_return_irq

5
arch/powerpc/kernel/kgdb.c
View file

@ -154,12 +154,12 @@ static int kgdb_handle_breakpoint(struct pt_regs *regs)
static int kgdb_singlestep(struct pt_regs *regs)
{
struct thread_info *thread_info, *exception_thread_info;
struct thread_info *backup_current_thread_info = \
(struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
struct thread_info *backup_current_thread_info;
if (user_mode(regs))
return 0;
backup_current_thread_info = (struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
/*
* On Book E and perhaps other processors, singlestep is handled on
* the critical exception stack. This causes current_thread_info()
@ -185,6 +185,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
/* Restore current_thread_info lastly. */
memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
kfree(backup_current_thread_info);
return 1;
}

9
arch/powerpc/kernel/time.c
View file

@ -494,10 +494,15 @@ void timer_interrupt(struct pt_regs * regs)
set_dec(DECREMENTER_MAX);
/* Some implementations of hotplug will get timer interrupts while
* offline, just ignore these
* offline, just ignore these and we also need to set
* decrementers_next_tb as MAX to make sure __check_irq_replay
* don't replay timer interrupt when return, otherwise we'll trap
* here infinitely :(
*/
if (!cpu_online(smp_processor_id()))
if (!cpu_online(smp_processor_id())) {
*next_tb = ~(u64)0;
return;
}
/* Conditionally hard-enable interrupts now that the DEC has been
* bumped to its maximum value

62
arch/powerpc/mm/hash_low_64.S
View file

@ -115,11 +115,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
sldi r29,r5,SID_SHIFT - VPN_SHIFT
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
or r29,r28,r29
/* Calculate hash value for primary slot and store it in r28 */
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */
rldicl r0,r3,64-12,48 /* (ea >> 12) & 0xffff */
xor r28,r5,r0
/*
* Calculate hash value for primary slot and store it in r28
* r3 = va, r5 = vsid
* r0 = (va >> 12) & ((1ul << (28 - 12)) -1)
*/
rldicl r0,r3,64-12,48
xor r28,r5,r0 /* hash */
b 4f
3: /* Calc vpn and put it in r29 */
@ -130,11 +132,12 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
/*
* calculate hash value for primary slot and
* store it in r28 for 1T segment
* r3 = va, r5 = vsid
*/
rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */
clrldi r5,r5,40 /* vsid & 0xffffff */
rldicl r0,r3,64-12,36 /* (ea >> 12) & 0xfffffff */
xor r28,r28,r5
sldi r28,r5,25 /* vsid << 25 */
/* r0 = (va >> 12) & ((1ul << (40 - 12)) -1) */
rldicl r0,r3,64-12,36
xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */
@ -407,11 +410,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
*/
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
or r29,r28,r29
/* Calculate hash value for primary slot and store it in r28 */
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */
rldicl r0,r3,64-12,48 /* (ea >> 12) & 0xffff */
xor r28,r5,r0
/*
* Calculate hash value for primary slot and store it in r28
* r3 = va, r5 = vsid
* r0 = (va >> 12) & ((1ul << (28 - 12)) -1)
*/
rldicl r0,r3,64-12,48
xor r28,r5,r0 /* hash */
b 4f
3: /* Calc vpn and put it in r29 */
@ -426,11 +431,12 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
/*
* Calculate hash value for primary slot and
* store it in r28 for 1T segment
* r3 = va, r5 = vsid
*/
rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */
clrldi r5,r5,40 /* vsid & 0xffffff */
rldicl r0,r3,64-12,36 /* (ea >> 12) & 0xfffffff */
xor r28,r28,r5
sldi r28,r5,25 /* vsid << 25 */
/* r0 = (va >> 12) & ((1ul << (40 - 12)) -1) */
rldicl r0,r3,64-12,36
xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */
@ -752,25 +758,27 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
or r29,r28,r29
/* Calculate hash value for primary slot and store it in r28 */
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */
rldicl r0,r3,64-16,52 /* (ea >> 16) & 0xfff */
xor r28,r5,r0
/* Calculate hash value for primary slot and store it in r28
* r3 = va, r5 = vsid
* r0 = (va >> 16) & ((1ul << (28 - 16)) -1)
*/
rldicl r0,r3,64-16,52
xor r28,r5,r0 /* hash */
b 4f
3: /* Calc vpn and put it in r29 */
sldi r29,r5,SID_SHIFT_1T - VPN_SHIFT
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT_1T - VPN_SHIFT)
or r29,r28,r29
/*
* calculate hash value for primary slot and
* store it in r28 for 1T segment
* r3 = va, r5 = vsid
*/
rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */
clrldi r5,r5,40 /* vsid & 0xffffff */
rldicl r0,r3,64-16,40 /* (ea >> 16) & 0xffffff */
xor r28,r28,r5
sldi r28,r5,25 /* vsid << 25 */
/* r0 = (va >> 16) & ((1ul << (40 - 16)) -1) */
rldicl r0,r3,64-16,40
xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */

2
arch/powerpc/oprofile/op_model_power4.c
View file

@ -52,7 +52,7 @@ static int power7_marked_instr_event(u64 mmcr1)
for (pmc = 0; pmc < 4; pmc++) {
psel = mmcr1 & (OPROFILE_PM_PMCSEL_MSK
<< (OPROFILE_MAX_PMC_NUM - pmc)
* OPROFILE_MAX_PMC_NUM);
* OPROFILE_PMSEL_FIELD_WIDTH);
psel = (psel >> ((OPROFILE_MAX_PMC_NUM - pmc)
* OPROFILE_PMSEL_FIELD_WIDTH)) & ~1ULL;
unit = mmcr1 & (OPROFILE_PM_UNIT_MSK

7
arch/powerpc/platforms/pasemi/cpufreq.c
View file

@ -236,6 +236,13 @@ out:
static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
{
/*
* We don't support CPU hotplug. Don't unmap after the system
* has already made it to a running state.
*/
if (system_state != SYSTEM_BOOTING)
return 0;
if (sdcasr_mapbase)
iounmap(sdcasr_mapbase);
if (sdcpwr_mapbase)

12
arch/s390/include/asm/pgtable.h
View file

@ -1365,6 +1365,18 @@ static inline void pmdp_invalidate(struct vm_area_struct *vma,
__pmd_idte(address, pmdp);
}
#define __HAVE_ARCH_PMDP_SET_WRPROTECT
static inline void pmdp_set_wrprotect(struct mm_struct *mm,
unsigned long address, pmd_t *pmdp)
{
pmd_t pmd = *pmdp;
if (pmd_write(pmd)) {
__pmd_idte(address, pmdp);
set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
}
}
static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
{
pmd_t __pmd;

27
arch/sh/boards/mach-ecovec24/setup.c
View file

@ -887,12 +887,6 @@ static struct platform_device camera_devices[] = {
};
/* FSI */
static struct sh_fsi_platform_info fsi_info = {
.port_b = {
.flags = SH_FSI_BRS_INV,
},
};
static struct resource fsi_resources[] = {
[0] = {
.name = "FSI",
@ -911,25 +905,22 @@ static struct platform_device fsi_device = {
.id = 0,
.num_resources = ARRAY_SIZE(fsi_resources),
.resource = fsi_resources,
.dev = {
.platform_data = &fsi_info,
},
};
static struct asoc_simple_dai_init_info fsi_da7210_init_info = {
.fmt = SND_SOC_DAIFMT_I2S,
.codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
.cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
};
static struct asoc_simple_card_info fsi_da7210_info = {
.name = "DA7210",
.card = "FSIB-DA7210",
.cpu_dai = "fsib-dai",
.codec = "da7210.0-001a",
.platform = "sh_fsi.0",
.codec_dai = "da7210-hifi",
.init = &fsi_da7210_init_info,
.daifmt = SND_SOC_DAIFMT_I2S,
.cpu_dai = {
.name = "fsib-dai",
.fmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_IB_NF,
},
.codec_dai = {
.name = "da7210-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
},
};
static struct platform_device fsi_da7210_device = {

29
arch/sh/boards/mach-se/7724/setup.c
View file

@ -279,12 +279,6 @@ static struct platform_device ceu1_device = {
/* FSI */
/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
static struct sh_fsi_platform_info fsi_info = {
.port_a = {
.flags = SH_FSI_BRS_INV,
},
};
static struct resource fsi_resources[] = {
[0] = {
.name = "FSI",
@ -303,26 +297,23 @@ static struct platform_device fsi_device = {
.id = 0,
.num_resources = ARRAY_SIZE(fsi_resources),
.resource = fsi_resources,
.dev = {
.platform_data = &fsi_info,
},
};
static struct asoc_simple_dai_init_info fsi2_ak4642_init_info = {
.fmt = SND_SOC_DAIFMT_LEFT_J,
.codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
.cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
.sysclk = 11289600,
};
static struct asoc_simple_card_info fsi_ak4642_info = {
.name = "AK4642",
.card = "FSIA-AK4642",
.cpu_dai = "fsia-dai",
.codec = "ak4642-codec.0-0012",
.platform = "sh_fsi.0",
.codec_dai = "ak4642-hifi",
.init = &fsi2_ak4642_init_info,
.daifmt = SND_SOC_DAIFMT_LEFT_J,
.cpu_dai = {
.name = "fsia-dai",
.fmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_IB_NF,
},
.codec_dai = {
.name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600,
},
};
static struct platform_device fsi_ak4642_device = {

1
arch/x86/Kconfig
View file

@ -2138,6 +2138,7 @@ config OLPC_XO1_RTC
config OLPC_XO1_SCI
bool "OLPC XO-1 SCI extras"
depends on OLPC && OLPC_XO1_PM
depends on INPUT=y
select POWER_SUPPLY
select GPIO_CS5535
select MFD_CORE

4
arch/x86/boot/Makefile
View file

@ -71,7 +71,7 @@ GCOV_PROFILE := n
$(obj)/bzImage: asflags-y := $(SVGA_MODE)
quiet_cmd_image = BUILD $@
cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin > $@
cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/zoffset.h > $@
$(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/tools/build FORCE
$(call if_changed,image)
@ -92,7 +92,7 @@ targets += voffset.h
$(obj)/voffset.h: vmlinux FORCE
$(call if_changed,voffset)
sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|startup_64\|efi_pe_entry\|efi_stub_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
quiet_cmd_zoffset = ZOFFSET $@
cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@

21
arch/x86/boot/compressed/eboot.c
View file

@ -256,10 +256,10 @@ static efi_status_t setup_efi_pci(struct boot_params *params)
int i;
struct setup_data *data;
data = (struct setup_data *)params->hdr.setup_data;
data = (struct setup_data *)(unsigned long)params->hdr.setup_data;
while (data && data->next)
data = (struct setup_data *)data->next;
data = (struct setup_data *)(unsigned long)data->next;
status = efi_call_phys5(sys_table->boottime->locate_handle,
EFI_LOCATE_BY_PROTOCOL, &pci_proto,
@ -295,16 +295,18 @@ static efi_status_t setup_efi_pci(struct boot_params *params)
if (!pci)
continue;
#ifdef CONFIG_X86_64
status = efi_call_phys4(pci->attributes, pci,
EfiPciIoAttributeOperationGet, 0,
&attributes);
#else
status = efi_call_phys5(pci->attributes, pci,
EfiPciIoAttributeOperationGet, 0, 0,
&attributes);
#endif
if (status != EFI_SUCCESS)
continue;
if (!(attributes & EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM))
continue;
if (!pci->romimage || !pci->romsize)
continue;
@ -345,9 +347,9 @@ static efi_status_t setup_efi_pci(struct boot_params *params)
memcpy(rom->romdata, pci->romimage, pci->romsize);
if (data)
data->next = (uint64_t)rom;
data->next = (unsigned long)rom;
else
params->hdr.setup_data = (uint64_t)rom;
params->hdr.setup_data = (unsigned long)rom;
data = (struct setup_data *)rom;
@ -432,10 +434,9 @@ static efi_status_t setup_gop(struct screen_info *si, efi_guid_t *proto,
* Once we've found a GOP supporting ConOut,
* don't bother looking any further.
*/
first_gop = gop;
if (conout_found)
break;
first_gop = gop;
}
}

8
arch/x86/boot/compressed/head_32.S
View file

@ -35,11 +35,11 @@ ENTRY(startup_32)
#ifdef CONFIG_EFI_STUB
jmp preferred_addr
.balign 0x10
/*
* We don't need the return address, so set up the stack so
* efi_main() can find its arugments.
* efi_main() can find its arguments.
*/
ENTRY(efi_pe_entry)
add $0x4, %esp
call make_boot_params
@ -50,8 +50,10 @@ ENTRY(startup_32)
pushl %eax
pushl %esi
pushl %ecx
sub $0x4, %esp
.org 0x30,0x90
ENTRY(efi_stub_entry)
add $0x4, %esp
call efi_main
cmpl $0, %eax
movl %eax, %esi

8
arch/x86/boot/compressed/head_64.S
View file

@ -201,12 +201,12 @@ ENTRY(startup_64)
*/
#ifdef CONFIG_EFI_STUB
/*
* The entry point for the PE/COFF executable is 0x210, so only
* legacy boot loaders will execute this jmp.
* The entry point for the PE/COFF executable is efi_pe_entry, so
* only legacy boot loaders will execute this jmp.
*/
jmp preferred_addr
.org 0x210
ENTRY(efi_pe_entry)
mov %rcx, %rdi
mov %rdx, %rsi
pushq %rdi
@ -218,7 +218,7 @@ ENTRY(startup_64)
popq %rsi
popq %rdi
.org 0x230,0x90
ENTRY(efi_stub_entry)
call efi_main
movq %rax,%rsi
cmpq $0,%rax

39
arch/x86/boot/header.S
View file

@ -21,6 +21,7 @@
#include <asm/e820.h>
#include <asm/page_types.h>
#include <asm/setup.h>
#include <asm/bootparam.h>
#include "boot.h"
#include "voffset.h"
#include "zoffset.h"
@ -255,6 +256,9 @@ section_table:
# header, from the old boot sector.
.section ".header", "a"
.globl sentinel
sentinel: .byte 0xff, 0xff /* Used to detect broken loaders */
.globl hdr
hdr:
setup_sects: .byte 0 /* Filled in by build.c */
@ -279,7 +283,7 @@ _start:
# Part 2 of the header, from the old setup.S
.ascii "HdrS" # header signature
.word 0x020b # header version number (>= 0x0105)
.word 0x020c # header version number (>= 0x0105)
# or else old loadlin-1.5 will fail)
.globl realmode_swtch
realmode_swtch: .word 0, 0 # default_switch, SETUPSEG
@ -297,13 +301,7 @@ type_of_loader: .byte 0 # 0 means ancient bootloader, newer
# flags, unused bits must be zero (RFU) bit within loadflags
loadflags:
LOADED_HIGH = 1 # If set, the kernel is loaded high
CAN_USE_HEAP = 0x80 # If set, the loader also has set
# heap_end_ptr to tell how much
# space behind setup.S can be used for
# heap purposes.
# Only the loader knows what is free
.byte LOADED_HIGH
.byte LOADED_HIGH # The kernel is to be loaded high
setup_move_size: .word 0x8000 # size to move, when setup is not
# loaded at 0x90000. We will move setup
@ -369,7 +367,23 @@ relocatable_kernel: .byte 1
relocatable_kernel: .byte 0
#endif
min_alignment: .byte MIN_KERNEL_ALIGN_LG2 # minimum alignment
pad3: .word 0
xloadflags:
#ifdef CONFIG_X86_64
# define XLF0 XLF_KERNEL_64 /* 64-bit kernel */
#else
# define XLF0 0
#endif
#ifdef CONFIG_EFI_STUB
# ifdef CONFIG_X86_64
# define XLF23 XLF_EFI_HANDOVER_64 /* 64-bit EFI handover ok */
# else
# define XLF23 XLF_EFI_HANDOVER_32 /* 32-bit EFI handover ok */
# endif
#else
# define XLF23 0
#endif
.word XLF0 | XLF23
cmdline_size: .long COMMAND_LINE_SIZE-1 #length of the command line,
#added with boot protocol
@ -397,8 +411,13 @@ pref_address: .quad LOAD_PHYSICAL_ADDR # preferred load addr
#define INIT_SIZE VO_INIT_SIZE
#endif
init_size: .long INIT_SIZE # kernel initialization size
handover_offset: .long 0x30 # offset to the handover
handover_offset:
#ifdef CONFIG_EFI_STUB
.long 0x30 # offset to the handover
# protocol entry point
#else
.long 0
#endif
# End of setup header #####################################################

2
arch/x86/boot/setup.ld
View file

@ -13,7 +13,7 @@ SECTIONS
.bstext : { *(.bstext) }
.bsdata : { *(.bsdata) }
. = 497;
. = 495;
.header : { *(.header) }
.entrytext : { *(.entrytext) }
.inittext : { *(.inittext) }

81
arch/x86/boot/tools/build.c
View file

@ -52,6 +52,10 @@ int is_big_kernel;
#define PECOFF_RELOC_RESERVE 0x20
unsigned long efi_stub_entry;
unsigned long efi_pe_entry;
unsigned long startup_64;
/*----------------------------------------------------------------------*/
static const u32 crctab32[] = {
@ -132,7 +136,7 @@ static void die(const char * str, ...)
static void usage(void)
{
die("Usage: build setup system [> image]");
die("Usage: build setup system [zoffset.h] [> image]");
}
#ifdef CONFIG_EFI_STUB
@ -206,30 +210,54 @@ static void update_pecoff_text(unsigned int text_start, unsigned int file_sz)
*/
put_unaligned_le32(file_sz - 512, &buf[pe_header + 0x1c]);
#ifdef CONFIG_X86_32
/*
* Address of entry point.
*
* The EFI stub entry point is +16 bytes from the start of
* the .text section.
* Address of entry point for PE/COFF executable
*/
put_unaligned_le32(text_start + 16, &buf[pe_header + 0x28]);
#else
/*
* Address of entry point. startup_32 is at the beginning and
* the 64-bit entry point (startup_64) is always 512 bytes
* after. The EFI stub entry point is 16 bytes after that, as
* the first instruction allows legacy loaders to jump over
* the EFI stub initialisation
*/
put_unaligned_le32(text_start + 528, &buf[pe_header + 0x28]);
#endif /* CONFIG_X86_32 */
put_unaligned_le32(text_start + efi_pe_entry, &buf[pe_header + 0x28]);
update_pecoff_section_header(".text", text_start, text_sz);
}
#endif /* CONFIG_EFI_STUB */
/*
* Parse zoffset.h and find the entry points. We could just #include zoffset.h
* but that would mean tools/build would have to be rebuilt every time. It's
* not as if parsing it is hard...
*/
#define PARSE_ZOFS(p, sym) do { \
if (!strncmp(p, "#define ZO_" #sym " ", 11+sizeof(#sym))) \
sym = strtoul(p + 11 + sizeof(#sym), NULL, 16); \
} while (0)
static void parse_zoffset(char *fname)
{
FILE *file;
char *p;
int c;
file = fopen(fname, "r");
if (!file)
die("Unable to open `%s': %m", fname);
c = fread(buf, 1, sizeof(buf) - 1, file);
if (ferror(file))
die("read-error on `zoffset.h'");
buf[c] = 0;
p = (char *)buf;
while (p && *p) {
PARSE_ZOFS(p, efi_stub_entry);
PARSE_ZOFS(p, efi_pe_entry);
PARSE_ZOFS(p, startup_64);
p = strchr(p, '\n');
while (p && (*p == '\r' || *p == '\n'))
p++;
}
}
int main(int argc, char ** argv)
{
unsigned int i, sz, setup_sectors;
@ -241,7 +269,19 @@ int main(int argc, char ** argv)
void *kernel;
u32 crc = 0xffffffffUL;
if (argc != 3)
/* Defaults for old kernel */
#ifdef CONFIG_X86_32
efi_pe_entry = 0x10;
efi_stub_entry = 0x30;
#else
efi_pe_entry = 0x210;
efi_stub_entry = 0x230;
startup_64 = 0x200;
#endif
if (argc == 4)
parse_zoffset(argv[3]);
else if (argc != 3)
usage();
/* Copy the setup code */
@ -299,6 +339,11 @@ int main(int argc, char ** argv)
#ifdef CONFIG_EFI_STUB
update_pecoff_text(setup_sectors * 512, sz + i + ((sys_size * 16) - sz));
#ifdef CONFIG_X86_64 /* Yes, this is really how we defined it :( */
efi_stub_entry -= 0x200;
#endif
put_unaligned_le32(efi_stub_entry, &buf[0x264]);
#endif
crc = partial_crc32(buf, i, crc);

4
arch/x86/ia32/ia32entry.S
View file

@ -207,7 +207,7 @@ sysexit_from_sys_call:
testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
jnz ia32_ret_from_sys_call
TRACE_IRQS_ON
sti
ENABLE_INTERRUPTS(CLBR_NONE)
movl %eax,%esi /* second arg, syscall return value */
cmpl $-MAX_ERRNO,%eax /* is it an error ? */
jbe 1f
@ -217,7 +217,7 @@ sysexit_from_sys_call:
call __audit_syscall_exit
movq RAX-ARGOFFSET(%rsp),%rax /* reload syscall return value */
movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi
cli
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
testl %edi,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
jz \exit

1
arch/x86/include/asm/efi.h
View file

@ -94,6 +94,7 @@ extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size,
#endif /* CONFIG_X86_32 */
extern int add_efi_memmap;
extern unsigned long x86_efi_facility;
extern void efi_set_executable(efi_memory_desc_t *md, bool executable);
extern int efi_memblock_x86_reserve_range(void);
extern void efi_call_phys_prelog(void);

2
arch/x86/include/asm/uv/uv.h
View file

@ -16,7 +16,7 @@ extern void uv_system_init(void);
extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
struct mm_struct *mm,
unsigned long start,
unsigned end,
unsigned long end,
unsigned int cpu);
#else /* X86_UV */

63
arch/x86/include/uapi/asm/bootparam.h
View file

@ -1,6 +1,31 @@
#ifndef _ASM_X86_BOOTPARAM_H
#define _ASM_X86_BOOTPARAM_H
/* setup_data types */
#define SETUP_NONE 0
#define SETUP_E820_EXT 1
#define SETUP_DTB 2
#define SETUP_PCI 3
/* ram_size flags */
#define RAMDISK_IMAGE_START_MASK 0x07FF
#define RAMDISK_PROMPT_FLAG 0x8000
#define RAMDISK_LOAD_FLAG 0x4000
/* loadflags */
#define LOADED_HIGH (1<<0)
#define QUIET_FLAG (1<<5)
#define KEEP_SEGMENTS (1<<6)
#define CAN_USE_HEAP (1<<7)
/* xloadflags */
#define XLF_KERNEL_64 (1<<0)
#define XLF_CAN_BE_LOADED_ABOVE_4G (1<<1)
#define XLF_EFI_HANDOVER_32 (1<<2)
#define XLF_EFI_HANDOVER_64 (1<<3)
#ifndef __ASSEMBLY__
#include <linux/types.h>
#include <linux/screen_info.h>
#include <linux/apm_bios.h>
@ -9,12 +34,6 @@
#include <asm/ist.h>
#include <video/edid.h>
/* setup data types */
#define SETUP_NONE 0
#define SETUP_E820_EXT 1
#define SETUP_DTB 2
#define SETUP_PCI 3
/* extensible setup data list node */
struct setup_data {
__u64 next;
@ -28,9 +47,6 @@ struct setup_header {
__u16 root_flags;
__u32 syssize;
__u16 ram_size;
#define RAMDISK_IMAGE_START_MASK 0x07FF
#define RAMDISK_PROMPT_FLAG 0x8000
#define RAMDISK_LOAD_FLAG 0x4000
__u16 vid_mode;
__u16 root_dev;
__u16 boot_flag;
@ -42,10 +58,6 @@ struct setup_header {
__u16 kernel_version;
__u8 type_of_loader;
__u8 loadflags;
#define LOADED_HIGH (1<<0)
#define QUIET_FLAG (1<<5)
#define KEEP_SEGMENTS (1<<6)
#define CAN_USE_HEAP (1<<7)
__u16 setup_move_size;
__u32 code32_start;
__u32 ramdisk_image;
@ -58,7 +70,8 @@ struct setup_header {
__u32 initrd_addr_max;
__u32 kernel_alignment;
__u8 relocatable_kernel;
__u8 _pad2[3];
__u8 min_alignment;
__u16 xloadflags;
__u32 cmdline_size;
__u32 hardware_subarch;
__u64 hardware_subarch_data;
@ -106,7 +119,10 @@ struct boot_params {
__u8 hd1_info[16]; /* obsolete! */ /* 0x090 */
struct sys_desc_table sys_desc_table; /* 0x0a0 */
struct olpc_ofw_header olpc_ofw_header; /* 0x0b0 */
__u8 _pad4[128]; /* 0x0c0 */
__u32 ext_ramdisk_image; /* 0x0c0 */
__u32 ext_ramdisk_size; /* 0x0c4 */
__u32 ext_cmd_line_ptr; /* 0x0c8 */
__u8 _pad4[116]; /* 0x0cc */
struct edid_info edid_info; /* 0x140 */
struct efi_info efi_info; /* 0x1c0 */
__u32 alt_mem_k; /* 0x1e0 */
@ -115,7 +131,20 @@ struct boot_params {
__u8 eddbuf_entries; /* 0x1e9 */
__u8 edd_mbr_sig_buf_entries; /* 0x1ea */
__u8 kbd_status; /* 0x1eb */
__u8 _pad6[5]; /* 0x1ec */
__u8 _pad5[3]; /* 0x1ec */
/*
* The sentinel is set to a nonzero value (0xff) in header.S.
*
* A bootloader is supposed to only take setup_header and put
* it into a clean boot_params buffer. If it turns out that
* it is clumsy or too generous with the buffer, it most
* probably will pick up the sentinel variable too. The fact
* that this variable then is still 0xff will let kernel
* know that some variables in boot_params are invalid and
* kernel should zero out certain portions of boot_params.
*/
__u8 sentinel; /* 0x1ef */
__u8 _pad6[1]; /* 0x1f0 */
struct setup_header hdr; /* setup header */ /* 0x1f1 */
__u8 _pad7[0x290-0x1f1-sizeof(struct setup_header)];
__u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX]; /* 0x290 */
@ -134,6 +163,6 @@ enum {
X86_NR_SUBARCHS,
};
#endif /* __ASSEMBLY__ */
#endif /* _ASM_X86_BOOTPARAM_H */

7
arch/x86/kernel/cpu/intel_cacheinfo.c
View file

@ -298,8 +298,7 @@ struct _cache_attr {
unsigned int);
};
#ifdef CONFIG_AMD_NB
#if defined(CONFIG_AMD_NB) && defined(CONFIG_SYSFS)
/*
* L3 cache descriptors
*/
@ -524,9 +523,9 @@ store_subcaches(struct _cpuid4_info *this_leaf, const char *buf, size_t count,
static struct _cache_attr subcaches =
__ATTR(subcaches, 0644, show_subcaches, store_subcaches);
#else /* CONFIG_AMD_NB */
#else
#define amd_init_l3_cache(x, y)
#endif /* CONFIG_AMD_NB */
#endif /* CONFIG_AMD_NB && CONFIG_SYSFS */
static int
__cpuinit cpuid4_cache_lookup_regs(int index,

6
arch/x86/kernel/cpu/perf_event_intel.c
View file

@ -2019,7 +2019,10 @@ __init int intel_pmu_init(void)
break;
case 28: /* Atom */
case 54: /* Cedariew */
case 38: /* Lincroft */
case 39: /* Penwell */
case 53: /* Cloverview */
case 54: /* Cedarview */
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@ -2084,6 +2087,7 @@ __init int intel_pmu_init(void)
pr_cont("SandyBridge events, ");
break;
case 58: /* IvyBridge */
case 62: /* IvyBridge EP */
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs,

2
arch/x86/kernel/cpu/perf_event_p6.c
View file

@ -19,7 +19,7 @@ static const u64 p6_perfmon_event_map[] =
};
static __initconst u64 p6_hw_cache_event_ids
static u64 p6_hw_cache_event_ids
[PERF_COUNT_HW_CACHE_MAX]
[PERF_COUNT_HW_CACHE_OP_MAX]
[PERF_COUNT_HW_CACHE_RESULT_MAX] =

7
arch/x86/kernel/entry_64.S
View file

@ -1781,6 +1781,7 @@ first_nmi:
* Leave room for the "copied" frame
*/
subq $(5*8), %rsp
CFI_ADJUST_CFA_OFFSET 5*8
/* Copy the stack frame to the Saved frame */
.rept 5
@ -1863,10 +1864,8 @@ end_repeat_nmi:
nmi_swapgs:
SWAPGS_UNSAFE_STACK
nmi_restore:
RESTORE_ALL 8
/* Pop the extra iret frame */
addq $(5*8), %rsp
/* Pop the extra iret frame at once */
RESTORE_ALL 6*8
/* Clear the NMI executing stack variable */
movq $0, 5*8(%rsp)

9
arch/x86/kernel/head_32.S
View file

@ -300,6 +300,12 @@ ENTRY(startup_32_smp)
leal -__PAGE_OFFSET(%ecx),%esp
default_entry:
#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
X86_CR0_PG)
movl $(CR0_STATE & ~X86_CR0_PG),%eax
movl %eax,%cr0
/*
* New page tables may be in 4Mbyte page mode and may
* be using the global pages.
@ -364,8 +370,7 @@ default_entry:
*/
movl $pa(initial_page_table), %eax
movl %eax,%cr3 /* set the page table pointer.. */
movl %cr0,%eax
orl $X86_CR0_PG,%eax
movl $CR0_STATE,%eax
movl %eax,%cr0 /* ..and set paging (PG) bit */
ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
1:

3
arch/x86/kernel/msr.c
View file

@ -174,6 +174,9 @@ static int msr_open(struct inode *inode, struct file *file)
unsigned int cpu;
struct cpuinfo_x86 *c;
if (!capable(CAP_SYS_RAWIO))
return -EPERM;
cpu = iminor(file->f_path.dentry->d_inode);
if (cpu >= nr_cpu_ids || !cpu_online(cpu))
return -ENXIO; /* No such CPU */

2
arch/x86/kernel/pci-dma.c
View file

@ -56,7 +56,7 @@ struct device x86_dma_fallback_dev = {
EXPORT_SYMBOL(x86_dma_fallback_dev);
/* Number of entries preallocated for DMA-API debugging */
#define PREALLOC_DMA_DEBUG_ENTRIES 32768
#define PREALLOC_DMA_DEBUG_ENTRIES 65536
int dma_set_mask(struct device *dev, u64 mask)
{

2
arch/x86/kernel/reboot.c
View file

@ -584,7 +584,7 @@ static void native_machine_emergency_restart(void)
break;
case BOOT_EFI:
if (efi_enabled)
if (efi_enabled(EFI_RUNTIME_SERVICES))
efi.reset_system(reboot_mode ?
EFI_RESET_WARM :
EFI_RESET_COLD,

28
arch/x86/kernel/setup.c
View file

@ -807,15 +807,15 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_EFI
if (!strncmp((char *)&boot_params.efi_info.efi_loader_signature,
"EL32", 4)) {
efi_enabled = 1;
efi_64bit = false;
set_bit(EFI_BOOT, &x86_efi_facility);
} else if (!strncmp((char *)&boot_params.efi_info.efi_loader_signature,
"EL64", 4)) {
efi_enabled = 1;
efi_64bit = true;
set_bit(EFI_BOOT, &x86_efi_facility);
set_bit(EFI_64BIT, &x86_efi_facility);
}
if (efi_enabled && efi_memblock_x86_reserve_range())
efi_enabled = 0;
if (efi_enabled(EFI_BOOT))
efi_memblock_x86_reserve_range();
#endif
x86_init.oem.arch_setup();
@ -888,7 +888,7 @@ void __init setup_arch(char **cmdline_p)
finish_e820_parsing();
if (efi_enabled)
if (efi_enabled(EFI_BOOT))
efi_init();
dmi_scan_machine();
@ -971,7 +971,7 @@ void __init setup_arch(char **cmdline_p)
* The EFI specification says that boot service code won't be called
* after ExitBootServices(). This is, in fact, a lie.
*/
if (efi_enabled)
if (efi_enabled(EFI_MEMMAP))
efi_reserve_boot_services();
/* preallocate 4k for mptable mpc */
@ -1114,7 +1114,7 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
if (!efi_enabled || (efi_mem_type(0xa0000) != EFI_CONVENTIONAL_MEMORY))
if (!efi_enabled(EFI_BOOT) || (efi_mem_type(0xa0000) != EFI_CONVENTIONAL_MEMORY))
conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
@ -1131,14 +1131,14 @@ void __init setup_arch(char **cmdline_p)
register_refined_jiffies(CLOCK_TICK_RATE);
#ifdef CONFIG_EFI
/* Once setup is done above, disable efi_enabled on mismatched
* firmware/kernel archtectures since there is no support for
* runtime services.
/* Once setup is done above, unmap the EFI memory map on
* mismatched firmware/kernel archtectures since there is no
* support for runtime services.
*/
if (efi_enabled && IS_ENABLED(CONFIG_X86_64) != efi_64bit) {
if (efi_enabled(EFI_BOOT) &&
IS_ENABLED(CONFIG_X86_64) != efi_enabled(EFI_64BIT)) {
pr_info("efi: Setup done, disabling due to 32/64-bit mismatch\n");
efi_unmap_memmap();
efi_enabled = 0;
}
#endif
}

59
arch/x86/platform/efi/efi.c
View file

@ -51,9 +51,6 @@
#define EFI_DEBUG 1
int efi_enabled;
EXPORT_SYMBOL(efi_enabled);
struct efi __read_mostly efi = {
.mps = EFI_INVALID_TABLE_ADDR,
.acpi = EFI_INVALID_TABLE_ADDR,
@ -69,19 +66,28 @@ EXPORT_SYMBOL(efi);
struct efi_memory_map memmap;
bool efi_64bit;
static struct efi efi_phys __initdata;
static efi_system_table_t efi_systab __initdata;
static inline bool efi_is_native(void)
{
return IS_ENABLED(CONFIG_X86_64) == efi_64bit;
return IS_ENABLED(CONFIG_X86_64) == efi_enabled(EFI_64BIT);
}
unsigned long x86_efi_facility;
/*
* Returns 1 if 'facility' is enabled, 0 otherwise.
*/
int efi_enabled(int facility)
{
return test_bit(facility, &x86_efi_facility) != 0;
}
EXPORT_SYMBOL(efi_enabled);
static int __init setup_noefi(char *arg)
{
efi_enabled = 0;
clear_bit(EFI_BOOT, &x86_efi_facility);
return 0;
}
early_param("noefi", setup_noefi);
@ -426,6 +432,7 @@ void __init efi_reserve_boot_services(void)
void __init efi_unmap_memmap(void)
{
clear_bit(EFI_MEMMAP, &x86_efi_facility);
if (memmap.map) {
early_iounmap(memmap.map, memmap.nr_map * memmap.desc_size);
memmap.map = NULL;
@ -460,7 +467,7 @@ void __init efi_free_boot_services(void)
static int __init efi_systab_init(void *phys)
{
if (efi_64bit) {
if (efi_enabled(EFI_64BIT)) {
efi_system_table_64_t *systab64;
u64 tmp = 0;
@ -552,7 +559,7 @@ static int __init efi_config_init(u64 tables, int nr_tables)
void *config_tables, *tablep;
int i, sz;
if (efi_64bit)
if (efi_enabled(EFI_64BIT))
sz = sizeof(efi_config_table_64_t);
else
sz = sizeof(efi_config_table_32_t);
@ -572,7 +579,7 @@ static int __init efi_config_init(u64 tables, int nr_tables)
efi_guid_t guid;
unsigned long table;
if (efi_64bit) {
if (efi_enabled(EFI_64BIT)) {
u64 table64;
guid = ((efi_config_table_64_t *)tablep)->guid;
table64 = ((efi_config_table_64_t *)tablep)->table;
@ -684,7 +691,6 @@ void __init efi_init(void)
if (boot_params.efi_info.efi_systab_hi ||
boot_params.efi_info.efi_memmap_hi) {
pr_info("Table located above 4GB, disabling EFI.\n");
efi_enabled = 0;
return;
}
efi_phys.systab = (efi_system_table_t *)boot_params.efi_info.efi_systab;
@ -694,10 +700,10 @@ void __init efi_init(void)
((__u64)boot_params.efi_info.efi_systab_hi<<32));
#endif
if (efi_systab_init(efi_phys.systab)) {
efi_enabled = 0;
if (efi_systab_init(efi_phys.systab))
return;
}
set_bit(EFI_SYSTEM_TABLES, &x86_efi_facility);
/*
* Show what we know for posterity
@ -715,10 +721,10 @@ void __init efi_init(void)
efi.systab->hdr.revision >> 16,
efi.systab->hdr.revision & 0xffff, vendor);
if (efi_config_init(efi.systab->tables, efi.systab->nr_tables)) {
efi_enabled = 0;
if (efi_config_init(efi.systab->tables, efi.systab->nr_tables))
return;
}
set_bit(EFI_CONFIG_TABLES, &x86_efi_facility);
/*
* Note: We currently don't support runtime services on an EFI
@ -727,15 +733,17 @@ void __init efi_init(void)
if (!efi_is_native())
pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n");
else if (efi_runtime_init()) {
efi_enabled = 0;
return;
else {
if (efi_runtime_init())
return;
set_bit(EFI_RUNTIME_SERVICES, &x86_efi_facility);
}
if (efi_memmap_init()) {
efi_enabled = 0;
if (efi_memmap_init())
return;
}
set_bit(EFI_MEMMAP, &x86_efi_facility);
#ifdef CONFIG_X86_32
if (efi_is_native()) {
x86_platform.get_wallclock = efi_get_time;
@ -941,7 +949,7 @@ void __init efi_enter_virtual_mode(void)
*
* Call EFI services through wrapper functions.
*/
efi.runtime_version = efi_systab.fw_revision;
efi.runtime_version = efi_systab.hdr.revision;
efi.get_time = virt_efi_get_time;
efi.set_time = virt_efi_set_time;
efi.get_wakeup_time = virt_efi_get_wakeup_time;
@ -969,6 +977,9 @@ u32 efi_mem_type(unsigned long phys_addr)
efi_memory_desc_t *md;
void *p;
if (!efi_enabled(EFI_MEMMAP))
return 0;
for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
md = p;
if ((md->phys_addr <= phys_addr) &&

22
arch/x86/platform/efi/efi_64.c
View file

@ -38,7 +38,7 @@
#include <asm/cacheflush.h>
#include <asm/fixmap.h>
static pgd_t save_pgd __initdata;
static pgd_t *save_pgd __initdata;
static unsigned long efi_flags __initdata;
static void __init early_code_mapping_set_exec(int executable)
@ -61,12 +61,20 @@ static void __init early_code_mapping_set_exec(int executable)
void __init efi_call_phys_prelog(void)
{
unsigned long vaddress;
int pgd;
int n_pgds;
early_code_mapping_set_exec(1);
local_irq_save(efi_flags);
vaddress = (unsigned long)__va(0x0UL);
save_pgd = *pgd_offset_k(0x0UL);
set_pgd(pgd_offset_k(0x0UL), *pgd_offset_k(vaddress));
n_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT), PGDIR_SIZE);
save_pgd = kmalloc(n_pgds * sizeof(pgd_t), GFP_KERNEL);
for (pgd = 0; pgd < n_pgds; pgd++) {
save_pgd[pgd] = *pgd_offset_k(pgd * PGDIR_SIZE);
vaddress = (unsigned long)__va(pgd * PGDIR_SIZE);
set_pgd(pgd_offset_k(pgd * PGDIR_SIZE), *pgd_offset_k(vaddress));
}
__flush_tlb_all();
}
@ -75,7 +83,11 @@ void __init efi_call_phys_epilog(void)
/*
* After the lock is released, the original page table is restored.
*/
set_pgd(pgd_offset_k(0x0UL), save_pgd);
int pgd;
int n_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT) , PGDIR_SIZE);
for (pgd = 0; pgd < n_pgds; pgd++)
set_pgd(pgd_offset_k(pgd * PGDIR_SIZE), save_pgd[pgd]);
kfree(save_pgd);
__flush_tlb_all();
local_irq_restore(efi_flags);
early_code_mapping_set_exec(0);

10
arch/x86/platform/uv/tlb_uv.c
View file

@ -1034,7 +1034,8 @@ static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
* globally purge translation cache of a virtual address or all TLB's
* @cpumask: mask of all cpu's in which the address is to be removed
* @mm: mm_struct containing virtual address range
* @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
* @start: start virtual address to be removed from TLB
* @end: end virtual address to be remove from TLB
* @cpu: the current cpu
*
* This is the entry point for initiating any UV global TLB shootdown.
@ -1056,7 +1057,7 @@ static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
*/
const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
struct mm_struct *mm, unsigned long start,
unsigned end, unsigned int cpu)
unsigned long end, unsigned int cpu)
{
int locals = 0;
int remotes = 0;
@ -1113,7 +1114,10 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
record_send_statistics(stat, locals, hubs, remotes, bau_desc);
bau_desc->payload.address = start;
if (!end || (end - start) <= PAGE_SIZE)
bau_desc->payload.address = start;
else
bau_desc->payload.address = TLB_FLUSH_ALL;
bau_desc->payload.sending_cpu = cpu;
/*
* uv_flush_send_and_wait returns 0 if all cpu's were messaged,

10
arch/x86/tools/insn_sanity.c
View file

@ -55,7 +55,7 @@ static FILE *input_file; /* Input file name */
static void usage(const char *err)
{
if (err)
fprintf(stderr, "Error: %s\n\n", err);
fprintf(stderr, "%s: Error: %s\n\n", prog, err);
fprintf(stderr, "Usage: %s [-y|-n|-v] [-s seed[,no]] [-m max] [-i input]\n", prog);
fprintf(stderr, "\t-y 64bit mode\n");
fprintf(stderr, "\t-n 32bit mode\n");
@ -269,7 +269,13 @@ int main(int argc, char **argv)
insns++;
}
fprintf(stdout, "%s: decoded and checked %d %s instructions with %d errors (seed:0x%x)\n", (errors) ? "Failure" : "Success", insns, (input_file) ? "given" : "random", errors, seed);
fprintf(stdout, "%s: %s: decoded and checked %d %s instructions with %d errors (seed:0x%x)\n",
prog,
(errors) ? "Failure" : "Success",
insns,
(input_file) ? "given" : "random",
errors,
seed);
return errors ? 1 : 0;
}

6
arch/x86/tools/relocs.c
View file

@ -814,12 +814,14 @@ int main(int argc, char **argv)
read_relocs(fp);
if (show_absolute_syms) {
print_absolute_symbols();
return 0;
goto out;
}
if (show_absolute_relocs) {
print_absolute_relocs();
return 0;
goto out;
}
emit_relocs(as_text, use_real_mode);
out:
fclose(fp);
return 0;
}

15
arch/xtensa/include/asm/dma-mapping.h
View file

@ -170,4 +170,19 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
consistent_sync(vaddr, size, direction);
}
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif /* _XTENSA_DMA_MAPPING_H */

42
block/genhd.c
View file

@ -35,6 +35,8 @@ static DEFINE_IDR(ext_devt_idr);
static struct device_type disk_type;
static void disk_check_events(struct disk_events *ev,
unsigned int *clearing_ptr);
static void disk_alloc_events(struct gendisk *disk);
static void disk_add_events(struct gendisk *disk);
static void disk_del_events(struct gendisk *disk);
@ -1549,6 +1551,7 @@ unsigned int disk_clear_events(struct gendisk *disk, unsigned int mask)
const struct block_device_operations *bdops = disk->fops;
struct disk_events *ev = disk->ev;
unsigned int pending;
unsigned int clearing = mask;
if (!ev) {
/* for drivers still using the old ->media_changed method */
@ -1558,34 +1561,53 @@ unsigned int disk_clear_events(struct gendisk *disk, unsigned int mask)
return 0;
}
/* tell the workfn about the events being cleared */
disk_block_events(disk);
/*
* store the union of mask and ev->clearing on the stack so that the
* race with disk_flush_events does not cause ambiguity (ev->clearing
* can still be modified even if events are blocked).
*/
spin_lock_irq(&ev->lock);
ev->clearing |= mask;
clearing |= ev->clearing;
ev->clearing = 0;
spin_unlock_irq(&ev->lock);
/* uncondtionally schedule event check and wait for it to finish */
disk_block_events(disk);
queue_delayed_work(system_freezable_wq, &ev->dwork, 0);
flush_delayed_work(&ev->dwork);
__disk_unblock_events(disk, false);
disk_check_events(ev, &clearing);
/*
* if ev->clearing is not 0, the disk_flush_events got called in the
* middle of this function, so we want to run the workfn without delay.
*/
__disk_unblock_events(disk, ev->clearing ? true : false);
/* then, fetch and clear pending events */
spin_lock_irq(&ev->lock);
WARN_ON_ONCE(ev->clearing & mask); /* cleared by workfn */
pending = ev->pending & mask;
ev->pending &= ~mask;
spin_unlock_irq(&ev->lock);
WARN_ON_ONCE(clearing & mask);
return pending;
}
/*
* Separate this part out so that a different pointer for clearing_ptr can be
* passed in for disk_clear_events.
*/
static void disk_events_workfn(struct work_struct *work)
{
struct delayed_work *dwork = to_delayed_work(work);
struct disk_events *ev = container_of(dwork, struct disk_events, dwork);
disk_check_events(ev, &ev->clearing);
}
static void disk_check_events(struct disk_events *ev,
unsigned int *clearing_ptr)
{
struct gendisk *disk = ev->disk;
char *envp[ARRAY_SIZE(disk_uevents) + 1] = { };
unsigned int clearing = ev->clearing;
unsigned int clearing = *clearing_ptr;
unsigned int events;
unsigned long intv;
int nr_events = 0, i;
@ -1598,7 +1620,7 @@ static void disk_events_workfn(struct work_struct *work)
events &= ~ev->pending;
ev->pending |= events;
ev->clearing &= ~clearing;
*clearing_ptr &= ~clearing;
intv = disk_events_poll_jiffies(disk);
if (!ev->block && intv)

2
drivers/acpi/osl.c
View file

@ -250,7 +250,7 @@ acpi_physical_address __init acpi_os_get_root_pointer(void)
return acpi_rsdp;
#endif
if (efi_enabled) {
if (efi_enabled(EFI_CONFIG_TABLES)) {
if (efi.acpi20 != EFI_INVALID_TABLE_ADDR)
return efi.acpi20;
else if (efi.acpi != EFI_INVALID_TABLE_ADDR)

146
drivers/atm/iphase.h
View file

@ -636,82 +636,82 @@ struct rx_buf_desc {
#define SEG_BASE IPHASE5575_FRAG_CONTROL_REG_BASE
#define REASS_BASE IPHASE5575_REASS_CONTROL_REG_BASE
typedef volatile u_int freg_t;
typedef volatile u_int ffreg_t;
typedef u_int rreg_t;
typedef struct _ffredn_t {
freg_t idlehead_high; /* Idle cell header (high) */
freg_t idlehead_low; /* Idle cell header (low) */
freg_t maxrate; /* Maximum rate */
freg_t stparms; /* Traffic Management Parameters */
freg_t abrubr_abr; /* ABRUBR Priority Byte 1, TCR Byte 0 */
freg_t rm_type; /* */
u_int filler5[0x17 - 0x06];
freg_t cmd_reg; /* Command register */
u_int filler18[0x20 - 0x18];
freg_t cbr_base; /* CBR Pointer Base */
freg_t vbr_base; /* VBR Pointer Base */
freg_t abr_base; /* ABR Pointer Base */
freg_t ubr_base; /* UBR Pointer Base */
u_int filler24;
freg_t vbrwq_base; /* VBR Wait Queue Base */
freg_t abrwq_base; /* ABR Wait Queue Base */
freg_t ubrwq_base; /* UBR Wait Queue Base */
freg_t vct_base; /* Main VC Table Base */
freg_t vcte_base; /* Extended Main VC Table Base */
u_int filler2a[0x2C - 0x2A];
freg_t cbr_tab_beg; /* CBR Table Begin */
freg_t cbr_tab_end; /* CBR Table End */
freg_t cbr_pointer; /* CBR Pointer */
u_int filler2f[0x30 - 0x2F];
freg_t prq_st_adr; /* Packet Ready Queue Start Address */
freg_t prq_ed_adr; /* Packet Ready Queue End Address */
freg_t prq_rd_ptr; /* Packet Ready Queue read pointer */
freg_t prq_wr_ptr; /* Packet Ready Queue write pointer */
freg_t tcq_st_adr; /* Transmit Complete Queue Start Address*/
freg_t tcq_ed_adr; /* Transmit Complete Queue End Address */
freg_t tcq_rd_ptr; /* Transmit Complete Queue read pointer */
freg_t tcq_wr_ptr; /* Transmit Complete Queue write pointer*/
u_int filler38[0x40 - 0x38];
freg_t queue_base; /* Base address for PRQ and TCQ */
freg_t desc_base; /* Base address of descriptor table */
u_int filler42[0x45 - 0x42];
freg_t mode_reg_0; /* Mode register 0 */
freg_t mode_reg_1; /* Mode register 1 */
freg_t intr_status_reg;/* Interrupt Status register */
freg_t mask_reg; /* Mask Register */
freg_t cell_ctr_high1; /* Total cell transfer count (high) */
freg_t cell_ctr_lo1; /* Total cell transfer count (low) */
freg_t state_reg; /* Status register */
u_int filler4c[0x58 - 0x4c];
freg_t curr_desc_num; /* Contains the current descriptor num */
freg_t next_desc; /* Next descriptor */
freg_t next_vc; /* Next VC */
u_int filler5b[0x5d - 0x5b];
freg_t present_slot_cnt;/* Present slot count */
u_int filler5e[0x6a - 0x5e];
freg_t new_desc_num; /* New descriptor number */
freg_t new_vc; /* New VC */
freg_t sched_tbl_ptr; /* Schedule table pointer */
freg_t vbrwq_wptr; /* VBR wait queue write pointer */
freg_t vbrwq_rptr; /* VBR wait queue read pointer */
freg_t abrwq_wptr; /* ABR wait queue write pointer */
freg_t abrwq_rptr; /* ABR wait queue read pointer */
freg_t ubrwq_wptr; /* UBR wait queue write pointer */
freg_t ubrwq_rptr; /* UBR wait queue read pointer */
freg_t cbr_vc; /* CBR VC */
freg_t vbr_sb_vc; /* VBR SB VC */
freg_t abr_sb_vc; /* ABR SB VC */
freg_t ubr_sb_vc; /* UBR SB VC */
freg_t vbr_next_link; /* VBR next link */
freg_t abr_next_link; /* ABR next link */
freg_t ubr_next_link; /* UBR next link */
u_int filler7a[0x7c-0x7a];
freg_t out_rate_head; /* Out of rate head */
u_int filler7d[0xca-0x7d]; /* pad out to full address space */
freg_t cell_ctr_high1_nc;/* Total cell transfer count (high) */
freg_t cell_ctr_lo1_nc;/* Total cell transfer count (low) */
u_int fillercc[0x100-0xcc]; /* pad out to full address space */
ffreg_t idlehead_high; /* Idle cell header (high) */
ffreg_t idlehead_low; /* Idle cell header (low) */
ffreg_t maxrate; /* Maximum rate */
ffreg_t stparms; /* Traffic Management Parameters */
ffreg_t abrubr_abr; /* ABRUBR Priority Byte 1, TCR Byte 0 */
ffreg_t rm_type; /* */
u_int filler5[0x17 - 0x06];
ffreg_t cmd_reg; /* Command register */
u_int filler18[0x20 - 0x18];
ffreg_t cbr_base; /* CBR Pointer Base */
ffreg_t vbr_base; /* VBR Pointer Base */
ffreg_t abr_base; /* ABR Pointer Base */
ffreg_t ubr_base; /* UBR Pointer Base */
u_int filler24;
ffreg_t vbrwq_base; /* VBR Wait Queue Base */
ffreg_t abrwq_base; /* ABR Wait Queue Base */
ffreg_t ubrwq_base; /* UBR Wait Queue Base */
ffreg_t vct_base; /* Main VC Table Base */
ffreg_t vcte_base; /* Extended Main VC Table Base */
u_int filler2a[0x2C - 0x2A];
ffreg_t cbr_tab_beg; /* CBR Table Begin */
ffreg_t cbr_tab_end; /* CBR Table End */
ffreg_t cbr_pointer; /* CBR Pointer */
u_int filler2f[0x30 - 0x2F];
ffreg_t prq_st_adr; /* Packet Ready Queue Start Address */
ffreg_t prq_ed_adr; /* Packet Ready Queue End Address */
ffreg_t prq_rd_ptr; /* Packet Ready Queue read pointer */
ffreg_t prq_wr_ptr; /* Packet Ready Queue write pointer */
ffreg_t tcq_st_adr; /* Transmit Complete Queue Start Address*/
ffreg_t tcq_ed_adr; /* Transmit Complete Queue End Address */
ffreg_t tcq_rd_ptr; /* Transmit Complete Queue read pointer */
ffreg_t tcq_wr_ptr; /* Transmit Complete Queue write pointer*/
u_int filler38[0x40 - 0x38];
ffreg_t queue_base; /* Base address for PRQ and TCQ */
ffreg_t desc_base; /* Base address of descriptor table */
u_int filler42[0x45 - 0x42];
ffreg_t mode_reg_0; /* Mode register 0 */
ffreg_t mode_reg_1; /* Mode register 1 */
ffreg_t intr_status_reg;/* Interrupt Status register */
ffreg_t mask_reg; /* Mask Register */
ffreg_t cell_ctr_high1; /* Total cell transfer count (high) */
ffreg_t cell_ctr_lo1; /* Total cell transfer count (low) */
ffreg_t state_reg; /* Status register */
u_int filler4c[0x58 - 0x4c];
ffreg_t curr_desc_num; /* Contains the current descriptor num */
ffreg_t next_desc; /* Next descriptor */
ffreg_t next_vc; /* Next VC */
u_int filler5b[0x5d - 0x5b];
ffreg_t present_slot_cnt;/* Present slot count */
u_int filler5e[0x6a - 0x5e];
ffreg_t new_desc_num; /* New descriptor number */
ffreg_t new_vc; /* New VC */
ffreg_t sched_tbl_ptr; /* Schedule table pointer */
ffreg_t vbrwq_wptr; /* VBR wait queue write pointer */
ffreg_t vbrwq_rptr; /* VBR wait queue read pointer */
ffreg_t abrwq_wptr; /* ABR wait queue write pointer */
ffreg_t abrwq_rptr; /* ABR wait queue read pointer */
ffreg_t ubrwq_wptr; /* UBR wait queue write pointer */
ffreg_t ubrwq_rptr; /* UBR wait queue read pointer */
ffreg_t cbr_vc; /* CBR VC */
ffreg_t vbr_sb_vc; /* VBR SB VC */
ffreg_t abr_sb_vc; /* ABR SB VC */
ffreg_t ubr_sb_vc; /* UBR SB VC */
ffreg_t vbr_next_link; /* VBR next link */
ffreg_t abr_next_link; /* ABR next link */
ffreg_t ubr_next_link; /* UBR next link */
u_int filler7a[0x7c-0x7a];
ffreg_t out_rate_head; /* Out of rate head */
u_int filler7d[0xca-0x7d]; /* pad out to full address space */
ffreg_t cell_ctr_high1_nc;/* Total cell transfer count (high) */
ffreg_t cell_ctr_lo1_nc;/* Total cell transfer count (low) */
u_int fillercc[0x100-0xcc]; /* pad out to full address space */
} ffredn_t;
typedef struct _rfredn_t {

18
drivers/base/regmap/internal.h
View file

@ -16,6 +16,7 @@
#include <linux/regmap.h>
#include <linux/fs.h>
#include <linux/list.h>
#include <linux/wait.h>
struct regmap;
struct regcache_ops;
@ -39,6 +40,13 @@ struct regmap_format {
unsigned int (*parse_val)(void *buf);
};
struct regmap_async {
struct list_head list;
struct work_struct cleanup;
struct regmap *map;
void *work_buf;
};
struct regmap {
struct mutex mutex;
spinlock_t spinlock;
@ -53,6 +61,11 @@ struct regmap {
void *bus_context;
const char *name;
spinlock_t async_lock;
wait_queue_head_t async_waitq;
struct list_head async_list;
int async_ret;
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs;
const char *debugfs_name;
@ -74,6 +87,9 @@ struct regmap {
const struct regmap_access_table *volatile_table;
const struct regmap_access_table *precious_table;
int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
int (*reg_write)(void *context, unsigned int reg, unsigned int val);
u8 read_flag_mask;
u8 write_flag_mask;
@ -175,6 +191,8 @@ bool regcache_set_val(void *base, unsigned int idx,
unsigned int val, unsigned int word_size);
int regcache_lookup_reg(struct regmap *map, unsigned int reg);
void regmap_async_complete_cb(struct regmap_async *async, int ret);
extern struct regcache_ops regcache_rbtree_ops;
extern struct regcache_ops regcache_lzo_ops;

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