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drm/amd/powerplay: set UVD clocks bypass mode for Polaris10

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Saves power when not in use.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Huang 2016-06-07 17:01:27 -04:00 committed by Alex Deucher
parent a8bd3e1c71
commit 840dd4c605
2 changed files with 8 additions and 1 deletions
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3
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
View file

@ -858,7 +858,8 @@ static int uvd_v6_0_set_clockgating_state(void *handle,
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
static int curstate = -1;
if (adev->asic_type == CHIP_FIJI)
if (adev->asic_type == CHIP_FIJI ||
adev->asic_type == CHIP_POLARIS10)
uvd_v6_set_bypass_mode(adev, enable);
if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG))

6
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_clockpowergating.c
View file

@ -106,11 +106,17 @@ int polaris10_phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
data->uvd_power_gated = bgate;
if (bgate) {
cgs_set_clockgating_state(hwmgr->device,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
polaris10_update_uvd_dpm(hwmgr, true);
polaris10_phm_powerdown_uvd(hwmgr);
} else {
polaris10_phm_powerup_uvd(hwmgr);
polaris10_update_uvd_dpm(hwmgr, false);
cgs_set_clockgating_state(hwmgr->device,
AMD_IP_BLOCK_TYPE_UVD,
AMD_PG_STATE_UNGATE);
}
return 0;