ALSA: hda - Merge all HDMI modules into the unified module
This patch merges all three patch_*hdmi variants to the single HDMI parser. There is only one snd-hda-codec-hdmi module now. In this patch, the behavior of each parser isn't changed much. The old ATI parser still doesn't use the dynamic parser yet. In later patches, they'll be cleaned up. Also, this patch gets rid of the individual snd-hda-eld module and builds into snd-hda-codec-hdmi, since this is referred only from the HDMI parser. Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
parent
f68b3b291d
commit
84eb01be18
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@ -119,47 +119,20 @@ config SND_HDA_CODEC_VIA
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snd-hda-codec-via.
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This module is automatically loaded at probing.
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config SND_HDA_CODEC_ATIHDMI
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bool "Build ATI HDMI HD-audio codec support"
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default y
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help
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Say Y here to include ATI HDMI HD-audio codec support in
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snd-hda-intel driver, such as ATI RS600 HDMI.
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When the HD-audio driver is built as a module, the codec
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support code is also built as another module,
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snd-hda-codec-atihdmi.
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This module is automatically loaded at probing.
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config SND_HDA_CODEC_NVHDMI
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bool "Build NVIDIA HDMI HD-audio codec support"
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default y
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help
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Say Y here to include NVIDIA HDMI HD-audio codec support in
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snd-hda-intel driver, such as NVIDIA MCP78 HDMI.
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When the HD-audio driver is built as a module, the codec
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support code is also built as another module,
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snd-hda-codec-nvhdmi.
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This module is automatically loaded at probing.
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config SND_HDA_CODEC_INTELHDMI
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bool "Build INTEL HDMI HD-audio codec support"
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config SND_HDA_CODEC_HDMI
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bool "Build HDMI/DisplayPort HD-audio codec support"
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select SND_DYNAMIC_MINORS
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default y
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help
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Say Y here to include INTEL HDMI HD-audio codec support in
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snd-hda-intel driver, such as Eaglelake integrated HDMI.
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Say Y here to include HDMI and DisplayPort HD-audio codec
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support in snd-hda-intel driver. This includes all AMD/ATI,
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Intel and Nvidia HDMI/DisplayPort codecs.
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When the HD-audio driver is built as a module, the codec
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support code is also built as another module,
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snd-hda-codec-intelhdmi.
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snd-hda-codec-hdmi.
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This module is automatically loaded at probing.
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config SND_HDA_ELD
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def_bool y
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depends on SND_HDA_CODEC_INTELHDMI || SND_HDA_CODEC_NVHDMI
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config SND_HDA_CODEC_CIRRUS
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bool "Build Cirrus Logic codec support"
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depends on SND_HDA_INTEL
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@ -3,7 +3,6 @@ snd-hda-intel-objs := hda_intel.o
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snd-hda-codec-y := hda_codec.o
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snd-hda-codec-$(CONFIG_SND_HDA_GENERIC) += hda_generic.o
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snd-hda-codec-$(CONFIG_PROC_FS) += hda_proc.o
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snd-hda-codec-$(CONFIG_SND_HDA_ELD) += hda_eld.o
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snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o
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snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o
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@ -12,13 +11,11 @@ snd-hda-codec-cmedia-objs := patch_cmedia.o
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snd-hda-codec-analog-objs := patch_analog.o
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snd-hda-codec-idt-objs := patch_sigmatel.o
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snd-hda-codec-si3054-objs := patch_si3054.o
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snd-hda-codec-atihdmi-objs := patch_atihdmi.o
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snd-hda-codec-cirrus-objs := patch_cirrus.o
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snd-hda-codec-ca0110-objs := patch_ca0110.o
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snd-hda-codec-conexant-objs := patch_conexant.o
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snd-hda-codec-via-objs := patch_via.o
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snd-hda-codec-nvhdmi-objs := patch_nvhdmi.o
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snd-hda-codec-intelhdmi-objs := patch_intelhdmi.o
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snd-hda-codec-hdmi-objs := patch_hdmi.o hda_eld.o
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# common driver
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obj-$(CONFIG_SND_HDA_INTEL) := snd-hda-codec.o
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@ -39,9 +36,6 @@ endif
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ifdef CONFIG_SND_HDA_CODEC_SI3054
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-si3054.o
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endif
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ifdef CONFIG_SND_HDA_CODEC_ATIHDMI
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-atihdmi.o
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endif
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ifdef CONFIG_SND_HDA_CODEC_CIRRUS
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-cirrus.o
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endif
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@ -54,11 +48,8 @@ endif
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ifdef CONFIG_SND_HDA_CODEC_VIA
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-via.o
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endif
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ifdef CONFIG_SND_HDA_CODEC_NVHDMI
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-nvhdmi.o
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endif
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ifdef CONFIG_SND_HDA_CODEC_INTELHDMI
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-intelhdmi.o
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ifdef CONFIG_SND_HDA_CODEC_HDMI
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-hdmi.o
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endif
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# this must be the last entry after codec drivers;
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@ -332,7 +332,6 @@ int snd_hdmi_get_eld_size(struct hda_codec *codec, hda_nid_t nid)
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return snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE,
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AC_DIPSIZE_ELD_BUF);
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}
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EXPORT_SYMBOL_HDA(snd_hdmi_get_eld_size);
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int snd_hdmi_get_eld(struct hdmi_eld *eld,
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struct hda_codec *codec, hda_nid_t nid)
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@ -368,7 +367,6 @@ int snd_hdmi_get_eld(struct hdmi_eld *eld,
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kfree(buf);
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return ret;
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}
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EXPORT_SYMBOL_HDA(snd_hdmi_get_eld);
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static void hdmi_show_short_audio_desc(struct cea_sad *a)
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{
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@ -407,7 +405,6 @@ void snd_print_channel_allocation(int spk_alloc, char *buf, int buflen)
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}
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buf[j] = '\0'; /* necessary when j == 0 */
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}
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EXPORT_SYMBOL_HDA(snd_print_channel_allocation);
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void snd_hdmi_show_eld(struct hdmi_eld *e)
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{
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@ -426,7 +423,6 @@ void snd_hdmi_show_eld(struct hdmi_eld *e)
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for (i = 0; i < e->sad_count; i++)
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hdmi_show_short_audio_desc(e->sad + i);
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}
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EXPORT_SYMBOL_HDA(snd_hdmi_show_eld);
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#ifdef CONFIG_PROC_FS
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@ -585,7 +581,6 @@ int snd_hda_eld_proc_new(struct hda_codec *codec, struct hdmi_eld *eld,
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return 0;
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}
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EXPORT_SYMBOL_HDA(snd_hda_eld_proc_new);
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void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld)
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{
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@ -594,7 +589,6 @@ void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld)
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eld->proc_entry = NULL;
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}
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}
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EXPORT_SYMBOL_HDA(snd_hda_eld_proc_free);
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#endif /* CONFIG_PROC_FS */
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@ -645,4 +639,3 @@ void hdmi_eld_update_pcm_info(struct hdmi_eld *eld, struct hda_pcm_stream *pcm,
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pcm->channels_max = min(pcm->channels_max, codec_pars->channels_max);
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pcm->maxbps = min(pcm->maxbps, codec_pars->maxbps);
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}
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EXPORT_SYMBOL_HDA(hdmi_eld_update_pcm_info);
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@ -1,224 +0,0 @@
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/*
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* Universal Interface for Intel High Definition Audio Codec
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*
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* HD audio interface patch for ATI HDMI codecs
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*
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* Copyright (c) 2006 ATI Technologies Inc.
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*
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*
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* This driver is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include "hda_codec.h"
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#include "hda_local.h"
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struct atihdmi_spec {
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struct hda_multi_out multiout;
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struct hda_pcm pcm_rec;
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};
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#define CVT_NID 0x02 /* audio converter */
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#define PIN_NID 0x03 /* HDMI output pin */
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static struct hda_verb atihdmi_basic_init[] = {
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/* enable digital output on pin widget */
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{ 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
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{} /* terminator */
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};
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/*
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* Controls
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*/
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static int atihdmi_build_controls(struct hda_codec *codec)
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{
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struct atihdmi_spec *spec = codec->spec;
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int err;
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err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
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if (err < 0)
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return err;
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return 0;
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}
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static int atihdmi_init(struct hda_codec *codec)
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{
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snd_hda_sequence_write(codec, atihdmi_basic_init);
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/* SI codec requires to unmute the pin */
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if (get_wcaps(codec, PIN_NID) & AC_WCAP_OUT_AMP)
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snd_hda_codec_write(codec, PIN_NID, 0,
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AC_VERB_SET_AMP_GAIN_MUTE,
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AMP_OUT_UNMUTE);
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return 0;
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}
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/*
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* Digital out
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*/
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static int atihdmi_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
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struct hda_codec *codec,
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struct snd_pcm_substream *substream)
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{
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struct atihdmi_spec *spec = codec->spec;
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return snd_hda_multi_out_dig_open(codec, &spec->multiout);
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}
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static int atihdmi_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
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struct hda_codec *codec,
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struct snd_pcm_substream *substream)
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{
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struct atihdmi_spec *spec = codec->spec;
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return snd_hda_multi_out_dig_close(codec, &spec->multiout);
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}
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static int atihdmi_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
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struct hda_codec *codec,
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unsigned int stream_tag,
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unsigned int format,
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struct snd_pcm_substream *substream)
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{
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struct atihdmi_spec *spec = codec->spec;
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int chans = substream->runtime->channels;
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int i, err;
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err = snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag,
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format, substream);
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if (err < 0)
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return err;
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snd_hda_codec_write(codec, CVT_NID, 0, AC_VERB_SET_CVT_CHAN_COUNT,
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chans - 1);
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/* FIXME: XXX */
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for (i = 0; i < chans; i++) {
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snd_hda_codec_write(codec, CVT_NID, 0,
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AC_VERB_SET_HDMI_CHAN_SLOT,
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(i << 4) | i);
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}
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return 0;
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}
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static struct hda_pcm_stream atihdmi_pcm_digital_playback = {
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.substreams = 1,
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.channels_min = 2,
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.channels_max = 2,
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.nid = CVT_NID, /* NID to query formats and rates and setup streams */
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.ops = {
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.open = atihdmi_dig_playback_pcm_open,
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.close = atihdmi_dig_playback_pcm_close,
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.prepare = atihdmi_dig_playback_pcm_prepare
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},
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};
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static int atihdmi_build_pcms(struct hda_codec *codec)
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{
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struct atihdmi_spec *spec = codec->spec;
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struct hda_pcm *info = &spec->pcm_rec;
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unsigned int chans;
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codec->num_pcms = 1;
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codec->pcm_info = info;
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info->name = "ATI HDMI";
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info->pcm_type = HDA_PCM_TYPE_HDMI;
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info->stream[SNDRV_PCM_STREAM_PLAYBACK] = atihdmi_pcm_digital_playback;
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/* FIXME: we must check ELD and change the PCM parameters dynamically
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*/
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chans = get_wcaps(codec, CVT_NID);
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chans = get_wcaps_channels(chans);
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info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
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return 0;
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}
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static void atihdmi_free(struct hda_codec *codec)
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{
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kfree(codec->spec);
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}
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static struct hda_codec_ops atihdmi_patch_ops = {
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.build_controls = atihdmi_build_controls,
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.build_pcms = atihdmi_build_pcms,
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.init = atihdmi_init,
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.free = atihdmi_free,
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};
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static int patch_atihdmi(struct hda_codec *codec)
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{
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struct atihdmi_spec *spec;
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spec = kzalloc(sizeof(*spec), GFP_KERNEL);
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if (spec == NULL)
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return -ENOMEM;
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codec->spec = spec;
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spec->multiout.num_dacs = 0; /* no analog */
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spec->multiout.max_channels = 2;
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/* NID for copying analog to digital,
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* seems to be unused in pure-digital
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* case.
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*/
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spec->multiout.dig_out_nid = CVT_NID;
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codec->patch_ops = atihdmi_patch_ops;
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return 0;
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}
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/*
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* patch entries
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*/
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static struct hda_codec_preset snd_hda_preset_atihdmi[] = {
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{ .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
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{ .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
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{ .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
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{ .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_atihdmi },
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{ .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_atihdmi },
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{ .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_atihdmi },
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{} /* terminator */
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};
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MODULE_ALIAS("snd-hda-codec-id:1002793c");
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MODULE_ALIAS("snd-hda-codec-id:10027919");
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MODULE_ALIAS("snd-hda-codec-id:1002791a");
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MODULE_ALIAS("snd-hda-codec-id:1002aa01");
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MODULE_ALIAS("snd-hda-codec-id:10951390");
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MODULE_ALIAS("snd-hda-codec-id:17e80047");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("ATI HDMI HD-audio codec");
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static struct hda_codec_preset_list atihdmi_list = {
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.preset = snd_hda_preset_atihdmi,
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.owner = THIS_MODULE,
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};
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static int __init patch_atihdmi_init(void)
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{
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return snd_hda_add_codec_preset(&atihdmi_list);
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}
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static void __exit patch_atihdmi_exit(void)
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{
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snd_hda_delete_codec_preset(&atihdmi_list);
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}
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module_init(patch_atihdmi_init)
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module_exit(patch_atihdmi_exit)
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@ -3,6 +3,9 @@
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* patch_hdmi.c - routines for HDMI/DisplayPort codecs
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*
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* Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 ATI Technologies Inc.
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* Copyright (c) 2008 NVIDIA Corp. All rights reserved.
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* Copyright (c) 2008 Wei Ni <wni@nvidia.com>
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*
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* Authors:
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* Wu Fengguang <wfg@linux.intel.com>
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@ -25,6 +28,22 @@
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include "hda_codec.h"
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#include "hda_local.h"
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/*
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* The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
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* could support two independent pipes, each of them can be connected to one or
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* more ports (DVI, HDMI or DisplayPort).
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*
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* The HDA correspondence of pipes/ports are converter/pin nodes.
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*/
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#define MAX_HDMI_CVTS 3
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#define MAX_HDMI_PINS 3
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struct hdmi_spec {
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int num_cvts;
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@ -49,10 +68,10 @@ struct hdmi_spec {
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struct hda_pcm_stream codec_pcm_pars[MAX_HDMI_CVTS];
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||||
|
||||
/*
|
||||
* nvhdmi specific
|
||||
* ati/nvhdmi specific
|
||||
*/
|
||||
struct hda_multi_out multiout;
|
||||
unsigned int codec_type;
|
||||
struct hda_pcm_stream *pcm_playback;
|
||||
|
||||
/* misc flags */
|
||||
/* PD bit indicates only the update, not the current state */
|
||||
|
@ -791,7 +810,6 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
|
|||
/*
|
||||
* HDA/HDMI auto parsing
|
||||
*/
|
||||
|
||||
static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
|
@ -922,3 +940,664 @@ static int hdmi_parse_codec(struct hda_codec *codec)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
*/
|
||||
static char *generic_hdmi_pcm_names[MAX_HDMI_CVTS] = {
|
||||
"HDMI 0",
|
||||
"HDMI 1",
|
||||
"HDMI 2",
|
||||
};
|
||||
|
||||
/*
|
||||
* HDMI callbacks
|
||||
*/
|
||||
|
||||
static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
hdmi_set_channel_count(codec, hinfo->nid,
|
||||
substream->runtime->channels);
|
||||
|
||||
hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
|
||||
|
||||
return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
|
||||
}
|
||||
|
||||
static struct hda_pcm_stream generic_hdmi_pcm_playback = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.ops = {
|
||||
.open = hdmi_pcm_open,
|
||||
.prepare = generic_hdmi_playback_pcm_prepare,
|
||||
},
|
||||
};
|
||||
|
||||
static int generic_hdmi_build_pcms(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
struct hda_pcm *info = spec->pcm_rec;
|
||||
int i;
|
||||
|
||||
codec->num_pcms = spec->num_cvts;
|
||||
codec->pcm_info = info;
|
||||
|
||||
for (i = 0; i < codec->num_pcms; i++, info++) {
|
||||
unsigned int chans;
|
||||
struct hda_pcm_stream *pstr;
|
||||
|
||||
chans = get_wcaps(codec, spec->cvt[i]);
|
||||
chans = get_wcaps_channels(chans);
|
||||
|
||||
info->name = generic_hdmi_pcm_names[i];
|
||||
info->pcm_type = HDA_PCM_TYPE_HDMI;
|
||||
pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
|
||||
if (spec->pcm_playback)
|
||||
*pstr = *spec->pcm_playback;
|
||||
else
|
||||
*pstr = generic_hdmi_pcm_playback;
|
||||
pstr->nid = spec->cvt[i];
|
||||
if (pstr->channels_max <= 2 && chans && chans <= 16)
|
||||
pstr->channels_max = chans;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int generic_hdmi_build_controls(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < codec->num_pcms; i++) {
|
||||
err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int generic_hdmi_init(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
for (i = 0; spec->pin[i]; i++) {
|
||||
hdmi_enable_output(codec, spec->pin[i]);
|
||||
snd_hda_codec_write(codec, spec->pin[i], 0,
|
||||
AC_VERB_SET_UNSOLICITED_ENABLE,
|
||||
AC_USRSP_EN | spec->pin[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void generic_hdmi_free(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < spec->num_pins; i++)
|
||||
snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
|
||||
|
||||
kfree(spec);
|
||||
}
|
||||
|
||||
static struct hda_codec_ops generic_hdmi_patch_ops = {
|
||||
.init = generic_hdmi_init,
|
||||
.free = generic_hdmi_free,
|
||||
.build_pcms = generic_hdmi_build_pcms,
|
||||
.build_controls = generic_hdmi_build_controls,
|
||||
.unsol_event = hdmi_unsol_event,
|
||||
};
|
||||
|
||||
static int patch_generic_hdmi(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
int i;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
if (hdmi_parse_codec(codec) < 0) {
|
||||
codec->spec = NULL;
|
||||
kfree(spec);
|
||||
return -EINVAL;
|
||||
}
|
||||
codec->patch_ops = generic_hdmi_patch_ops;
|
||||
|
||||
for (i = 0; i < spec->num_pins; i++)
|
||||
snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
|
||||
|
||||
init_channel_allocations();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Nvidia specific implementations
|
||||
*/
|
||||
|
||||
#define Nv_VERB_SET_Channel_Allocation 0xF79
|
||||
#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
|
||||
#define Nv_VERB_SET_Audio_Protection_On 0xF98
|
||||
#define Nv_VERB_SET_Audio_Protection_Off 0xF99
|
||||
|
||||
#define nvhdmi_master_con_nid_7x 0x04
|
||||
#define nvhdmi_master_pin_nid_7x 0x05
|
||||
|
||||
static hda_nid_t nvhdmi_con_nids_7x[4] = {
|
||||
/*front, rear, clfe, rear_surr */
|
||||
0x6, 0x8, 0xa, 0xc,
|
||||
};
|
||||
|
||||
static struct hda_verb nvhdmi_basic_init_7x[] = {
|
||||
/* set audio protect on */
|
||||
{ 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
|
||||
/* enable digital output on pin widget */
|
||||
{ 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{} /* terminator */
|
||||
};
|
||||
|
||||
#ifdef LIMITED_RATE_FMT_SUPPORT
|
||||
/* support only the safe format and rate */
|
||||
#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
|
||||
#define SUPPORTED_MAXBPS 16
|
||||
#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
|
||||
#else
|
||||
/* support all rates and formats */
|
||||
#define SUPPORTED_RATES \
|
||||
(SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
|
||||
SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
|
||||
SNDRV_PCM_RATE_192000)
|
||||
#define SUPPORTED_MAXBPS 24
|
||||
#define SUPPORTED_FORMATS \
|
||||
(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
||||
#endif
|
||||
|
||||
static int nvhdmi_7x_init(struct hda_codec *codec)
|
||||
{
|
||||
snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
return snd_hda_multi_out_dig_open(codec, &spec->multiout);
|
||||
}
|
||||
|
||||
static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
return snd_hda_multi_out_dig_close(codec, &spec->multiout);
|
||||
}
|
||||
|
||||
static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
|
||||
stream_tag, format, substream);
|
||||
}
|
||||
|
||||
static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
|
||||
0, AC_VERB_SET_CHANNEL_STREAMID, 0);
|
||||
for (i = 0; i < 4; i++) {
|
||||
/* set the stream id */
|
||||
snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
|
||||
AC_VERB_SET_CHANNEL_STREAMID, 0);
|
||||
/* set the stream format */
|
||||
snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
|
||||
AC_VERB_SET_STREAM_FORMAT, 0);
|
||||
}
|
||||
|
||||
return snd_hda_multi_out_dig_close(codec, &spec->multiout);
|
||||
}
|
||||
|
||||
static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
int chs;
|
||||
unsigned int dataDCC1, dataDCC2, chan, chanmask, channel_id;
|
||||
int i;
|
||||
|
||||
mutex_lock(&codec->spdif_mutex);
|
||||
|
||||
chs = substream->runtime->channels;
|
||||
chan = chs ? (chs - 1) : 1;
|
||||
|
||||
switch (chs) {
|
||||
default:
|
||||
case 0:
|
||||
case 2:
|
||||
chanmask = 0x00;
|
||||
break;
|
||||
case 4:
|
||||
chanmask = 0x08;
|
||||
break;
|
||||
case 6:
|
||||
chanmask = 0x0b;
|
||||
break;
|
||||
case 8:
|
||||
chanmask = 0x13;
|
||||
break;
|
||||
}
|
||||
dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
|
||||
dataDCC2 = 0x2;
|
||||
|
||||
/* set the Audio InforFrame Channel Allocation */
|
||||
snd_hda_codec_write(codec, 0x1, 0,
|
||||
Nv_VERB_SET_Channel_Allocation, chanmask);
|
||||
|
||||
/* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
|
||||
if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_master_con_nid_7x,
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
|
||||
|
||||
/* set the stream id */
|
||||
snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
|
||||
AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
|
||||
|
||||
/* set the stream format */
|
||||
snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
|
||||
AC_VERB_SET_STREAM_FORMAT, format);
|
||||
|
||||
/* turn on again (if needed) */
|
||||
/* enable and set the channel status audio/data flag */
|
||||
if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_master_con_nid_7x,
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & 0xff);
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_master_con_nid_7x,
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
if (chs == 2)
|
||||
channel_id = 0;
|
||||
else
|
||||
channel_id = i * 2;
|
||||
|
||||
/* turn off SPDIF once;
|
||||
*otherwise the IEC958 bits won't be updated
|
||||
*/
|
||||
if (codec->spdif_status_reset &&
|
||||
(codec->spdif_ctls & AC_DIG1_ENABLE))
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
|
||||
/* set the stream id */
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_CHANNEL_STREAMID,
|
||||
(stream_tag << 4) | channel_id);
|
||||
/* set the stream format */
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_STREAM_FORMAT,
|
||||
format);
|
||||
/* turn on again (if needed) */
|
||||
/* enable and set the channel status audio/data flag */
|
||||
if (codec->spdif_status_reset &&
|
||||
(codec->spdif_ctls & AC_DIG1_ENABLE)) {
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & 0xff);
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
|
||||
}
|
||||
}
|
||||
|
||||
/* set the Audio Info Frame Checksum */
|
||||
snd_hda_codec_write(codec, 0x1, 0,
|
||||
Nv_VERB_SET_Info_Frame_Checksum,
|
||||
(0x71 - chan - chanmask));
|
||||
|
||||
mutex_unlock(&codec->spdif_mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.channels_max = 8,
|
||||
.nid = nvhdmi_master_con_nid_7x,
|
||||
.rates = SUPPORTED_RATES,
|
||||
.maxbps = SUPPORTED_MAXBPS,
|
||||
.formats = SUPPORTED_FORMATS,
|
||||
.ops = {
|
||||
.open = simple_playback_pcm_open,
|
||||
.close = nvhdmi_8ch_7x_pcm_close,
|
||||
.prepare = nvhdmi_8ch_7x_pcm_prepare
|
||||
},
|
||||
};
|
||||
|
||||
static struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.nid = nvhdmi_master_con_nid_7x,
|
||||
.rates = SUPPORTED_RATES,
|
||||
.maxbps = SUPPORTED_MAXBPS,
|
||||
.formats = SUPPORTED_FORMATS,
|
||||
.ops = {
|
||||
.open = simple_playback_pcm_open,
|
||||
.close = simple_playback_pcm_close,
|
||||
.prepare = simple_playback_pcm_prepare
|
||||
},
|
||||
};
|
||||
|
||||
static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
|
||||
.build_controls = generic_hdmi_build_controls,
|
||||
.build_pcms = generic_hdmi_build_pcms,
|
||||
.init = nvhdmi_7x_init,
|
||||
.free = generic_hdmi_free,
|
||||
};
|
||||
|
||||
static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
|
||||
.build_controls = generic_hdmi_build_controls,
|
||||
.build_pcms = generic_hdmi_build_pcms,
|
||||
.init = nvhdmi_7x_init,
|
||||
.free = generic_hdmi_free,
|
||||
};
|
||||
|
||||
static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
int err = patch_generic_hdmi(codec);
|
||||
|
||||
if (err < 0)
|
||||
return err;
|
||||
spec = codec->spec;
|
||||
spec->old_pin_detect = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int patch_nvhdmi_2ch(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
|
||||
spec->multiout.num_dacs = 0; /* no analog */
|
||||
spec->multiout.max_channels = 2;
|
||||
spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
|
||||
spec->old_pin_detect = 1;
|
||||
spec->num_cvts = 1;
|
||||
spec->cvt[0] = nvhdmi_master_con_nid_7x;
|
||||
spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
|
||||
|
||||
codec->patch_ops = nvhdmi_patch_ops_2ch;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
int err = patch_nvhdmi_2ch(codec);
|
||||
|
||||
if (err < 0)
|
||||
return err;
|
||||
spec = codec->spec;
|
||||
spec->multiout.max_channels = 8;
|
||||
spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
|
||||
codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* ATI-specific implementations
|
||||
*
|
||||
* FIXME: we may omit the whole this and use the generic code once after
|
||||
* it's confirmed to work.
|
||||
*/
|
||||
|
||||
#define ATIHDMI_CVT_NID 0x02 /* audio converter */
|
||||
#define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
|
||||
|
||||
static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int chans = substream->runtime->channels;
|
||||
int i, err;
|
||||
|
||||
err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
|
||||
substream);
|
||||
if (err < 0)
|
||||
return err;
|
||||
snd_hda_codec_write(codec, spec->cvt[0], 0, AC_VERB_SET_CVT_CHAN_COUNT,
|
||||
chans - 1);
|
||||
/* FIXME: XXX */
|
||||
for (i = 0; i < chans; i++) {
|
||||
snd_hda_codec_write(codec, spec->cvt[0], 0,
|
||||
AC_VERB_SET_HDMI_CHAN_SLOT,
|
||||
(i << 4) | i);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct hda_pcm_stream atihdmi_pcm_digital_playback = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.nid = ATIHDMI_CVT_NID,
|
||||
.ops = {
|
||||
.open = simple_playback_pcm_open,
|
||||
.close = simple_playback_pcm_close,
|
||||
.prepare = atihdmi_playback_pcm_prepare
|
||||
},
|
||||
};
|
||||
|
||||
static struct hda_verb atihdmi_basic_init[] = {
|
||||
/* enable digital output on pin widget */
|
||||
{ 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
|
||||
{} /* terminator */
|
||||
};
|
||||
|
||||
static int atihdmi_init(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
|
||||
snd_hda_sequence_write(codec, atihdmi_basic_init);
|
||||
/* SI codec requires to unmute the pin */
|
||||
if (get_wcaps(codec, spec->pin[0]) & AC_WCAP_OUT_AMP)
|
||||
snd_hda_codec_write(codec, spec->pin[0], 0,
|
||||
AC_VERB_SET_AMP_GAIN_MUTE,
|
||||
AMP_OUT_UNMUTE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct hda_codec_ops atihdmi_patch_ops = {
|
||||
.build_controls = generic_hdmi_build_controls,
|
||||
.build_pcms = generic_hdmi_build_pcms,
|
||||
.init = atihdmi_init,
|
||||
.free = generic_hdmi_free,
|
||||
};
|
||||
|
||||
|
||||
static int patch_atihdmi(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
|
||||
spec->multiout.num_dacs = 0; /* no analog */
|
||||
spec->multiout.max_channels = 2;
|
||||
spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
|
||||
spec->num_cvts = 1;
|
||||
spec->cvt[0] = ATIHDMI_CVT_NID;
|
||||
spec->pin[0] = ATIHDMI_PIN_NID;
|
||||
spec->pcm_playback = &atihdmi_pcm_digital_playback;
|
||||
|
||||
codec->patch_ops = atihdmi_patch_ops;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* patch entries
|
||||
*/
|
||||
static struct hda_codec_preset snd_hda_preset_hdmi[] = {
|
||||
{ .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
|
||||
{ .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
|
||||
{ .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
|
||||
{ .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_atihdmi },
|
||||
{ .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
|
||||
{ .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
|
||||
{ .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
|
||||
{ .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
|
||||
{} /* terminator */
|
||||
};
|
||||
|
||||
MODULE_ALIAS("snd-hda-codec-id:1002793c");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10027919");
|
||||
MODULE_ALIAS("snd-hda-codec-id:1002791a");
|
||||
MODULE_ALIAS("snd-hda-codec-id:1002aa01");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10951390");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10951392");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0002");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0003");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0005");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0006");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0007");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000a");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000b");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000c");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000d");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0010");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0011");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0012");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0013");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0014");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0018");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0019");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de001a");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de001b");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de001c");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0040");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0041");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0042");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0043");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0044");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0067");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de8001");
|
||||
MODULE_ALIAS("snd-hda-codec-id:17e80047");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80860054");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862801");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862802");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862803");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862804");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862805");
|
||||
MODULE_ALIAS("snd-hda-codec-id:808629fb");
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("HDMI HD-audio codec");
|
||||
MODULE_ALIAS("snd-hda-codec-intelhdmi");
|
||||
MODULE_ALIAS("snd-hda-codec-nvhdmi");
|
||||
MODULE_ALIAS("snd-hda-codec-atihdmi");
|
||||
|
||||
static struct hda_codec_preset_list intel_list = {
|
||||
.preset = snd_hda_preset_hdmi,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static int __init patch_hdmi_init(void)
|
||||
{
|
||||
return snd_hda_add_codec_preset(&intel_list);
|
||||
}
|
||||
|
||||
static void __exit patch_hdmi_exit(void)
|
||||
{
|
||||
snd_hda_delete_codec_preset(&intel_list);
|
||||
}
|
||||
|
||||
module_init(patch_hdmi_init)
|
||||
module_exit(patch_hdmi_exit)
|
||||
|
|
|
@ -1,220 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* patch_intelhdmi.c - Patch for Intel HDMI codecs
|
||||
*
|
||||
* Copyright(c) 2008 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Authors:
|
||||
* Jiang Zhe <zhe.jiang@intel.com>
|
||||
* Wu Fengguang <wfg@linux.intel.com>
|
||||
*
|
||||
* Maintained by:
|
||||
* Wu Fengguang <wfg@linux.intel.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software Foundation,
|
||||
* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/slab.h>
|
||||
#include <sound/core.h>
|
||||
#include "hda_codec.h"
|
||||
#include "hda_local.h"
|
||||
|
||||
/*
|
||||
* The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
|
||||
* could support two independent pipes, each of them can be connected to one or
|
||||
* more ports (DVI, HDMI or DisplayPort).
|
||||
*
|
||||
* The HDA correspondence of pipes/ports are converter/pin nodes.
|
||||
*/
|
||||
#define MAX_HDMI_CVTS 3
|
||||
#define MAX_HDMI_PINS 3
|
||||
|
||||
#include "patch_hdmi.c"
|
||||
|
||||
static char *intel_hdmi_pcm_names[MAX_HDMI_CVTS] = {
|
||||
"INTEL HDMI 0",
|
||||
"INTEL HDMI 1",
|
||||
"INTEL HDMI 2",
|
||||
};
|
||||
|
||||
/*
|
||||
* HDMI callbacks
|
||||
*/
|
||||
|
||||
static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
hdmi_set_channel_count(codec, hinfo->nid,
|
||||
substream->runtime->channels);
|
||||
|
||||
hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
|
||||
|
||||
return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
|
||||
}
|
||||
|
||||
static struct hda_pcm_stream intel_hdmi_pcm_playback = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.ops = {
|
||||
.open = hdmi_pcm_open,
|
||||
.prepare = intel_hdmi_playback_pcm_prepare,
|
||||
},
|
||||
};
|
||||
|
||||
static int intel_hdmi_build_pcms(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
struct hda_pcm *info = spec->pcm_rec;
|
||||
int i;
|
||||
|
||||
codec->num_pcms = spec->num_cvts;
|
||||
codec->pcm_info = info;
|
||||
|
||||
for (i = 0; i < codec->num_pcms; i++, info++) {
|
||||
unsigned int chans;
|
||||
|
||||
chans = get_wcaps(codec, spec->cvt[i]);
|
||||
chans = get_wcaps_channels(chans);
|
||||
|
||||
info->name = intel_hdmi_pcm_names[i];
|
||||
info->pcm_type = HDA_PCM_TYPE_HDMI;
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
|
||||
intel_hdmi_pcm_playback;
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_hdmi_build_controls(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < codec->num_pcms; i++) {
|
||||
err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_hdmi_init(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
for (i = 0; spec->pin[i]; i++) {
|
||||
hdmi_enable_output(codec, spec->pin[i]);
|
||||
snd_hda_codec_write(codec, spec->pin[i], 0,
|
||||
AC_VERB_SET_UNSOLICITED_ENABLE,
|
||||
AC_USRSP_EN | spec->pin[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void intel_hdmi_free(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < spec->num_pins; i++)
|
||||
snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
|
||||
|
||||
kfree(spec);
|
||||
}
|
||||
|
||||
static struct hda_codec_ops intel_hdmi_patch_ops = {
|
||||
.init = intel_hdmi_init,
|
||||
.free = intel_hdmi_free,
|
||||
.build_pcms = intel_hdmi_build_pcms,
|
||||
.build_controls = intel_hdmi_build_controls,
|
||||
.unsol_event = hdmi_unsol_event,
|
||||
};
|
||||
|
||||
static int patch_intel_hdmi(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
int i;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
if (hdmi_parse_codec(codec) < 0) {
|
||||
codec->spec = NULL;
|
||||
kfree(spec);
|
||||
return -EINVAL;
|
||||
}
|
||||
codec->patch_ops = intel_hdmi_patch_ops;
|
||||
|
||||
for (i = 0; i < spec->num_pins; i++)
|
||||
snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
|
||||
|
||||
init_channel_allocations();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
|
||||
{ .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_intel_hdmi },
|
||||
{ .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
|
||||
{} /* terminator */
|
||||
};
|
||||
|
||||
MODULE_ALIAS("snd-hda-codec-id:808629fb");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862801");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862802");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862803");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862804");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80862805");
|
||||
MODULE_ALIAS("snd-hda-codec-id:80860054");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10951392");
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
|
||||
|
||||
static struct hda_codec_preset_list intel_list = {
|
||||
.preset = snd_hda_preset_intelhdmi,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static int __init patch_intelhdmi_init(void)
|
||||
{
|
||||
return snd_hda_add_codec_preset(&intel_list);
|
||||
}
|
||||
|
||||
static void __exit patch_intelhdmi_exit(void)
|
||||
{
|
||||
snd_hda_delete_codec_preset(&intel_list);
|
||||
}
|
||||
|
||||
module_init(patch_intelhdmi_init)
|
||||
module_exit(patch_intelhdmi_exit)
|
|
@ -1,608 +0,0 @@
|
|||
/*
|
||||
* Universal Interface for Intel High Definition Audio Codec
|
||||
*
|
||||
* HD audio interface patch for NVIDIA HDMI codecs
|
||||
*
|
||||
* Copyright (c) 2008 NVIDIA Corp. All rights reserved.
|
||||
* Copyright (c) 2008 Wei Ni <wni@nvidia.com>
|
||||
*
|
||||
*
|
||||
* This driver is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This driver is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/slab.h>
|
||||
#include <sound/core.h>
|
||||
#include "hda_codec.h"
|
||||
#include "hda_local.h"
|
||||
|
||||
#define MAX_HDMI_CVTS 1
|
||||
#define MAX_HDMI_PINS 1
|
||||
|
||||
#include "patch_hdmi.c"
|
||||
|
||||
static char *nvhdmi_pcm_names[MAX_HDMI_CVTS] = {
|
||||
"NVIDIA HDMI",
|
||||
};
|
||||
|
||||
/* define below to restrict the supported rates and formats */
|
||||
/* #define LIMITED_RATE_FMT_SUPPORT */
|
||||
|
||||
enum HDACodec {
|
||||
HDA_CODEC_NVIDIA_MCP7X,
|
||||
HDA_CODEC_NVIDIA_MCP89,
|
||||
HDA_CODEC_NVIDIA_GT21X,
|
||||
HDA_CODEC_INVALID
|
||||
};
|
||||
|
||||
#define Nv_VERB_SET_Channel_Allocation 0xF79
|
||||
#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
|
||||
#define Nv_VERB_SET_Audio_Protection_On 0xF98
|
||||
#define Nv_VERB_SET_Audio_Protection_Off 0xF99
|
||||
|
||||
#define nvhdmi_master_con_nid_7x 0x04
|
||||
#define nvhdmi_master_pin_nid_7x 0x05
|
||||
|
||||
#define nvhdmi_master_con_nid_89 0x04
|
||||
#define nvhdmi_master_pin_nid_89 0x05
|
||||
|
||||
static hda_nid_t nvhdmi_con_nids_7x[4] = {
|
||||
/*front, rear, clfe, rear_surr */
|
||||
0x6, 0x8, 0xa, 0xc,
|
||||
};
|
||||
|
||||
static struct hda_verb nvhdmi_basic_init_7x[] = {
|
||||
/* set audio protect on */
|
||||
{ 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
|
||||
/* enable digital output on pin widget */
|
||||
{ 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{ 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
|
||||
{} /* terminator */
|
||||
};
|
||||
|
||||
#ifdef LIMITED_RATE_FMT_SUPPORT
|
||||
/* support only the safe format and rate */
|
||||
#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
|
||||
#define SUPPORTED_MAXBPS 16
|
||||
#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
|
||||
#else
|
||||
/* support all rates and formats */
|
||||
#define SUPPORTED_RATES \
|
||||
(SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
|
||||
SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
|
||||
SNDRV_PCM_RATE_192000)
|
||||
#define SUPPORTED_MAXBPS 24
|
||||
#define SUPPORTED_FORMATS \
|
||||
(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Controls
|
||||
*/
|
||||
static int nvhdmi_build_controls(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
|
||||
|| (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
|
||||
for (i = 0; i < codec->num_pcms; i++) {
|
||||
err = snd_hda_create_spdif_out_ctls(codec,
|
||||
spec->cvt[i]);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
} else {
|
||||
err = snd_hda_create_spdif_out_ctls(codec,
|
||||
spec->multiout.dig_out_nid);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nvhdmi_init(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
|
||||
|| (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
|
||||
for (i = 0; spec->pin[i]; i++) {
|
||||
hdmi_enable_output(codec, spec->pin[i]);
|
||||
snd_hda_codec_write(codec, spec->pin[i], 0,
|
||||
AC_VERB_SET_UNSOLICITED_ENABLE,
|
||||
AC_USRSP_EN | spec->pin[i]);
|
||||
}
|
||||
} else {
|
||||
snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void nvhdmi_free(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
|
||||
|| (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
|
||||
for (i = 0; i < spec->num_pins; i++)
|
||||
snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
|
||||
}
|
||||
|
||||
kfree(spec);
|
||||
}
|
||||
|
||||
/*
|
||||
* Digital out
|
||||
*/
|
||||
static int nvhdmi_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
return snd_hda_multi_out_dig_open(codec, &spec->multiout);
|
||||
}
|
||||
|
||||
static int nvhdmi_dig_playback_pcm_close_8ch_7x(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
int i;
|
||||
|
||||
snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
|
||||
0, AC_VERB_SET_CHANNEL_STREAMID, 0);
|
||||
for (i = 0; i < 4; i++) {
|
||||
/* set the stream id */
|
||||
snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
|
||||
AC_VERB_SET_CHANNEL_STREAMID, 0);
|
||||
/* set the stream format */
|
||||
snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
|
||||
AC_VERB_SET_STREAM_FORMAT, 0);
|
||||
}
|
||||
|
||||
return snd_hda_multi_out_dig_close(codec, &spec->multiout);
|
||||
}
|
||||
|
||||
static int nvhdmi_dig_playback_pcm_close_2ch(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
return snd_hda_multi_out_dig_close(codec, &spec->multiout);
|
||||
}
|
||||
|
||||
static int nvhdmi_dig_playback_pcm_prepare_8ch_89(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
hdmi_set_channel_count(codec, hinfo->nid,
|
||||
substream->runtime->channels);
|
||||
|
||||
hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
|
||||
|
||||
return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
|
||||
}
|
||||
|
||||
static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
int chs;
|
||||
unsigned int dataDCC1, dataDCC2, chan, chanmask, channel_id;
|
||||
int i;
|
||||
|
||||
mutex_lock(&codec->spdif_mutex);
|
||||
|
||||
chs = substream->runtime->channels;
|
||||
chan = chs ? (chs - 1) : 1;
|
||||
|
||||
switch (chs) {
|
||||
default:
|
||||
case 0:
|
||||
case 2:
|
||||
chanmask = 0x00;
|
||||
break;
|
||||
case 4:
|
||||
chanmask = 0x08;
|
||||
break;
|
||||
case 6:
|
||||
chanmask = 0x0b;
|
||||
break;
|
||||
case 8:
|
||||
chanmask = 0x13;
|
||||
break;
|
||||
}
|
||||
dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
|
||||
dataDCC2 = 0x2;
|
||||
|
||||
/* set the Audio InforFrame Channel Allocation */
|
||||
snd_hda_codec_write(codec, 0x1, 0,
|
||||
Nv_VERB_SET_Channel_Allocation, chanmask);
|
||||
|
||||
/* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
|
||||
if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_master_con_nid_7x,
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
|
||||
|
||||
/* set the stream id */
|
||||
snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
|
||||
AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
|
||||
|
||||
/* set the stream format */
|
||||
snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
|
||||
AC_VERB_SET_STREAM_FORMAT, format);
|
||||
|
||||
/* turn on again (if needed) */
|
||||
/* enable and set the channel status audio/data flag */
|
||||
if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_master_con_nid_7x,
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & 0xff);
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_master_con_nid_7x,
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
if (chs == 2)
|
||||
channel_id = 0;
|
||||
else
|
||||
channel_id = i * 2;
|
||||
|
||||
/* turn off SPDIF once;
|
||||
*otherwise the IEC958 bits won't be updated
|
||||
*/
|
||||
if (codec->spdif_status_reset &&
|
||||
(codec->spdif_ctls & AC_DIG1_ENABLE))
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
|
||||
/* set the stream id */
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_CHANNEL_STREAMID,
|
||||
(stream_tag << 4) | channel_id);
|
||||
/* set the stream format */
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_STREAM_FORMAT,
|
||||
format);
|
||||
/* turn on again (if needed) */
|
||||
/* enable and set the channel status audio/data flag */
|
||||
if (codec->spdif_status_reset &&
|
||||
(codec->spdif_ctls & AC_DIG1_ENABLE)) {
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_1,
|
||||
codec->spdif_ctls & 0xff);
|
||||
snd_hda_codec_write(codec,
|
||||
nvhdmi_con_nids_7x[i],
|
||||
0,
|
||||
AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
|
||||
}
|
||||
}
|
||||
|
||||
/* set the Audio Info Frame Checksum */
|
||||
snd_hda_codec_write(codec, 0x1, 0,
|
||||
Nv_VERB_SET_Info_Frame_Checksum,
|
||||
(0x71 - chan - chanmask));
|
||||
|
||||
mutex_unlock(&codec->spdif_mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nvhdmi_dig_playback_pcm_prepare_2ch(struct hda_pcm_stream *hinfo,
|
||||
struct hda_codec *codec,
|
||||
unsigned int stream_tag,
|
||||
unsigned int format,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag,
|
||||
format, substream);
|
||||
}
|
||||
|
||||
static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch_89 = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.ops = {
|
||||
.open = hdmi_pcm_open,
|
||||
.prepare = nvhdmi_dig_playback_pcm_prepare_8ch_89,
|
||||
},
|
||||
};
|
||||
|
||||
static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch_7x = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.channels_max = 8,
|
||||
.nid = nvhdmi_master_con_nid_7x,
|
||||
.rates = SUPPORTED_RATES,
|
||||
.maxbps = SUPPORTED_MAXBPS,
|
||||
.formats = SUPPORTED_FORMATS,
|
||||
.ops = {
|
||||
.open = nvhdmi_dig_playback_pcm_open,
|
||||
.close = nvhdmi_dig_playback_pcm_close_8ch_7x,
|
||||
.prepare = nvhdmi_dig_playback_pcm_prepare_8ch
|
||||
},
|
||||
};
|
||||
|
||||
static struct hda_pcm_stream nvhdmi_pcm_digital_playback_2ch = {
|
||||
.substreams = 1,
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.nid = nvhdmi_master_con_nid_7x,
|
||||
.rates = SUPPORTED_RATES,
|
||||
.maxbps = SUPPORTED_MAXBPS,
|
||||
.formats = SUPPORTED_FORMATS,
|
||||
.ops = {
|
||||
.open = nvhdmi_dig_playback_pcm_open,
|
||||
.close = nvhdmi_dig_playback_pcm_close_2ch,
|
||||
.prepare = nvhdmi_dig_playback_pcm_prepare_2ch
|
||||
},
|
||||
};
|
||||
|
||||
static int nvhdmi_build_pcms_8ch_89(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
struct hda_pcm *info = spec->pcm_rec;
|
||||
int i;
|
||||
|
||||
codec->num_pcms = spec->num_cvts;
|
||||
codec->pcm_info = info;
|
||||
|
||||
for (i = 0; i < codec->num_pcms; i++, info++) {
|
||||
unsigned int chans;
|
||||
|
||||
chans = get_wcaps(codec, spec->cvt[i]);
|
||||
chans = get_wcaps_channels(chans);
|
||||
|
||||
info->name = nvhdmi_pcm_names[i];
|
||||
info->pcm_type = HDA_PCM_TYPE_HDMI;
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK]
|
||||
= nvhdmi_pcm_digital_playback_8ch_89;
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nvhdmi_build_pcms_8ch_7x(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
struct hda_pcm *info = spec->pcm_rec;
|
||||
|
||||
codec->num_pcms = 1;
|
||||
codec->pcm_info = info;
|
||||
|
||||
info->name = "NVIDIA HDMI";
|
||||
info->pcm_type = HDA_PCM_TYPE_HDMI;
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK]
|
||||
= nvhdmi_pcm_digital_playback_8ch_7x;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nvhdmi_build_pcms_2ch(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec = codec->spec;
|
||||
struct hda_pcm *info = spec->pcm_rec;
|
||||
|
||||
codec->num_pcms = 1;
|
||||
codec->pcm_info = info;
|
||||
|
||||
info->name = "NVIDIA HDMI";
|
||||
info->pcm_type = HDA_PCM_TYPE_HDMI;
|
||||
info->stream[SNDRV_PCM_STREAM_PLAYBACK]
|
||||
= nvhdmi_pcm_digital_playback_2ch;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct hda_codec_ops nvhdmi_patch_ops_8ch_89 = {
|
||||
.build_controls = nvhdmi_build_controls,
|
||||
.build_pcms = nvhdmi_build_pcms_8ch_89,
|
||||
.init = nvhdmi_init,
|
||||
.free = nvhdmi_free,
|
||||
.unsol_event = hdmi_unsol_event,
|
||||
};
|
||||
|
||||
static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
|
||||
.build_controls = nvhdmi_build_controls,
|
||||
.build_pcms = nvhdmi_build_pcms_8ch_7x,
|
||||
.init = nvhdmi_init,
|
||||
.free = nvhdmi_free,
|
||||
};
|
||||
|
||||
static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
|
||||
.build_controls = nvhdmi_build_controls,
|
||||
.build_pcms = nvhdmi_build_pcms_2ch,
|
||||
.init = nvhdmi_init,
|
||||
.free = nvhdmi_free,
|
||||
};
|
||||
|
||||
static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
int i;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
spec->codec_type = HDA_CODEC_NVIDIA_MCP89;
|
||||
spec->old_pin_detect = 1;
|
||||
|
||||
if (hdmi_parse_codec(codec) < 0) {
|
||||
codec->spec = NULL;
|
||||
kfree(spec);
|
||||
return -EINVAL;
|
||||
}
|
||||
codec->patch_ops = nvhdmi_patch_ops_8ch_89;
|
||||
|
||||
for (i = 0; i < spec->num_pins; i++)
|
||||
snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
|
||||
|
||||
init_channel_allocations();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
|
||||
spec->multiout.num_dacs = 0; /* no analog */
|
||||
spec->multiout.max_channels = 8;
|
||||
spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
|
||||
spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
|
||||
spec->old_pin_detect = 1;
|
||||
|
||||
codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int patch_nvhdmi_2ch(struct hda_codec *codec)
|
||||
{
|
||||
struct hdmi_spec *spec;
|
||||
|
||||
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
||||
if (spec == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
codec->spec = spec;
|
||||
|
||||
spec->multiout.num_dacs = 0; /* no analog */
|
||||
spec->multiout.max_channels = 2;
|
||||
spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
|
||||
spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
|
||||
spec->old_pin_detect = 1;
|
||||
|
||||
codec->patch_ops = nvhdmi_patch_ops_2ch;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* patch entries
|
||||
*/
|
||||
static struct hda_codec_preset snd_hda_preset_nvhdmi[] = {
|
||||
{ .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
|
||||
{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
|
||||
{ .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
|
||||
{ .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
|
||||
{} /* terminator */
|
||||
};
|
||||
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0002");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0003");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0005");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0006");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0007");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000a");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000b");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000c");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de000d");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0010");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0011");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0012");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0013");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0014");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0018");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0019");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de001a");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de001b");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de001c");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0040");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0041");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0042");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0043");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0044");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de0067");
|
||||
MODULE_ALIAS("snd-hda-codec-id:10de8001");
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("NVIDIA HDMI HD-audio codec");
|
||||
|
||||
static struct hda_codec_preset_list nvhdmi_list = {
|
||||
.preset = snd_hda_preset_nvhdmi,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static int __init patch_nvhdmi_init(void)
|
||||
{
|
||||
return snd_hda_add_codec_preset(&nvhdmi_list);
|
||||
}
|
||||
|
||||
static void __exit patch_nvhdmi_exit(void)
|
||||
{
|
||||
snd_hda_delete_codec_preset(&nvhdmi_list);
|
||||
}
|
||||
|
||||
module_init(patch_nvhdmi_init)
|
||||
module_exit(patch_nvhdmi_exit)
|
Loading…
Reference in a new issue