Merge series "ASoC: use inclusive language for bclk/fsync/topology" from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>:
The SOF (Sound Open Firmware) tree contains a lot of references in topology files to 'codec_slave'/'codec_master' terms, which in turn come from alsa-lib and ALSA/ASoC topology support at the kernel level. These terms are no longer compatible with the guidelines adopted by the kernel community [1], standard organizations, and need to change in backwards-compatible ways. The main/secondary terms typically suggested in guidelines don't mean anything for clocks, this patchset suggests instead the use of 'provider' and 'consumer' terms, with the 'codec' prefix kept to make it clear that the codec is the reference. The CM/CS suffixes are also replaced by CP/CC. It can be argued that the change of suffix is invasive, but finding a replacement that keeps the M and S shortcuts has proven difficult in quite a few contexts. The previous definitions are kept for backwards-compatibility so this change should not have any functional impact. It is suggested that new contributions only use the new terms but there is no requirement to transition immediately to the new definitions for existing code. Intel will however update all its past contributions related to bit clock/frame sync configurations immediately. This patchset contains the kernel changes only, the alsa-lib changes were shared separately. Feedback welcome ~Pierre [1] https://lkml.org/lkml/2020/7/4/229 Pierre-Louis Bossart (4): ASoC: topology: use inclusive language for bclk and fsync ASoC: SOF: use inclusive language for bclk and fsync ASoC: Intel: atom: use inclusive language for SSP bclk/fsync ASoC: Intel: keembay: use inclusive language for bclk and fsync include/sound/soc-dai.h | 32 +++++++++++++++--------- include/sound/sof/dai.h | 16 ++++++++---- include/uapi/sound/asoc.h | 22 ++++++++++------ sound/soc/intel/atom/sst-atom-controls.c | 12 ++++----- sound/soc/intel/atom/sst-atom-controls.h | 4 +-- sound/soc/intel/keembay/kmb_platform.c | 22 ++++++++-------- sound/soc/intel/keembay/kmb_platform.h | 8 +++--- sound/soc/soc-topology.c | 24 +++++++++--------- sound/soc/sof/topology.c | 18 ++++++------- 9 files changed, 89 insertions(+), 69 deletions(-) -- 2.25.1zero-sugar-mainline-defconfig
Mark Brown
commit
85288b3bf1
|
|
@ -72,21 +72,29 @@ struct snd_compr_stream;
|
|||
#define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */
|
||||
|
||||
/*
|
||||
* DAI hardware clock masters.
|
||||
* DAI hardware clock providers/consumers
|
||||
*
|
||||
* This is wrt the codec, the inverse is true for the interface
|
||||
* i.e. if the codec is clk and FRM master then the interface is
|
||||
* clk and frame secondary.
|
||||
* i.e. if the codec is clk and FRM provider then the interface is
|
||||
* clk and frame consumer.
|
||||
*/
|
||||
#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & FRM master */
|
||||
#define SND_SOC_DAIFMT_CBS_CFM (2 << 12) /* codec clk secondary & FRM master */
|
||||
#define SND_SOC_DAIFMT_CBM_CFS (3 << 12) /* codec clk master & frame secondary */
|
||||
#define SND_SOC_DAIFMT_CBS_CFS (4 << 12) /* codec clk & FRM secondary */
|
||||
#define SND_SOC_DAIFMT_CBP_CFP (1 << 12) /* codec clk provider & frame provider */
|
||||
#define SND_SOC_DAIFMT_CBC_CFP (2 << 12) /* codec clk consumer & frame provider */
|
||||
#define SND_SOC_DAIFMT_CBP_CFC (3 << 12) /* codec clk provider & frame consumer */
|
||||
#define SND_SOC_DAIFMT_CBC_CFC (4 << 12) /* codec clk consumer & frame follower */
|
||||
|
||||
#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f
|
||||
#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0
|
||||
#define SND_SOC_DAIFMT_INV_MASK 0x0f00
|
||||
#define SND_SOC_DAIFMT_MASTER_MASK 0xf000
|
||||
/* previous definitions kept for backwards-compatibility, do not use in new contributions */
|
||||
#define SND_SOC_DAIFMT_CBM_CFM SND_SOC_DAIFMT_CBP_CFP
|
||||
#define SND_SOC_DAIFMT_CBS_CFM SND_SOC_DAIFMT_CBC_CFP
|
||||
#define SND_SOC_DAIFMT_CBM_CFS SND_SOC_DAIFMT_CBP_CFC
|
||||
#define SND_SOC_DAIFMT_CBS_CFS SND_SOC_DAIFMT_CBC_CFC
|
||||
|
||||
#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f
|
||||
#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0
|
||||
#define SND_SOC_DAIFMT_INV_MASK 0x0f00
|
||||
#define SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK 0xf000
|
||||
|
||||
#define SND_SOC_DAIFMT_MASTER_MASK SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK
|
||||
|
||||
/*
|
||||
* Master Clock Directions
|
||||
|
|
|
|||
|
|
@ -34,15 +34,21 @@
|
|||
#define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */
|
||||
#define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */
|
||||
|
||||
#define SOF_DAI_FMT_CBM_CFM (0 << 12) /**< codec clk & FRM master */
|
||||
#define SOF_DAI_FMT_CBS_CFM (2 << 12) /**< codec clk slave & FRM master */
|
||||
#define SOF_DAI_FMT_CBM_CFS (3 << 12) /**< codec clk master & frame slave */
|
||||
#define SOF_DAI_FMT_CBS_CFS (4 << 12) /**< codec clk & FRM slave */
|
||||
#define SOF_DAI_FMT_CBP_CFP (0 << 12) /**< codec bclk provider & frame provider */
|
||||
#define SOF_DAI_FMT_CBC_CFP (2 << 12) /**< codec bclk consumer & frame provider */
|
||||
#define SOF_DAI_FMT_CBP_CFC (3 << 12) /**< codec bclk provider & frame consumer */
|
||||
#define SOF_DAI_FMT_CBC_CFC (4 << 12) /**< codec bclk consumer & frame consumer */
|
||||
|
||||
/* keep old definitions for backwards compatibility */
|
||||
#define SOF_DAI_FMT_CBM_CFM SOF_DAI_FMT_CBP_CFP
|
||||
#define SOF_DAI_FMT_CBS_CFM SOF_DAI_FMT_CBC_CFP
|
||||
#define SOF_DAI_FMT_CBM_CFS SOF_DAI_FMT_CBP_CFC
|
||||
#define SOF_DAI_FMT_CBS_CFS SOF_DAI_FMT_CBC_CFC
|
||||
|
||||
#define SOF_DAI_FMT_FORMAT_MASK 0x000f
|
||||
#define SOF_DAI_FMT_CLOCK_MASK 0x00f0
|
||||
#define SOF_DAI_FMT_INV_MASK 0x0f00
|
||||
#define SOF_DAI_FMT_MASTER_MASK 0xf000
|
||||
#define SOF_DAI_FMT_CLOCK_PROVIDER_MASK 0xf000
|
||||
|
||||
/** \brief Types of DAI */
|
||||
enum sof_ipc_dai_type {
|
||||
|
|
|
|||
|
|
@ -170,16 +170,22 @@
|
|||
#define SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP (1 << 3)
|
||||
|
||||
/* DAI topology BCLK parameter
|
||||
* For the backwards capability, by default codec is bclk master
|
||||
* For the backwards capability, by default codec is bclk provider
|
||||
*/
|
||||
#define SND_SOC_TPLG_BCLK_CM 0 /* codec is bclk master */
|
||||
#define SND_SOC_TPLG_BCLK_CS 1 /* codec is bclk slave */
|
||||
#define SND_SOC_TPLG_BCLK_CP 0 /* codec is bclk provider */
|
||||
#define SND_SOC_TPLG_BCLK_CC 1 /* codec is bclk consumer */
|
||||
/* keep previous definitions for compatibility */
|
||||
#define SND_SOC_TPLG_BCLK_CM SND_SOC_TPLG_BCLK_CP
|
||||
#define SND_SOC_TPLG_BCLK_CS SND_SOC_TPLG_BCLK_CC
|
||||
|
||||
/* DAI topology FSYNC parameter
|
||||
* For the backwards capability, by default codec is fsync master
|
||||
* For the backwards capability, by default codec is fsync provider
|
||||
*/
|
||||
#define SND_SOC_TPLG_FSYNC_CM 0 /* codec is fsync master */
|
||||
#define SND_SOC_TPLG_FSYNC_CS 1 /* codec is fsync slave */
|
||||
#define SND_SOC_TPLG_FSYNC_CP 0 /* codec is fsync provider */
|
||||
#define SND_SOC_TPLG_FSYNC_CC 1 /* codec is fsync consumer */
|
||||
/* keep previous definitions for compatibility */
|
||||
#define SND_SOC_TPLG_FSYNC_CM SND_SOC_TPLG_FSYNC_CP
|
||||
#define SND_SOC_TPLG_FSYNC_CS SND_SOC_TPLG_FSYNC_CC
|
||||
|
||||
/*
|
||||
* Block Header.
|
||||
|
|
@ -336,8 +342,8 @@ struct snd_soc_tplg_hw_config {
|
|||
__u8 clock_gated; /* SND_SOC_TPLG_DAI_CLK_GATE_ value */
|
||||
__u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */
|
||||
__u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */
|
||||
__u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */
|
||||
__u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */
|
||||
__u8 bclk_provider; /* SND_SOC_TPLG_BCLK_ value */
|
||||
__u8 fsync_provider; /* SND_SOC_TPLG_FSYNC_ value */
|
||||
__u8 mclk_direction; /* SND_SOC_TPLG_MCLK_ value */
|
||||
__le16 reserved; /* for 32bit alignment */
|
||||
__le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */
|
||||
|
|
|
|||
|
|
@ -827,14 +827,14 @@ static int sst_get_ssp_mode(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
{
|
||||
int format;
|
||||
|
||||
format = (fmt & SND_SOC_DAIFMT_MASTER_MASK);
|
||||
format = (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK);
|
||||
dev_dbg(dai->dev, "Enter:%s, format=%x\n", __func__, format);
|
||||
|
||||
switch (format) {
|
||||
case SND_SOC_DAIFMT_CBS_CFS:
|
||||
return SSP_MODE_MASTER;
|
||||
case SND_SOC_DAIFMT_CBM_CFM:
|
||||
return SSP_MODE_SLAVE;
|
||||
case SND_SOC_DAIFMT_CBC_CFC:
|
||||
return SSP_MODE_PROVIDER;
|
||||
case SND_SOC_DAIFMT_CBP_CFP:
|
||||
return SSP_MODE_CONSUMER;
|
||||
default:
|
||||
dev_err(dai->dev, "Invalid ssp protocol: %d\n", format);
|
||||
}
|
||||
|
|
@ -905,7 +905,7 @@ static const struct sst_ssp_config sst_ssp_configs = {
|
|||
.ssp_id = SSP_CODEC,
|
||||
.bits_per_slot = 24,
|
||||
.slots = 4,
|
||||
.ssp_mode = SSP_MODE_MASTER,
|
||||
.ssp_mode = SSP_MODE_PROVIDER,
|
||||
.pcm_mode = SSP_PCM_MODE_NETWORK,
|
||||
.duplex = SSP_DUPLEX,
|
||||
.ssp_protocol = SSP_MODE_PCM,
|
||||
|
|
|
|||
|
|
@ -439,8 +439,8 @@ struct sst_cmd_tone_stop {
|
|||
} __packed;
|
||||
|
||||
enum sst_ssp_mode {
|
||||
SSP_MODE_MASTER = 0,
|
||||
SSP_MODE_SLAVE = 1,
|
||||
SSP_MODE_PROVIDER = 0,
|
||||
SSP_MODE_CONSUMER = 1,
|
||||
};
|
||||
|
||||
enum sst_ssp_pcm_mode {
|
||||
|
|
|
|||
|
|
@ -358,7 +358,7 @@ static void kmb_i2s_start(struct kmb_i2s_info *kmb_i2s,
|
|||
|
||||
kmb_i2s_irq_trigger(kmb_i2s, substream->stream, config->chan_nr, true);
|
||||
|
||||
if (kmb_i2s->master)
|
||||
if (kmb_i2s->clock_provider)
|
||||
writel(1, kmb_i2s->i2s_base + CER);
|
||||
else
|
||||
writel(0, kmb_i2s->i2s_base + CER);
|
||||
|
|
@ -393,13 +393,13 @@ static int kmb_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
|
|||
struct kmb_i2s_info *kmb_i2s = snd_soc_dai_get_drvdata(cpu_dai);
|
||||
int ret;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
case SND_SOC_DAIFMT_CBM_CFM:
|
||||
kmb_i2s->master = false;
|
||||
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
|
||||
case SND_SOC_DAIFMT_CBP_CFP:
|
||||
kmb_i2s->clock_provider = false;
|
||||
ret = 0;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_CBS_CFS:
|
||||
writel(MASTER_MODE, kmb_i2s->pss_base + I2S_GEN_CFG_0);
|
||||
case SND_SOC_DAIFMT_CBC_CFC:
|
||||
writel(CLOCK_PROVIDER_MODE, kmb_i2s->pss_base + I2S_GEN_CFG_0);
|
||||
|
||||
ret = clk_prepare_enable(kmb_i2s->clk_i2s);
|
||||
if (ret < 0)
|
||||
|
|
@ -410,7 +410,7 @@ static int kmb_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
kmb_i2s->master = true;
|
||||
kmb_i2s->clock_provider = true;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
|
|
@ -510,7 +510,7 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream,
|
|||
* Platform is not capable of providing clocks for
|
||||
* multi channel audio
|
||||
*/
|
||||
if (kmb_i2s->master)
|
||||
if (kmb_i2s->clock_provider)
|
||||
return -EINVAL;
|
||||
|
||||
write_val = ((config->chan_nr / 2) << TDM_CHANNEL_CONFIG_BIT) |
|
||||
|
|
@ -524,12 +524,12 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream,
|
|||
* Platform is only capable of providing clocks need for
|
||||
* 2 channel master mode
|
||||
*/
|
||||
if (!(kmb_i2s->master))
|
||||
if (!(kmb_i2s->clock_provider))
|
||||
return -EINVAL;
|
||||
|
||||
write_val = ((config->chan_nr / 2) << TDM_CHANNEL_CONFIG_BIT) |
|
||||
(config->data_width << DATA_WIDTH_CONFIG_BIT) |
|
||||
MASTER_MODE | I2S_OPERATION;
|
||||
CLOCK_PROVIDER_MODE | I2S_OPERATION;
|
||||
|
||||
writel(write_val, kmb_i2s->pss_base + I2S_GEN_CFG_0);
|
||||
break;
|
||||
|
|
@ -544,7 +544,7 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream,
|
|||
|
||||
config->sample_rate = params_rate(hw_params);
|
||||
|
||||
if (kmb_i2s->master) {
|
||||
if (kmb_i2s->clock_provider) {
|
||||
/* Only 2 ch supported in Master mode */
|
||||
u32 bitclk = config->sample_rate * config->data_width * 2;
|
||||
|
||||
|
|
|
|||
|
|
@ -58,7 +58,7 @@
|
|||
#define PSS_CPR_CLK_CLR 0x000
|
||||
#define PSS_CPR_AUX_RST_EN 0x070
|
||||
|
||||
#define MASTER_MODE BIT(13)
|
||||
#define CLOCK_PROVIDER_MODE BIT(13)
|
||||
|
||||
/* Interrupt Flag */
|
||||
#define TX_INT_FLAG GENMASK(5, 4)
|
||||
|
|
@ -99,8 +99,8 @@
|
|||
|
||||
#define DWC_I2S_PLAY BIT(0)
|
||||
#define DWC_I2S_RECORD BIT(1)
|
||||
#define DW_I2S_SLAVE BIT(2)
|
||||
#define DW_I2S_MASTER BIT(3)
|
||||
#define DW_I2S_CONSUMER BIT(2)
|
||||
#define DW_I2S_PROVIDER BIT(3)
|
||||
|
||||
#define I2S_RXDMA 0x01C0
|
||||
#define I2S_TXDMA 0x01C8
|
||||
|
|
@ -130,7 +130,7 @@ struct kmb_i2s_info {
|
|||
u32 ccr;
|
||||
u32 xfer_resolution;
|
||||
u32 fifo_th;
|
||||
bool master;
|
||||
bool clock_provider;
|
||||
|
||||
struct i2s_clk_config_data config;
|
||||
int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
|
||||
|
|
|
|||
|
|
@ -2017,7 +2017,7 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
|
|||
struct snd_soc_tplg_link_config *cfg)
|
||||
{
|
||||
struct snd_soc_tplg_hw_config *hw_config;
|
||||
unsigned char bclk_master, fsync_master;
|
||||
unsigned char bclk_provider, fsync_provider;
|
||||
unsigned char invert_bclk, invert_fsync;
|
||||
int i;
|
||||
|
||||
|
|
@ -2057,18 +2057,18 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
|
|||
link->dai_fmt |= SND_SOC_DAIFMT_IB_IF;
|
||||
|
||||
/* clock masters */
|
||||
bclk_master = (hw_config->bclk_master ==
|
||||
SND_SOC_TPLG_BCLK_CM);
|
||||
fsync_master = (hw_config->fsync_master ==
|
||||
SND_SOC_TPLG_FSYNC_CM);
|
||||
if (bclk_master && fsync_master)
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
|
||||
else if (!bclk_master && fsync_master)
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM;
|
||||
else if (bclk_master && !fsync_master)
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFS;
|
||||
bclk_provider = (hw_config->bclk_provider ==
|
||||
SND_SOC_TPLG_BCLK_CP);
|
||||
fsync_provider = (hw_config->fsync_provider ==
|
||||
SND_SOC_TPLG_FSYNC_CP);
|
||||
if (bclk_provider && fsync_provider)
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBP_CFP;
|
||||
else if (!bclk_provider && fsync_provider)
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBC_CFP;
|
||||
else if (bclk_provider && !fsync_provider)
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBP_CFC;
|
||||
else
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;
|
||||
link->dai_fmt |= SND_SOC_DAIFMT_CBC_CFC;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2777,18 +2777,18 @@ static void sof_dai_set_format(struct snd_soc_tplg_hw_config *hw_config,
|
|||
struct sof_ipc_dai_config *config)
|
||||
{
|
||||
/* clock directions wrt codec */
|
||||
if (hw_config->bclk_master == SND_SOC_TPLG_BCLK_CM) {
|
||||
/* codec is bclk master */
|
||||
if (hw_config->fsync_master == SND_SOC_TPLG_FSYNC_CM)
|
||||
config->format |= SOF_DAI_FMT_CBM_CFM;
|
||||
if (hw_config->bclk_provider == SND_SOC_TPLG_BCLK_CP) {
|
||||
/* codec is bclk provider */
|
||||
if (hw_config->fsync_provider == SND_SOC_TPLG_FSYNC_CP)
|
||||
config->format |= SOF_DAI_FMT_CBP_CFP;
|
||||
else
|
||||
config->format |= SOF_DAI_FMT_CBM_CFS;
|
||||
config->format |= SOF_DAI_FMT_CBP_CFC;
|
||||
} else {
|
||||
/* codec is bclk slave */
|
||||
if (hw_config->fsync_master == SND_SOC_TPLG_FSYNC_CM)
|
||||
config->format |= SOF_DAI_FMT_CBS_CFM;
|
||||
/* codec is bclk consumer */
|
||||
if (hw_config->fsync_provider == SND_SOC_TPLG_FSYNC_CP)
|
||||
config->format |= SOF_DAI_FMT_CBC_CFP;
|
||||
else
|
||||
config->format |= SOF_DAI_FMT_CBS_CFS;
|
||||
config->format |= SOF_DAI_FMT_CBC_CFC;
|
||||
}
|
||||
|
||||
/* inverted clocks ? */
|
||||
|
|
|
|||
Loading…
Reference in New Issue