net: mscc: ocelot: parameterize the vcap_is2 properties
Remove the definitions for the VCAP IS2 table from ocelot_ace.c, since it is specific to VSC7514. The VSC9959 VCAP IS2 table supports more rules (1024 instead of 64) and has a different width for the action (89 bits instead of 99). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vladimir Oltean
David S. Miller
parent
1ba8f6561a
commit
8551cdeb2a
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@ -11,53 +11,7 @@
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#include "ocelot_s2.h"
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#define OCELOT_POLICER_DISCARD 0x17f
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struct vcap_props {
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const char *name; /* Symbolic name */
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u16 tg_width; /* Type-group width (in bits) */
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u16 sw_count; /* Sub word count */
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u16 entry_count; /* Entry count */
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u16 entry_words; /* Number of entry words */
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u16 entry_width; /* Entry width (in bits) */
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u16 action_count; /* Action count */
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u16 action_words; /* Number of action words */
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u16 action_width; /* Action width (in bits) */
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u16 action_type_width; /* Action type width (in bits) */
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struct {
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u16 width; /* Action type width (in bits) */
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u16 count; /* Action type sub word count */
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} action_table[2];
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u16 counter_words; /* Number of counter words */
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u16 counter_width; /* Counter width (in bits) */
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};
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#define ENTRY_WIDTH 32
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#define BITS_TO_32BIT(x) (1 + (((x) - 1) / ENTRY_WIDTH))
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static const struct vcap_props vcap_is2 = {
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.name = "IS2",
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.tg_width = 2,
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.sw_count = 4,
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.entry_count = VCAP_IS2_CNT,
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.entry_words = BITS_TO_32BIT(VCAP_IS2_ENTRY_WIDTH),
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.entry_width = VCAP_IS2_ENTRY_WIDTH,
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.action_count = (VCAP_IS2_CNT + VCAP_PORT_CNT + 2),
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.action_words = BITS_TO_32BIT(VCAP_IS2_ACTION_WIDTH),
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.action_width = (VCAP_IS2_ACTION_WIDTH),
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.action_type_width = 1,
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.action_table = {
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{
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.width = 49,
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.count = 2
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},
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{
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.width = 6,
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.count = 4
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},
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},
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.counter_words = BITS_TO_32BIT(4 * ENTRY_WIDTH),
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.counter_width = ENTRY_WIDTH,
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};
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enum vcap_sel {
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VCAP_SEL_ENTRY = 0x1,
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@ -100,11 +54,13 @@ static u32 vcap_s2_read_update_ctrl(struct ocelot *ocelot)
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static void vcap_cmd(struct ocelot *ocelot, u16 ix, int cmd, int sel)
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{
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 value = (S2_CORE_UPDATE_CTRL_UPDATE_CMD(cmd) |
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S2_CORE_UPDATE_CTRL_UPDATE_ADDR(ix) |
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S2_CORE_UPDATE_CTRL_UPDATE_SHOT);
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if ((sel & VCAP_SEL_ENTRY) && ix >= vcap_is2.entry_count)
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if ((sel & VCAP_SEL_ENTRY) && ix >= vcap_is2->entry_count)
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return;
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if (!(sel & VCAP_SEL_ENTRY))
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@ -125,14 +81,19 @@ static void vcap_cmd(struct ocelot *ocelot, u16 ix, int cmd, int sel)
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/* Convert from 0-based row to VCAP entry row and run command */
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static void vcap_row_cmd(struct ocelot *ocelot, u32 row, int cmd, int sel)
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{
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vcap_cmd(ocelot, vcap_is2.entry_count - row - 1, cmd, sel);
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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vcap_cmd(ocelot, vcap_is2->entry_count - row - 1, cmd, sel);
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}
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static void vcap_entry2cache(struct ocelot *ocelot, struct vcap_data *data)
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{
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u32 i;
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 entry_words, i;
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for (i = 0; i < vcap_is2.entry_words; i++) {
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entry_words = DIV_ROUND_UP(vcap_is2->entry_width, ENTRY_WIDTH);
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for (i = 0; i < entry_words; i++) {
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ocelot_write_rix(ocelot, data->entry[i], S2_CACHE_ENTRY_DAT, i);
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ocelot_write_rix(ocelot, ~data->mask[i], S2_CACHE_MASK_DAT, i);
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}
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@ -141,9 +102,12 @@ static void vcap_entry2cache(struct ocelot *ocelot, struct vcap_data *data)
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static void vcap_cache2entry(struct ocelot *ocelot, struct vcap_data *data)
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{
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u32 i;
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 entry_words, i;
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for (i = 0; i < vcap_is2.entry_words; i++) {
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entry_words = DIV_ROUND_UP(vcap_is2->entry_width, ENTRY_WIDTH);
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for (i = 0; i < entry_words; i++) {
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data->entry[i] = ocelot_read_rix(ocelot, S2_CACHE_ENTRY_DAT, i);
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// Invert mask
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data->mask[i] = ~ocelot_read_rix(ocelot, S2_CACHE_MASK_DAT, i);
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@ -153,49 +117,56 @@ static void vcap_cache2entry(struct ocelot *ocelot, struct vcap_data *data)
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static void vcap_action2cache(struct ocelot *ocelot, struct vcap_data *data)
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{
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u32 i, width, mask;
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 action_words, i, width, mask;
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/* Encode action type */
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width = vcap_is2.action_type_width;
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width = vcap_is2->action_type_width;
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if (width) {
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mask = GENMASK(width, 0);
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data->action[0] = ((data->action[0] & ~mask) | data->type);
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}
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for (i = 0; i < vcap_is2.action_words; i++)
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ocelot_write_rix(ocelot, data->action[i],
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S2_CACHE_ACTION_DAT, i);
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action_words = DIV_ROUND_UP(vcap_is2->action_width, ENTRY_WIDTH);
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for (i = 0; i < vcap_is2.counter_words; i++)
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ocelot_write_rix(ocelot, data->counter[i],
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S2_CACHE_CNT_DAT, i);
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for (i = 0; i < action_words; i++)
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ocelot_write_rix(ocelot, data->action[i], S2_CACHE_ACTION_DAT,
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i);
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for (i = 0; i < vcap_is2->counter_words; i++)
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ocelot_write_rix(ocelot, data->counter[i], S2_CACHE_CNT_DAT, i);
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}
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static void vcap_cache2action(struct ocelot *ocelot, struct vcap_data *data)
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{
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u32 i, width;
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 action_words, i, width;
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for (i = 0; i < vcap_is2.action_words; i++)
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action_words = DIV_ROUND_UP(vcap_is2->action_width, ENTRY_WIDTH);
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for (i = 0; i < action_words; i++)
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data->action[i] = ocelot_read_rix(ocelot, S2_CACHE_ACTION_DAT,
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i);
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for (i = 0; i < vcap_is2.counter_words; i++)
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for (i = 0; i < vcap_is2->counter_words; i++)
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data->counter[i] = ocelot_read_rix(ocelot, S2_CACHE_CNT_DAT, i);
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/* Extract action type */
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width = vcap_is2.action_type_width;
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width = vcap_is2->action_type_width;
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data->type = (width ? (data->action[0] & GENMASK(width, 0)) : 0);
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}
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/* Calculate offsets for entry */
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static void is2_data_get(struct vcap_data *data, int ix)
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static void is2_data_get(struct ocelot *ocelot, struct vcap_data *data, int ix)
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{
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u32 i, col, offset, count, cnt, base, width = vcap_is2.tg_width;
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 i, col, offset, count, cnt, base;
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u32 width = vcap_is2->tg_width;
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count = (data->tg_sw == VCAP_TG_HALF ? 2 : 4);
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col = (ix % 2);
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cnt = (vcap_is2.sw_count / count);
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base = (vcap_is2.sw_count - col * cnt - cnt);
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cnt = (vcap_is2->sw_count / count);
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base = (vcap_is2->sw_count - col * cnt - cnt);
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data->tg_value = 0;
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data->tg_mask = 0;
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for (i = 0; i < cnt; i++) {
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@ -206,13 +177,13 @@ static void is2_data_get(struct vcap_data *data, int ix)
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/* Calculate key/action/counter offsets */
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col = (count - col - 1);
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data->key_offset = (base * vcap_is2.entry_width) / vcap_is2.sw_count;
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data->counter_offset = (cnt * col * vcap_is2.counter_width);
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data->key_offset = (base * vcap_is2->entry_width) / vcap_is2->sw_count;
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data->counter_offset = (cnt * col * vcap_is2->counter_width);
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i = data->type;
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width = vcap_is2.action_table[i].width;
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cnt = vcap_is2.action_table[i].count;
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width = vcap_is2->action_table[i].width;
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cnt = vcap_is2->action_table[i].count;
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data->action_offset =
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(((cnt * col * width) / count) + vcap_is2.action_type_width);
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(((cnt * col * width) / count) + vcap_is2->action_type_width);
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}
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static void vcap_data_set(u32 *data, u32 offset, u32 len, u32 value)
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@ -354,6 +325,7 @@ static void is2_action_set(struct ocelot *ocelot, struct vcap_data *data,
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static void is2_entry_set(struct ocelot *ocelot, int ix,
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struct ocelot_ace_rule *ace)
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{
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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u32 val, msk, type, type_mask = 0xf, i, count;
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struct ocelot_ace_vlan *tag = &ace->vlan;
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struct ocelot_vcap_u64 payload;
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@ -369,7 +341,7 @@ static void is2_entry_set(struct ocelot *ocelot, int ix,
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vcap_cache2action(ocelot, &data);
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data.tg_sw = VCAP_TG_HALF;
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is2_data_get(&data, ix);
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is2_data_get(ocelot, &data, ix);
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data.tg = (data.tg & ~data.tg_mask);
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if (ace->prio != 0)
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data.tg |= data.tg_value;
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@ -627,7 +599,7 @@ static void is2_entry_set(struct ocelot *ocelot, int ix,
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default:
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type = 0;
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type_mask = 0;
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count = (vcap_is2.entry_width / 2);
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count = vcap_is2->entry_width / 2;
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/* Iterate over the non-common part of the key and
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* clear entry data
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*/
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@ -641,7 +613,7 @@ static void is2_entry_set(struct ocelot *ocelot, int ix,
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vcap_key_set(ocelot, &data, VCAP_IS2_TYPE, type, type_mask);
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is2_action_set(ocelot, &data, ace->action);
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vcap_data_set(data.counter, data.counter_offset,
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vcap_is2.counter_width, ace->stats.pkts);
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vcap_is2->counter_width, ace->stats.pkts);
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/* Write row */
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vcap_entry2cache(ocelot, &data);
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@ -652,6 +624,7 @@ static void is2_entry_set(struct ocelot *ocelot, int ix,
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static void is2_entry_get(struct ocelot *ocelot, struct ocelot_ace_rule *rule,
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int ix)
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{
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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struct vcap_data data;
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int row = (ix / 2);
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u32 cnt;
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@ -659,9 +632,9 @@ static void is2_entry_get(struct ocelot *ocelot, struct ocelot_ace_rule *rule,
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vcap_row_cmd(ocelot, row, VCAP_CMD_READ, VCAP_SEL_COUNTER);
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vcap_cache2action(ocelot, &data);
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data.tg_sw = VCAP_TG_HALF;
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is2_data_get(&data, ix);
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is2_data_get(ocelot, &data, ix);
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cnt = vcap_data_get(data.counter, data.counter_offset,
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vcap_is2.counter_width);
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vcap_is2->counter_width);
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rule->stats.pkts = cnt;
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}
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@ -805,16 +778,17 @@ int ocelot_ace_rule_stats_update(struct ocelot *ocelot,
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int ocelot_ace_init(struct ocelot *ocelot)
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{
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const struct vcap_props *vcap_is2 = &ocelot->vcap[VCAP_IS2];
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struct vcap_data data;
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memset(&data, 0, sizeof(data));
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vcap_entry2cache(ocelot, &data);
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ocelot_write(ocelot, vcap_is2.entry_count, S2_CORE_MV_CFG);
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ocelot_write(ocelot, vcap_is2->entry_count, S2_CORE_MV_CFG);
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vcap_cmd(ocelot, 0, VCAP_CMD_INITIALIZE, VCAP_SEL_ENTRY);
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vcap_action2cache(ocelot, &data);
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ocelot_write(ocelot, vcap_is2.action_count, S2_CORE_MV_CFG);
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ocelot_write(ocelot, vcap_is2->action_count, S2_CORE_MV_CFG);
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vcap_cmd(ocelot, 0, VCAP_CMD_INITIALIZE,
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VCAP_SEL_ACTION | VCAP_SEL_COUNTER);
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@ -18,6 +18,10 @@
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#include "ocelot.h"
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#define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0))
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#define VSC7514_VCAP_IS2_CNT 64
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#define VSC7514_VCAP_IS2_ENTRY_WIDTH 376
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#define VSC7514_VCAP_IS2_ACTION_WIDTH 99
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#define VSC7514_VCAP_PORT_CNT 11
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static int ocelot_parse_ifh(u32 *_ifh, struct frame_info *info)
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{
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@ -337,6 +341,31 @@ static const struct vcap_field vsc7514_vcap_is2_actions[] = {
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[VCAP_IS2_ACT_HIT_CNT] = { 49, 32},
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};
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static const struct vcap_props vsc7514_vcap_props[] = {
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[VCAP_IS2] = {
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.tg_width = 2,
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.sw_count = 4,
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.entry_count = VSC7514_VCAP_IS2_CNT,
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.entry_width = VSC7514_VCAP_IS2_ENTRY_WIDTH,
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.action_count = VSC7514_VCAP_IS2_CNT +
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VSC7514_VCAP_PORT_CNT + 2,
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.action_width = 99,
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.action_type_width = 1,
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.action_table = {
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[IS2_ACTION_TYPE_NORMAL] = {
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.width = 49,
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.count = 2
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},
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[IS2_ACTION_TYPE_SMAC_SIP] = {
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.width = 6,
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.count = 4
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},
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},
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.counter_words = 4,
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.counter_width = 32,
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},
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};
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static int mscc_ocelot_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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@ -439,6 +468,7 @@ static int mscc_ocelot_probe(struct platform_device *pdev)
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ocelot->vcap_is2_keys = vsc7514_vcap_is2_keys;
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ocelot->vcap_is2_actions = vsc7514_vcap_is2_actions;
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ocelot->vcap = vsc7514_vcap_props;
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ocelot_init(ocelot);
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ocelot_set_cpu_port(ocelot, ocelot->num_phys_ports,
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@ -463,6 +463,7 @@ struct ocelot {
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const struct vcap_field *vcap_is2_keys;
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const struct vcap_field *vcap_is2_actions;
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const struct vcap_props *vcap;
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/* Workqueue to check statistics for overflow with its lock */
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struct mutex stats_lock;
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@ -11,6 +11,30 @@
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* =================================================================
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*/
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enum {
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/* VCAP_IS1, */
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VCAP_IS2,
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/* VCAP_ES0, */
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};
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struct vcap_props {
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u16 tg_width; /* Type-group width (in bits) */
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u16 sw_count; /* Sub word count */
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u16 entry_count; /* Entry count */
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u16 entry_words; /* Number of entry words */
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u16 entry_width; /* Entry width (in bits) */
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u16 action_count; /* Action count */
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u16 action_words; /* Number of action words */
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u16 action_width; /* Action width (in bits) */
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u16 action_type_width; /* Action type width (in bits) */
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struct {
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u16 width; /* Action type width (in bits) */
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u16 count; /* Action type sub word count */
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} action_table[2];
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u16 counter_words; /* Number of counter words */
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u16 counter_width; /* Counter width (in bits) */
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};
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/* VCAP Type-Group values */
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#define VCAP_TG_NONE 0 /* Entry is invalid */
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#define VCAP_TG_FULL 1 /* Full entry */
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@ -22,11 +46,6 @@
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* =================================================================
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*/
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#define VCAP_IS2_CNT 64
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#define VCAP_IS2_ENTRY_WIDTH 376
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#define VCAP_IS2_ACTION_WIDTH 99
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#define VCAP_PORT_CNT 11
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/* IS2 half key types */
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#define IS2_TYPE_ETYPE 0
|
||||
#define IS2_TYPE_LLC 1
|
||||
|
|
@ -42,9 +61,11 @@
|
|||
/* IS2 half key type mask for matching any IP */
|
||||
#define IS2_TYPE_MASK_IP_ANY 0xe
|
||||
|
||||
/* IS2 action types */
|
||||
#define IS2_ACTION_TYPE_NORMAL 0
|
||||
#define IS2_ACTION_TYPE_SMAC_SIP 1
|
||||
enum {
|
||||
IS2_ACTION_TYPE_NORMAL,
|
||||
IS2_ACTION_TYPE_SMAC_SIP,
|
||||
IS2_ACTION_TYPE_MAX,
|
||||
};
|
||||
|
||||
/* IS2 MASK_MODE values */
|
||||
#define IS2_ACT_MASK_MODE_NONE 0
|
||||
|
|
|
|||
Loading…
Reference in a new issue