mtd: mxc_nand: use a flag to detect if the mx21 quirk is necessary
This gets rid of several instances of cpu_is_mx21() in the driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -173,6 +173,13 @@ struct mxc_nand_host {
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uint16_t (*get_dev_status)(struct mxc_nand_host *);
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int (*check_int)(struct mxc_nand_host *);
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void (*irq_control)(struct mxc_nand_host *, int);
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/*
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* On i.MX21 the CONFIG2:INT bit cannot be read if interrupts are masked
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* (CONFIG1:INT_MSK is set). To handle this the driver uses
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* enable_irq/disable_irq_nosync instead of CONFIG1:INT_MSK
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*/
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int irqpending_quirk;
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};
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/* OOB placement block for use with hardware ecc generation */
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@ -244,20 +251,6 @@ static struct nand_ecclayout nandv2_hw_eccoob_4k = {
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static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL };
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static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)
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{
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struct mxc_nand_host *host = dev_id;
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if (!host->check_int(host))
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return IRQ_NONE;
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host->irq_control(host, 0);
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complete(&host->op_completion);
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return IRQ_HANDLED;
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}
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static int check_int_v3(struct mxc_nand_host *host)
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{
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uint32_t tmp;
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@ -280,26 +273,12 @@ static int check_int_v1_v2(struct mxc_nand_host *host)
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if (!(tmp & NFC_V1_V2_CONFIG2_INT))
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return 0;
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if (!cpu_is_mx21())
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if (!host->irqpending_quirk)
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writew(tmp & ~NFC_V1_V2_CONFIG2_INT, NFC_V1_V2_CONFIG2);
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return 1;
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}
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/*
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* It has been observed that the i.MX21 cannot read the CONFIG2:INT bit
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* if interrupts are masked (CONFIG1:INT_MSK is set). To handle this, the
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* driver can enable/disable the irq line rather than simply masking the
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* interrupts.
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*/
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static void irq_control_mx21(struct mxc_nand_host *host, int activate)
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{
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if (activate)
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enable_irq(host->irq);
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else
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disable_irq_nosync(host->irq);
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}
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static void irq_control_v1_v2(struct mxc_nand_host *host, int activate)
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{
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uint16_t tmp;
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@ -328,6 +307,32 @@ static void irq_control_v3(struct mxc_nand_host *host, int activate)
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writel(tmp, NFC_V3_CONFIG2);
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}
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static void irq_control(struct mxc_nand_host *host, int activate)
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{
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if (host->irqpending_quirk) {
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if (activate)
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enable_irq(host->irq);
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else
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disable_irq_nosync(host->irq);
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} else {
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host->irq_control(host, activate);
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}
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}
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static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)
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{
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struct mxc_nand_host *host = dev_id;
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if (!host->check_int(host))
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return IRQ_NONE;
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irq_control(host, 0);
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complete(&host->op_completion);
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return IRQ_HANDLED;
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}
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/* This function polls the NANDFC to wait for the basic operation to
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* complete by checking the INT bit of config2 register.
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*/
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@ -338,7 +343,7 @@ static void wait_op_done(struct mxc_nand_host *host, int useirq)
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if (useirq) {
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if (!host->check_int(host)) {
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INIT_COMPLETION(host->op_completion);
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host->irq_control(host, 1);
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irq_control(host, 1);
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wait_for_completion(&host->op_completion);
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}
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} else {
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@ -374,7 +379,7 @@ static void send_cmd_v1_v2(struct mxc_nand_host *host, uint16_t cmd, int useirq)
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writew(cmd, NFC_V1_V2_FLASH_CMD);
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writew(NFC_CMD, NFC_V1_V2_CONFIG2);
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if (cpu_is_mx21() && (cmd == NAND_CMD_RESET)) {
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if (host->irqpending_quirk && (cmd == NAND_CMD_RESET)) {
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int max_retries = 100;
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/* Reset completion is indicated by NFC_CONFIG2 */
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/* being set to 0 */
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@ -812,7 +817,7 @@ static void preset_v1_v2(struct mtd_info *mtd)
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if (nfc_is_v21())
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config1 |= NFC_V2_CONFIG1_FP_INT;
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if (!cpu_is_mx21())
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if (!host->irqpending_quirk)
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config1 |= NFC_V1_V2_CONFIG1_INT_MSK;
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if (nfc_is_v21() && mtd->writesize) {
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@ -1103,10 +1108,9 @@ static int __init mxcnd_probe(struct platform_device *pdev)
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host->send_read_id = send_read_id_v1_v2;
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host->get_dev_status = get_dev_status_v1_v2;
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host->check_int = check_int_v1_v2;
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if (cpu_is_mx21())
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host->irq_control = irq_control_mx21;
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else
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host->irq_control = irq_control_v1_v2;
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if (cpu_is_mx21())
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host->irqpending_quirk = 1;
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}
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if (nfc_is_v21()) {
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@ -1182,28 +1186,24 @@ static int __init mxcnd_probe(struct platform_device *pdev)
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host->irq = platform_get_irq(pdev, 0);
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/*
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* mask the interrupt. For i.MX21 explicitely call
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* irq_control_v1_v2 to use the mask bit. We can't call
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* disable_irq_nosync() for an interrupt we do not own yet.
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* Use host->irq_control here instead of irq_control because we must not
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* disable_irq_nosync without having requested the irq
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*/
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if (cpu_is_mx21())
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irq_control_v1_v2(host, 0);
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else
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host->irq_control(host, 0);
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err = request_irq(host->irq, mxc_nfc_irq, IRQF_DISABLED, DRIVER_NAME, host);
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if (err)
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goto eirq;
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host->irq_control(host, 0);
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/*
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* Now that the interrupt is disabled make sure the interrupt
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* mask bit is cleared on i.MX21. Otherwise we can't read
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* the interrupt status bit on this machine.
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* Now that we "own" the interrupt make sure the interrupt mask bit is
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* cleared on i.MX21. Otherwise we can't read the interrupt status bit
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* on this machine.
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*/
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if (cpu_is_mx21())
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irq_control_v1_v2(host, 1);
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if (host->irqpending_quirk) {
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disable_irq_nosync(host->irq);
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host->irq_control(host, 1);
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}
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/* first scan to find the device and get the page size */
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if (nand_scan_ident(mtd, nfc_is_v21() ? 4 : 1, NULL)) {
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