iwlegacy: merge iwl-4965-ucode.c into 4965.c
Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>hifive-unleashed-5.1
Stanislaw Gruszka
parent
56e7a8cca0
commit
862d32e6db
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@ -47,6 +47,131 @@
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#include "iwl-4965.h"
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#include "iwl-4965-debugfs.h"
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#define IL_AC_UNSET -1
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/**
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* il_verify_inst_sparse - verify runtime uCode image in card vs. host,
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* using sample data 100 bytes apart. If these sample points are good,
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* it's a pretty good bet that everything between them is good, too.
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*/
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static int
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il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
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{
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u32 val;
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int ret = 0;
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u32 errcnt = 0;
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u32 i;
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D_INFO("ucode inst image size is %u\n", len);
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for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
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/* read data comes through single port, auto-incr addr */
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IL_DL_IO is set */
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il_wr(il, HBUS_TARG_MEM_RADDR,
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i + IL4965_RTC_INST_LOWER_BOUND);
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val = _il_rd(il, HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image)) {
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ret = -EIO;
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errcnt++;
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if (errcnt >= 3)
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break;
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}
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}
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return ret;
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}
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/**
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* il4965_verify_inst_full - verify runtime uCode image in card vs. host,
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* looking at all data.
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*/
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static int il4965_verify_inst_full(struct il_priv *il, __le32 *image,
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u32 len)
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{
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u32 val;
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u32 save_len = len;
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int ret = 0;
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u32 errcnt;
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D_INFO("ucode inst image size is %u\n", len);
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il_wr(il, HBUS_TARG_MEM_RADDR,
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IL4965_RTC_INST_LOWER_BOUND);
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errcnt = 0;
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for (; len > 0; len -= sizeof(u32), image++) {
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/* read data comes through single port, auto-incr addr */
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IL_DL_IO is set */
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val = _il_rd(il, HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image)) {
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IL_ERR("uCode INST section is invalid at "
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"offset 0x%x, is 0x%x, s/b 0x%x\n",
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save_len - len, val, le32_to_cpu(*image));
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ret = -EIO;
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errcnt++;
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if (errcnt >= 20)
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break;
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}
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}
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if (!errcnt)
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D_INFO(
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"ucode image in INSTRUCTION memory is good\n");
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return ret;
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}
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/**
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* il4965_verify_ucode - determine which instruction image is in SRAM,
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* and verify its contents
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*/
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int il4965_verify_ucode(struct il_priv *il)
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{
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__le32 *image;
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u32 len;
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int ret;
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/* Try bootstrap */
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image = (__le32 *)il->ucode_boot.v_addr;
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len = il->ucode_boot.len;
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ret = il4965_verify_inst_sparse(il, image, len);
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if (!ret) {
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D_INFO("Bootstrap uCode is good in inst SRAM\n");
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return 0;
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}
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/* Try initialize */
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image = (__le32 *)il->ucode_init.v_addr;
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len = il->ucode_init.len;
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ret = il4965_verify_inst_sparse(il, image, len);
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if (!ret) {
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D_INFO("Initialize uCode is good in inst SRAM\n");
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return 0;
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}
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/* Try runtime/protocol */
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image = (__le32 *)il->ucode_code.v_addr;
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len = il->ucode_code.len;
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ret = il4965_verify_inst_sparse(il, image, len);
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if (!ret) {
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D_INFO("Runtime uCode is good in inst SRAM\n");
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return 0;
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}
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IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
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/* Since nothing seems to match, show first several data entries in
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* instruction SRAM, so maybe visual inspection will give a clue.
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* Selection of bootstrap image (vs. other images) is arbitrary. */
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image = (__le32 *)il->ucode_boot.v_addr;
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len = il->ucode_boot.len;
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ret = il4965_verify_inst_full(il, image, len);
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return ret;
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}
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/******************************************************************************
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*
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* EEPROM related functions
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@ -9,7 +9,7 @@ iwl-legacy-objs += $(iwl-legacy-m)
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# 4965
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obj-$(CONFIG_IWL4965) += iwl4965.o
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iwl4965-objs := 4965.o 4965-mac.o iwl-4965-rs.o
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iwl4965-objs += iwl-4965-ucode.o iwl-4965-tx.o
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iwl4965-objs += iwl-4965-tx.o
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iwl4965-objs += iwl-4965-lib.o iwl-4965-rx.o iwl-4965-calib.o
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iwl4965-objs += iwl-4965-sta.o
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iwl4965-$(CONFIG_IWLEGACY_DEBUGFS) += iwl-4965-debugfs.o
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@ -1,166 +0,0 @@
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/******************************************************************************
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include "iwl-dev.h"
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#include "iwl-core.h"
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#include "iwl-io.h"
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#include "iwl-helpers.h"
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#include "iwl-4965-hw.h"
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#include "iwl-4965.h"
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#include "iwl-4965-calib.h"
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#define IL_AC_UNSET -1
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/**
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* il_verify_inst_sparse - verify runtime uCode image in card vs. host,
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* using sample data 100 bytes apart. If these sample points are good,
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* it's a pretty good bet that everything between them is good, too.
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*/
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static int
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il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
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{
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u32 val;
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int ret = 0;
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u32 errcnt = 0;
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u32 i;
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D_INFO("ucode inst image size is %u\n", len);
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for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
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/* read data comes through single port, auto-incr addr */
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IL_DL_IO is set */
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il_wr(il, HBUS_TARG_MEM_RADDR,
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i + IL4965_RTC_INST_LOWER_BOUND);
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val = _il_rd(il, HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image)) {
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ret = -EIO;
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errcnt++;
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if (errcnt >= 3)
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break;
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}
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}
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return ret;
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}
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/**
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* il4965_verify_inst_full - verify runtime uCode image in card vs. host,
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* looking at all data.
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*/
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static int il4965_verify_inst_full(struct il_priv *il, __le32 *image,
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u32 len)
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{
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u32 val;
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u32 save_len = len;
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int ret = 0;
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u32 errcnt;
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D_INFO("ucode inst image size is %u\n", len);
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il_wr(il, HBUS_TARG_MEM_RADDR,
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IL4965_RTC_INST_LOWER_BOUND);
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errcnt = 0;
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for (; len > 0; len -= sizeof(u32), image++) {
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/* read data comes through single port, auto-incr addr */
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IL_DL_IO is set */
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val = _il_rd(il, HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image)) {
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IL_ERR("uCode INST section is invalid at "
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"offset 0x%x, is 0x%x, s/b 0x%x\n",
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save_len - len, val, le32_to_cpu(*image));
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ret = -EIO;
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errcnt++;
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if (errcnt >= 20)
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break;
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}
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}
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if (!errcnt)
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D_INFO(
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"ucode image in INSTRUCTION memory is good\n");
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return ret;
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}
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/**
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* il4965_verify_ucode - determine which instruction image is in SRAM,
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* and verify its contents
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*/
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int il4965_verify_ucode(struct il_priv *il)
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{
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__le32 *image;
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u32 len;
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int ret;
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/* Try bootstrap */
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image = (__le32 *)il->ucode_boot.v_addr;
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len = il->ucode_boot.len;
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ret = il4965_verify_inst_sparse(il, image, len);
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if (!ret) {
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D_INFO("Bootstrap uCode is good in inst SRAM\n");
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return 0;
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}
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/* Try initialize */
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image = (__le32 *)il->ucode_init.v_addr;
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len = il->ucode_init.len;
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ret = il4965_verify_inst_sparse(il, image, len);
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if (!ret) {
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D_INFO("Initialize uCode is good in inst SRAM\n");
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return 0;
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}
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/* Try runtime/protocol */
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image = (__le32 *)il->ucode_code.v_addr;
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len = il->ucode_code.len;
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ret = il4965_verify_inst_sparse(il, image, len);
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if (!ret) {
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D_INFO("Runtime uCode is good in inst SRAM\n");
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return 0;
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}
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IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
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/* Since nothing seems to match, show first several data entries in
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* instruction SRAM, so maybe visual inspection will give a clue.
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* Selection of bootstrap image (vs. other images) is arbitrary. */
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image = (__le32 *)il->ucode_boot.v_addr;
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len = il->ucode_boot.len;
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ret = il4965_verify_inst_full(il, image, len);
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return ret;
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}
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