drm/amd/display: Move power control from link encoder to hwsequencer
A recent commit moved the backlight control code along with the register defines, but did not move the power control code. This along with remnant fields in the dce110_link_enc_registers struct made it so that the code still compiled, but any attempts to access the LVTMA_PWRSEQ_STATE register led to reading from an address of 0. This patch corrects that. Also, rename blacklight_control to edp_backlight_control (Typo fix). Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
b87d78d6aa
commit
8740196935
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@ -78,14 +78,15 @@ static void destruct(struct dc_link *link)
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dc_sink_release(link->remote_sinks[i]);
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}
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static struct gpio *get_hpd_gpio(const struct dc_link *link)
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struct gpio *get_hpd_gpio(struct dc_bios *dcb,
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struct graphics_object_id link_id,
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struct gpio_service *gpio_service)
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{
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enum bp_result bp_result;
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struct dc_bios *dcb = link->ctx->dc_bios;
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struct graphics_object_hpd_info hpd_info;
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struct gpio_pin_info pin_info;
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if (dcb->funcs->get_hpd_info(dcb, link->link_id, &hpd_info) != BP_RESULT_OK)
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if (dcb->funcs->get_hpd_info(dcb, link_id, &hpd_info) != BP_RESULT_OK)
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return NULL;
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bp_result = dcb->funcs->get_gpio_pin_info(dcb,
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@ -97,7 +98,7 @@ static struct gpio *get_hpd_gpio(const struct dc_link *link)
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}
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return dal_gpio_service_create_irq(
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link->ctx->gpio_service,
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gpio_service,
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pin_info.offset,
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pin_info.mask);
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}
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@ -153,7 +154,7 @@ static bool program_hpd_filter(
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}
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/* Obtain HPD handle */
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hpd = get_hpd_gpio(link);
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hpd = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service);
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if (!hpd)
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return result;
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@ -186,7 +187,7 @@ static bool detect_sink(struct dc_link *link, enum dc_connection_type *type)
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struct gpio *hpd_pin;
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/* todo: may need to lock gpio access */
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hpd_pin = get_hpd_gpio(link);
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hpd_pin = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service);
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if (hpd_pin == NULL)
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goto hpd_gpio_failure;
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@ -795,7 +796,7 @@ static enum hpd_source_id get_hpd_line(
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struct gpio *hpd;
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enum hpd_source_id hpd_id = HPD_SOURCEID_UNKNOWN;
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hpd = get_hpd_gpio(link);
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hpd = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service);
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if (hpd) {
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switch (dal_irq_get_source(hpd)) {
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@ -965,7 +966,7 @@ static bool construct(
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goto create_fail;
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}
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hpd_gpio = get_hpd_gpio(link);
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hpd_gpio = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service);
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if (hpd_gpio != NULL)
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link->irq_source_hpd = dal_irq_get_source(hpd_gpio);
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@ -89,12 +89,12 @@ void dp_enable_link_phy(
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if (dc_is_dp_sst_signal(signal)) {
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if (signal == SIGNAL_TYPE_EDP) {
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link_enc->funcs->power_control(link_enc, true);
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link->dc->hwss.edp_power_control(link->link_enc, true);
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link_enc->funcs->enable_dp_output(
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link_enc,
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link_settings,
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clock_source);
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link->dc->hwss.backlight_control(link, true);
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link->dc->hwss.edp_backlight_control(link, true);
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} else
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link_enc->funcs->enable_dp_output(
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link_enc,
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@ -138,10 +138,10 @@ void dp_disable_link_phy(struct dc_link *link, enum signal_type signal)
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dp_receiver_power_ctrl(link, false);
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if (signal == SIGNAL_TYPE_EDP) {
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link->dc->hwss.backlight_control(link, false);
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link->dc->hwss.edp_backlight_control(link, false);
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edp_receiver_ready_T9(link);
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link->link_enc->funcs->disable_output(link->link_enc, signal, link);
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link->link_enc->funcs->power_control(link->link_enc, false);
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link->dc->hwss.edp_power_control(link->link_enc, false);
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} else
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link->link_enc->funcs->disable_output(link->link_enc, signal, link);
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@ -391,23 +391,27 @@ struct dce_hwseq_registers {
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HWS_SF(BLND_, V_UPDATE_LOCK, BLND_DCP_GRPH_SURF_V_UPDATE_LOCK, mask_sh),\
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HWS_SF(BLND_, CONTROL, BLND_MODE, mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh),\
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HWSEQ_PIXEL_RATE_MASK_SH_LIST(mask_sh, CRTC0_)
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#define HWSEQ_DCE10_MASK_SH_LIST(mask_sh)\
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HWSEQ_DCEF_MASK_SH_LIST(mask_sh, DCFE_),\
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HWSEQ_BLND_MASK_SH_LIST(mask_sh, BLND_),\
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HWSEQ_PIXEL_RATE_MASK_SH_LIST(mask_sh, CRTC0_), \
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh)
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh)
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#define HWSEQ_DCE11_MASK_SH_LIST(mask_sh)\
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HWSEQ_DCE10_MASK_SH_LIST(mask_sh),\
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SF(DCFEV_CLOCK_CONTROL, DCFEV_CLOCK_ENABLE, mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh),\
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HWSEQ_PIXEL_RATE_MASK_SH_LIST(mask_sh, CRTC0_)
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#define HWSEQ_DCE112_MASK_SH_LIST(mask_sh)\
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HWSEQ_DCE10_MASK_SH_LIST(mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh),\
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HWSEQ_PHYPLL_MASK_SH_LIST(mask_sh, CRTC0_)
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#define HWSEQ_GFX9_DCHUB_MASK_SH_LIST(mask_sh)\
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@ -416,7 +420,8 @@ struct dce_hwseq_registers {
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SF(DCHUB_AGP_BASE, AGP_BASE, mask_sh),\
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SF(DCHUB_AGP_BOT, AGP_BOT, mask_sh),\
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SF(DCHUB_AGP_TOP, AGP_TOP, mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh)
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh)
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#define HWSEQ_DCE12_MASK_SH_LIST(mask_sh)\
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HWSEQ_DCEF_MASK_SH_LIST(mask_sh, DCFE0_DCFE_),\
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@ -424,7 +429,8 @@ struct dce_hwseq_registers {
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HWSEQ_PIXEL_RATE_MASK_SH_LIST(mask_sh, CRTC0_),\
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HWSEQ_PHYPLL_MASK_SH_LIST(mask_sh, CRTC0_),\
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HWSEQ_GFX9_DCHUB_MASK_SH_LIST(mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh)
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh)
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#define HWSEQ_DCN_MASK_SH_LIST(mask_sh)\
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HWSEQ_PIXEL_RATE_MASK_SH_LIST(mask_sh, OTG0_),\
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@ -489,7 +495,8 @@ struct dce_hwseq_registers {
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HWS_SF(, DOMAIN6_PG_STATUS, DOMAIN6_PGFSM_PWR_STATUS, mask_sh), \
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HWS_SF(, DOMAIN7_PG_STATUS, DOMAIN7_PGFSM_PWR_STATUS, mask_sh), \
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HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh)
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \
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HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh)
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#define HWSEQ_REG_FIELD_LIST(type) \
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type DCFE_CLOCK_ENABLE; \
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@ -520,7 +527,8 @@ struct dce_hwseq_registers {
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type LOGICAL_ADDR; \
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type ENABLE_L1_TLB;\
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type SYSTEM_ACCESS_MODE;\
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type LVTMA_BLON;
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type LVTMA_BLON;\
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type LVTMA_PWRSEQ_TARGET_STATE_R;
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#define HWSEQ_DCN_REG_FIELD_LIST(type) \
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type VUPDATE_NO_LOCK_EVENT_CLEAR; \
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@ -82,13 +82,6 @@
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#define DCE110_DIG_FE_SOURCE_SELECT_DIGF 0x20
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#define DCE110_DIG_FE_SOURCE_SELECT_DIGG 0x40
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/* all values are in milliseconds */
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/* For eDP, after power-up/power/down,
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* 300/500 msec max. delay from LCDVCC to black video generation */
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#define PANEL_POWER_UP_TIMEOUT 300
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#define PANEL_POWER_DOWN_TIMEOUT 500
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#define HPD_CHECK_INTERVAL 10
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/* Minimum pixel clock, in KHz. For TMDS signal is 25.00 MHz */
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#define TMDS_MIN_PIXEL_CLOCK 25000
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/* Maximum pixel clock, in KHz. For TMDS signal is 165.00 MHz */
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@ -122,7 +115,6 @@ static const struct link_encoder_funcs dce110_lnk_enc_funcs = {
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.psr_program_dp_dphy_fast_training =
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dce110_psr_program_dp_dphy_fast_training,
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.psr_program_secondary_packet = dce110_psr_program_secondary_packet,
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.power_control = dce110_link_encoder_edp_power_control,
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.connect_dig_be_to_fe = dce110_link_encoder_connect_dig_be_to_fe,
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.enable_hpd = dce110_link_encoder_enable_hpd,
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.disable_hpd = dce110_link_encoder_disable_hpd,
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@ -492,165 +484,6 @@ static void configure_encoder(
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REG_UPDATE(DP_DPHY_SCRAM_CNTL, DPHY_SCRAMBLER_ADVANCE, 1);
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}
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static bool is_panel_powered_on(struct dce110_link_encoder *enc110)
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{
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bool ret;
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uint32_t value;
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REG_GET(LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, &value);
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ret = value;
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return ret == 1;
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}
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/* TODO duplicate of dc_link.c version */
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static struct gpio *get_hpd_gpio(const struct link_encoder *enc)
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{
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enum bp_result bp_result;
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struct dc_bios *dcb = enc->ctx->dc_bios;
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struct graphics_object_hpd_info hpd_info;
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struct gpio_pin_info pin_info;
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if (dcb->funcs->get_hpd_info(dcb, enc->connector, &hpd_info) != BP_RESULT_OK)
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return NULL;
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bp_result = dcb->funcs->get_gpio_pin_info(dcb,
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hpd_info.hpd_int_gpio_uid, &pin_info);
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if (bp_result != BP_RESULT_OK) {
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ASSERT(bp_result == BP_RESULT_NORECORD);
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return NULL;
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}
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return dal_gpio_service_create_irq(
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enc->ctx->gpio_service,
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pin_info.offset,
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pin_info.mask);
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}
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/*
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* @brief
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* eDP only.
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*/
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static void link_encoder_edp_wait_for_hpd_ready(
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struct dce110_link_encoder *enc110,
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bool power_up)
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{
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struct dc_context *ctx = enc110->base.ctx;
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struct graphics_object_id connector = enc110->base.connector;
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struct gpio *hpd;
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bool edp_hpd_high = false;
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uint32_t time_elapsed = 0;
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uint32_t timeout = power_up ?
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PANEL_POWER_UP_TIMEOUT : PANEL_POWER_DOWN_TIMEOUT;
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if (dal_graphics_object_id_get_connector_id(connector) !=
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CONNECTOR_ID_EDP) {
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BREAK_TO_DEBUGGER();
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return;
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}
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if (!power_up)
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/* from KV, we will not HPD low after turning off VCC -
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* instead, we will check the SW timer in power_up(). */
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return;
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/* when we power on/off the eDP panel,
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* we need to wait until SENSE bit is high/low */
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/* obtain HPD */
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/* TODO what to do with this? */
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hpd = get_hpd_gpio(&enc110->base);
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if (!hpd) {
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BREAK_TO_DEBUGGER();
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return;
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}
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dal_gpio_open(hpd, GPIO_MODE_INTERRUPT);
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/* wait until timeout or panel detected */
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do {
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uint32_t detected = 0;
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dal_gpio_get_value(hpd, &detected);
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if (!(detected ^ power_up)) {
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edp_hpd_high = true;
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break;
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}
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msleep(HPD_CHECK_INTERVAL);
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time_elapsed += HPD_CHECK_INTERVAL;
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} while (time_elapsed < timeout);
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dal_gpio_close(hpd);
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dal_gpio_destroy_irq(&hpd);
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if (false == edp_hpd_high) {
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dm_logger_write(ctx->logger, LOG_ERROR,
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"%s: wait timed out!\n", __func__);
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}
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}
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/*
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* @brief
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* eDP only. Control the power of the eDP panel.
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*/
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void dce110_link_encoder_edp_power_control(
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struct link_encoder *enc,
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bool power_up)
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{
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struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc);
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struct dc_context *ctx = enc110->base.ctx;
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struct bp_transmitter_control cntl = { 0 };
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enum bp_result bp_result;
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if (dal_graphics_object_id_get_connector_id(enc110->base.connector) !=
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CONNECTOR_ID_EDP) {
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BREAK_TO_DEBUGGER();
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return;
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}
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if ((power_up && !is_panel_powered_on(enc110)) ||
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(!power_up && is_panel_powered_on(enc110))) {
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/* Send VBIOS command to prompt eDP panel power */
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dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
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"%s: Panel Power action: %s\n",
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__func__, (power_up ? "On":"Off"));
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cntl.action = power_up ?
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TRANSMITTER_CONTROL_POWER_ON :
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TRANSMITTER_CONTROL_POWER_OFF;
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cntl.transmitter = enc110->base.transmitter;
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cntl.connector_obj_id = enc110->base.connector;
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cntl.coherent = false;
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cntl.lanes_number = LANE_COUNT_FOUR;
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cntl.hpd_sel = enc110->base.hpd_source;
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bp_result = link_transmitter_control(enc110, &cntl);
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if (BP_RESULT_OK != bp_result) {
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dm_logger_write(ctx->logger, LOG_ERROR,
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"%s: Panel Power bp_result: %d\n",
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__func__, bp_result);
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}
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} else {
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dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
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"%s: Skipping Panel Power action: %s\n",
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__func__, (power_up ? "On":"Off"));
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}
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link_encoder_edp_wait_for_hpd_ready(enc110, true);
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}
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static void aux_initialize(
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struct dce110_link_encoder *enc110)
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{
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@ -1018,7 +851,7 @@ void dce110_link_encoder_hw_init(
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ASSERT(result == BP_RESULT_OK);
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} else if (enc110->base.connector.id == CONNECTOR_ID_EDP) {
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enc->funcs->power_control(&enc110->base, true);
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ctx->dc->hwss.edp_power_control(enc, true);
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}
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aux_initialize(enc110);
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@ -1218,7 +1051,7 @@ void dce110_link_encoder_disable_output(
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return;
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}
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if (enc110->base.connector.id == CONNECTOR_ID_EDP)
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ctx->dc->hwss.backlight_control(link, false);
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ctx->dc->hwss.edp_backlight_control(link, false);
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/* Power-down RX and disable GPU PHY should be paired.
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* Disabling PHY without powering down RX may cause
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* symbol lock loss, on which we will get DP Sink interrupt. */
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@ -114,10 +114,6 @@ struct dce110_link_enc_hpd_registers {
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};
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struct dce110_link_enc_registers {
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/* Backlight registers */
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uint32_t LVTMA_PWRSEQ_CNTL;
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uint32_t LVTMA_PWRSEQ_STATE;
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/* DMCU registers */
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uint32_t MASTER_COMM_DATA_REG1;
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uint32_t MASTER_COMM_DATA_REG2;
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@ -250,10 +246,6 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
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struct link_encoder *enc,
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const struct link_mst_stream_allocation_table *table);
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void dce110_link_encoder_edp_power_control(
|
||||
struct link_encoder *enc,
|
||||
bool power_up);
|
||||
|
||||
void dce110_link_encoder_connect_dig_be_to_fe(
|
||||
struct link_encoder *enc,
|
||||
enum engine_id engine,
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include "dce110_hw_sequencer.h"
|
||||
#include "dce110_timing_generator.h"
|
||||
#include "dce/dce_hwseq.h"
|
||||
#include "gpio_service_interface.h"
|
||||
|
||||
#ifdef ENABLE_FBC
|
||||
#include "dce110_compressor.h"
|
||||
|
@ -45,10 +46,10 @@
|
|||
#include "transform.h"
|
||||
#include "stream_encoder.h"
|
||||
#include "link_encoder.h"
|
||||
#include "link_hwss.h"
|
||||
#include "clock_source.h"
|
||||
#include "abm.h"
|
||||
#include "audio.h"
|
||||
#include "dce/dce_hwseq.h"
|
||||
#include "reg_helper.h"
|
||||
|
||||
/* include DCE11 register header files */
|
||||
|
@ -56,6 +57,15 @@
|
|||
#include "dce/dce_11_0_sh_mask.h"
|
||||
#include "custom_float.h"
|
||||
|
||||
/*
|
||||
* All values are in milliseconds;
|
||||
* For eDP, after power-up/power/down,
|
||||
* 300/500 msec max. delay from LCDVCC to black video generation
|
||||
*/
|
||||
#define PANEL_POWER_UP_TIMEOUT 300
|
||||
#define PANEL_POWER_DOWN_TIMEOUT 500
|
||||
#define HPD_CHECK_INTERVAL 10
|
||||
|
||||
#define CTX \
|
||||
hws->ctx
|
||||
#define REG(reg)\
|
||||
|
@ -780,25 +790,150 @@ static bool is_panel_backlight_on(struct dce_hwseq *hws)
|
|||
return value;
|
||||
}
|
||||
|
||||
static bool is_panel_powered_on(struct dce_hwseq *hws)
|
||||
{
|
||||
uint32_t value;
|
||||
|
||||
REG_GET(LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, &value);
|
||||
return value == 1;
|
||||
}
|
||||
|
||||
static enum bp_result link_transmitter_control(
|
||||
struct dc_link *link,
|
||||
struct dc_bios *bios,
|
||||
struct bp_transmitter_control *cntl)
|
||||
{
|
||||
enum bp_result result;
|
||||
struct dc_bios *bp = link->dc->ctx->dc_bios;
|
||||
|
||||
result = bp->funcs->transmitter_control(bp, cntl);
|
||||
result = bios->funcs->transmitter_control(bios, cntl);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief
|
||||
* eDP only.
|
||||
*/
|
||||
void hwss_edp_wait_for_hpd_ready(
|
||||
struct link_encoder *enc,
|
||||
bool power_up)
|
||||
{
|
||||
struct dc_context *ctx = enc->ctx;
|
||||
struct graphics_object_id connector = enc->connector;
|
||||
struct gpio *hpd;
|
||||
bool edp_hpd_high = false;
|
||||
uint32_t time_elapsed = 0;
|
||||
uint32_t timeout = power_up ?
|
||||
PANEL_POWER_UP_TIMEOUT : PANEL_POWER_DOWN_TIMEOUT;
|
||||
|
||||
if (dal_graphics_object_id_get_connector_id(connector)
|
||||
!= CONNECTOR_ID_EDP) {
|
||||
BREAK_TO_DEBUGGER();
|
||||
return;
|
||||
}
|
||||
|
||||
if (!power_up)
|
||||
/*
|
||||
* From KV, we will not HPD low after turning off VCC -
|
||||
* instead, we will check the SW timer in power_up().
|
||||
*/
|
||||
return;
|
||||
|
||||
/*
|
||||
* When we power on/off the eDP panel,
|
||||
* we need to wait until SENSE bit is high/low.
|
||||
*/
|
||||
|
||||
/* obtain HPD */
|
||||
/* TODO what to do with this? */
|
||||
hpd = get_hpd_gpio(ctx->dc_bios, connector, ctx->gpio_service);
|
||||
|
||||
if (!hpd) {
|
||||
BREAK_TO_DEBUGGER();
|
||||
return;
|
||||
}
|
||||
|
||||
dal_gpio_open(hpd, GPIO_MODE_INTERRUPT);
|
||||
|
||||
/* wait until timeout or panel detected */
|
||||
|
||||
do {
|
||||
uint32_t detected = 0;
|
||||
|
||||
dal_gpio_get_value(hpd, &detected);
|
||||
|
||||
if (!(detected ^ power_up)) {
|
||||
edp_hpd_high = true;
|
||||
break;
|
||||
}
|
||||
|
||||
msleep(HPD_CHECK_INTERVAL);
|
||||
|
||||
time_elapsed += HPD_CHECK_INTERVAL;
|
||||
} while (time_elapsed < timeout);
|
||||
|
||||
dal_gpio_close(hpd);
|
||||
|
||||
dal_gpio_destroy_irq(&hpd);
|
||||
|
||||
if (false == edp_hpd_high) {
|
||||
dm_logger_write(ctx->logger, LOG_ERROR,
|
||||
"%s: wait timed out!\n", __func__);
|
||||
}
|
||||
}
|
||||
|
||||
void hwss_edp_power_control(
|
||||
struct link_encoder *enc,
|
||||
bool power_up)
|
||||
{
|
||||
struct dc_context *ctx = enc->ctx;
|
||||
struct dce_hwseq *hwseq = ctx->dc->hwseq;
|
||||
struct bp_transmitter_control cntl = { 0 };
|
||||
enum bp_result bp_result;
|
||||
|
||||
|
||||
if (dal_graphics_object_id_get_connector_id(enc->connector)
|
||||
!= CONNECTOR_ID_EDP) {
|
||||
BREAK_TO_DEBUGGER();
|
||||
return;
|
||||
}
|
||||
|
||||
if (power_up != is_panel_powered_on(hwseq)) {
|
||||
/* Send VBIOS command to prompt eDP panel power */
|
||||
|
||||
dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
|
||||
"%s: Panel Power action: %s\n",
|
||||
__func__, (power_up ? "On":"Off"));
|
||||
|
||||
cntl.action = power_up ?
|
||||
TRANSMITTER_CONTROL_POWER_ON :
|
||||
TRANSMITTER_CONTROL_POWER_OFF;
|
||||
cntl.transmitter = enc->transmitter;
|
||||
cntl.connector_obj_id = enc->connector;
|
||||
cntl.coherent = false;
|
||||
cntl.lanes_number = LANE_COUNT_FOUR;
|
||||
cntl.hpd_sel = enc->hpd_source;
|
||||
|
||||
bp_result = link_transmitter_control(ctx->dc_bios, &cntl);
|
||||
|
||||
if (bp_result != BP_RESULT_OK)
|
||||
dm_logger_write(ctx->logger, LOG_ERROR,
|
||||
"%s: Panel Power bp_result: %d\n",
|
||||
__func__, bp_result);
|
||||
} else {
|
||||
dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
|
||||
"%s: Skipping Panel Power action: %s\n",
|
||||
__func__, (power_up ? "On":"Off"));
|
||||
}
|
||||
|
||||
hwss_edp_wait_for_hpd_ready(enc, true);
|
||||
}
|
||||
|
||||
/*todo: cloned in stream enc, fix*/
|
||||
/*
|
||||
* @brief
|
||||
* eDP only. Control the backlight of the eDP panel
|
||||
*/
|
||||
void hwss_blacklight_control(
|
||||
void hwss_edp_backlight_control(
|
||||
struct dc_link *link,
|
||||
bool enable)
|
||||
{
|
||||
|
@ -828,6 +963,7 @@ void hwss_blacklight_control(
|
|||
cntl.action = enable ?
|
||||
TRANSMITTER_CONTROL_BACKLIGHT_ON :
|
||||
TRANSMITTER_CONTROL_BACKLIGHT_OFF;
|
||||
|
||||
/*cntl.engine_id = ctx->engine;*/
|
||||
cntl.transmitter = link->link_enc->transmitter;
|
||||
cntl.connector_obj_id = link->link_enc->connector;
|
||||
|
@ -846,7 +982,7 @@ void hwss_blacklight_control(
|
|||
* Enable it in the future if necessary.
|
||||
*/
|
||||
/* dc_service_sleep_in_milliseconds(50); */
|
||||
link_transmitter_control(link, &cntl);
|
||||
link_transmitter_control(link->dc->ctx->dc_bios, &cntl);
|
||||
}
|
||||
|
||||
void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
|
||||
|
@ -886,7 +1022,7 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
|
|||
/* blank at encoder level */
|
||||
if (dc_is_dp_signal(pipe_ctx->stream->signal)) {
|
||||
if (pipe_ctx->stream->sink->link->connector_signal == SIGNAL_TYPE_EDP)
|
||||
hwss_blacklight_control(link, false);
|
||||
hwss_edp_backlight_control(link, false);
|
||||
pipe_ctx->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc);
|
||||
}
|
||||
link->link_enc->funcs->connect_dig_be_to_fe(
|
||||
|
@ -908,7 +1044,7 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
|
|||
params.link_settings.link_rate = link_settings->link_rate;
|
||||
pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, ¶ms);
|
||||
if (link->connector_signal == SIGNAL_TYPE_EDP)
|
||||
hwss_blacklight_control(link, true);
|
||||
hwss_edp_backlight_control(link, true);
|
||||
}
|
||||
|
||||
|
||||
|
@ -2821,7 +2957,8 @@ static const struct hw_sequencer_funcs dce110_funcs = {
|
|||
.wait_for_mpcc_disconnect = dce110_wait_for_mpcc_disconnect,
|
||||
.ready_shared_resources = ready_shared_resources,
|
||||
.optimize_shared_resources = optimize_shared_resources,
|
||||
.backlight_control = hwss_blacklight_control
|
||||
.edp_backlight_control = hwss_edp_backlight_control,
|
||||
.edp_power_control = hwss_edp_power_control,
|
||||
};
|
||||
|
||||
void dce110_hw_sequencer_construct(struct dc *dc)
|
||||
|
|
|
@ -69,7 +69,11 @@ uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
|
|||
|
||||
void dp_receiver_power_ctrl(struct dc_link *link, bool on);
|
||||
|
||||
void hwss_blacklight_control(
|
||||
void hwss_edp_power_control(
|
||||
struct link_encoder *enc,
|
||||
bool power_up);
|
||||
|
||||
void hwss_edp_backlight_control(
|
||||
struct dc_link *link,
|
||||
bool enable);
|
||||
|
||||
|
|
|
@ -2903,7 +2903,8 @@ static const struct hw_sequencer_funcs dcn10_funcs = {
|
|||
.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
|
||||
.ready_shared_resources = ready_shared_resources,
|
||||
.optimize_shared_resources = optimize_shared_resources,
|
||||
.backlight_control = hwss_blacklight_control
|
||||
.edp_backlight_control = hwss_edp_backlight_control,
|
||||
.edp_power_control = hwss_edp_power_control
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -123,8 +123,6 @@ struct link_encoder_funcs {
|
|||
bool exit_link_training_required);
|
||||
void (*psr_program_secondary_packet)(struct link_encoder *enc,
|
||||
unsigned int sdp_transmit_line_num_deadline);
|
||||
void (*power_control) (struct link_encoder *enc,
|
||||
bool power_up);
|
||||
void (*connect_dig_be_to_fe)(struct link_encoder *enc,
|
||||
enum engine_id engine,
|
||||
bool connect);
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include "dc_types.h"
|
||||
#include "clock_source.h"
|
||||
#include "inc/hw/timing_generator.h"
|
||||
#include "inc/hw/link_encoder.h"
|
||||
#include "core_status.h"
|
||||
|
||||
enum pipe_gating_control {
|
||||
|
@ -176,8 +177,10 @@ struct hw_sequencer_funcs {
|
|||
|
||||
void (*ready_shared_resources)(struct dc *dc, struct dc_state *context);
|
||||
void (*optimize_shared_resources)(struct dc *dc);
|
||||
|
||||
void (*backlight_control)(
|
||||
void (*edp_power_control)(
|
||||
struct link_encoder *enc,
|
||||
bool enable);
|
||||
void (*edp_backlight_control)(
|
||||
struct dc_link *link,
|
||||
bool enable);
|
||||
};
|
||||
|
|
|
@ -40,6 +40,10 @@ enum dc_status core_link_write_dpcd(
|
|||
const uint8_t *data,
|
||||
uint32_t size);
|
||||
|
||||
struct gpio *get_hpd_gpio(struct dc_bios *dcb,
|
||||
struct graphics_object_id link_id,
|
||||
struct gpio_service *gpio_service);
|
||||
|
||||
void dp_enable_link_phy(
|
||||
struct dc_link *link,
|
||||
enum signal_type signal,
|
||||
|
|
|
@ -73,10 +73,6 @@ static void virtual_link_encoder_update_mst_stream_allocation_table(
|
|||
struct link_encoder *enc,
|
||||
const struct link_mst_stream_allocation_table *table) {}
|
||||
|
||||
static void virtual_link_encoder_edp_power_control(
|
||||
struct link_encoder *enc,
|
||||
bool power_up) {}
|
||||
|
||||
static void virtual_link_encoder_connect_dig_be_to_fe(
|
||||
struct link_encoder *enc,
|
||||
enum engine_id engine,
|
||||
|
@ -102,7 +98,6 @@ static const struct link_encoder_funcs virtual_lnk_enc_funcs = {
|
|||
.dp_set_phy_pattern = virtual_link_encoder_dp_set_phy_pattern,
|
||||
.update_mst_stream_allocation_table =
|
||||
virtual_link_encoder_update_mst_stream_allocation_table,
|
||||
.power_control = virtual_link_encoder_edp_power_control,
|
||||
.connect_dig_be_to_fe = virtual_link_encoder_connect_dig_be_to_fe,
|
||||
.destroy = virtual_link_encoder_destroy
|
||||
};
|
||||
|
|
Loading…
Reference in a new issue