iwlwifi: pcie: don't disable interrupts for reg_lock
The only thing we do touching the device in hard interrupt context is, at most, writing an interrupt ACK register, which isn't racing in with anything protected by the reg_lock. Thus, avoid disabling interrupts here for potentially long periods of time, particularly long periods have been observed with dumping of firmware memory (leading to lockup warnings on some devices.) Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20210210135352.da916ab91298.I064c3e7823b616647293ed97da98edefb9ce9435@changeid Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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@ -1972,7 +1972,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
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int ret;
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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spin_lock_irqsave(&trans_pcie->reg_lock, *flags);
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spin_lock_bh(&trans_pcie->reg_lock);
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if (trans_pcie->cmd_hold_nic_awake)
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goto out;
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@ -2057,7 +2057,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
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}
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err:
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spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
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spin_unlock_bh(&trans_pcie->reg_lock);
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return false;
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}
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@ -2095,7 +2095,7 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans,
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* scheduled on different CPUs (after we drop reg_lock).
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*/
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out:
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spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
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spin_unlock_bh(&trans_pcie->reg_lock);
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}
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static int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr,
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@ -2296,11 +2296,10 @@ static void iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, u32 reg,
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u32 mask, u32 value)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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unsigned long flags;
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spin_lock_irqsave(&trans_pcie->reg_lock, flags);
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spin_lock_bh(&trans_pcie->reg_lock);
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__iwl_trans_pcie_set_bits_mask(trans, reg, mask, value);
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spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
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spin_unlock_bh(&trans_pcie->reg_lock);
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}
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static const char *get_csr_string(int cmd)
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@ -31,7 +31,6 @@ int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans,
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struct iwl_txq *txq = trans->txqs.txq[trans->txqs.cmd.q_id];
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struct iwl_device_cmd *out_cmd;
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struct iwl_cmd_meta *out_meta;
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unsigned long flags;
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void *dup_buf = NULL;
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dma_addr_t phys_addr;
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int i, cmd_pos, idx;
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@ -244,11 +243,11 @@ int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans,
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if (txq->read_ptr == txq->write_ptr && txq->wd_timeout)
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mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout);
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spin_lock_irqsave(&trans_pcie->reg_lock, flags);
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spin_lock(&trans_pcie->reg_lock);
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/* Increment and update queue's write index */
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txq->write_ptr = iwl_txq_inc_wrap(trans, txq->write_ptr);
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iwl_txq_inc_wr_ptr(trans, txq);
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spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
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spin_unlock(&trans_pcie->reg_lock);
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out:
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spin_unlock_bh(&txq->lock);
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@ -223,12 +223,10 @@ static void iwl_pcie_txq_unmap(struct iwl_trans *trans, int txq_id)
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txq->read_ptr = iwl_txq_inc_wrap(trans, txq->read_ptr);
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if (txq->read_ptr == txq->write_ptr) {
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unsigned long flags;
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spin_lock_irqsave(&trans_pcie->reg_lock, flags);
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spin_lock(&trans_pcie->reg_lock);
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if (txq_id == trans->txqs.cmd.q_id)
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iwl_pcie_clear_cmd_in_flight(trans);
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spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
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spin_unlock(&trans_pcie->reg_lock);
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}
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}
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@ -679,7 +677,6 @@ static void iwl_pcie_cmdq_reclaim(struct iwl_trans *trans, int txq_id, int idx)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_txq *txq = trans->txqs.txq[txq_id];
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unsigned long flags;
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int nfreed = 0;
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u16 r;
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@ -710,9 +707,10 @@ static void iwl_pcie_cmdq_reclaim(struct iwl_trans *trans, int txq_id, int idx)
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}
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if (txq->read_ptr == txq->write_ptr) {
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spin_lock_irqsave(&trans_pcie->reg_lock, flags);
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/* BHs are also disabled due to txq->lock */
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spin_lock(&trans_pcie->reg_lock);
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iwl_pcie_clear_cmd_in_flight(trans);
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spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
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spin_unlock(&trans_pcie->reg_lock);
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}
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iwl_txq_progress(txq);
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@ -921,7 +919,6 @@ int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans,
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struct iwl_txq *txq = trans->txqs.txq[trans->txqs.cmd.q_id];
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struct iwl_device_cmd *out_cmd;
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struct iwl_cmd_meta *out_meta;
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unsigned long flags;
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void *dup_buf = NULL;
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dma_addr_t phys_addr;
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int idx;
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@ -1164,20 +1161,19 @@ int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans,
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if (txq->read_ptr == txq->write_ptr && txq->wd_timeout)
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mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout);
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spin_lock_irqsave(&trans_pcie->reg_lock, flags);
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spin_lock(&trans_pcie->reg_lock);
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ret = iwl_pcie_set_cmd_in_flight(trans, cmd);
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if (ret < 0) {
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idx = ret;
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spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
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goto out;
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goto unlock_reg;
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}
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/* Increment and update queue's write index */
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txq->write_ptr = iwl_txq_inc_wrap(trans, txq->write_ptr);
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iwl_pcie_txq_inc_wr_ptr(trans, txq);
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spin_unlock_irqrestore(&trans_pcie->reg_lock, flags);
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unlock_reg:
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spin_unlock(&trans_pcie->reg_lock);
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out:
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spin_unlock_bh(&txq->lock);
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free_dup_buf:
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