drm/i915: Prevent stalling for a GTT read back from a read-only GPU target
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -728,6 +728,12 @@ struct drm_i915_gem_object {
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*/
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*/
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unsigned int dirty : 1;
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unsigned int dirty : 1;
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/**
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* This is set if the object has been written to since the last
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* GPU flush.
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*/
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unsigned int pending_gpu_write : 1;
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/**
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/**
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* Fence register bits (if any) for this object. Will be set
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* Fence register bits (if any) for this object. Will be set
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* as needed when mapped into the GTT.
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* as needed when mapped into the GTT.
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@ -1643,6 +1643,7 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
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obj->last_fenced_ring = NULL;
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obj->last_fenced_ring = NULL;
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obj->active = 0;
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obj->active = 0;
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obj->pending_gpu_write = false;
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drm_gem_object_unreference(&obj->base);
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drm_gem_object_unreference(&obj->base);
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WARN_ON(i915_verify_lists(dev));
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WARN_ON(i915_verify_lists(dev));
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@ -2810,9 +2811,11 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
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return -EINVAL;
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return -EINVAL;
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i915_gem_object_flush_gpu_write_domain(obj);
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i915_gem_object_flush_gpu_write_domain(obj);
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if (obj->pending_gpu_write || write) {
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ret = i915_gem_object_wait_rendering(obj, true);
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ret = i915_gem_object_wait_rendering(obj, true);
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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i915_gem_object_flush_cpu_write_domain(obj);
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i915_gem_object_flush_cpu_write_domain(obj);
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@ -775,6 +775,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
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i915_gem_object_move_to_active(obj, ring);
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i915_gem_object_move_to_active(obj, ring);
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if (obj->base.write_domain) {
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if (obj->base.write_domain) {
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obj->dirty = 1;
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obj->dirty = 1;
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obj->pending_gpu_write = true;
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list_move_tail(&obj->gpu_write_list,
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list_move_tail(&obj->gpu_write_list,
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&ring->gpu_write_list);
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&ring->gpu_write_list);
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intel_mark_busy(ring->dev, obj);
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intel_mark_busy(ring->dev, obj);
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