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perf tools: Just pr_debug() about not being able to read cacheline_size 

So far the cacheline_size is only useful for the "dcacheline" --sort
order, i.e. if that is not used, which is the norm, then the user
shouldn't care that he is running this, say, on an Android system where
sysconf(_SC_LEVEL1_DCACHE_LINESIZE) and the
/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size sysfs file
isn't available.

An upcoming patch will emit an warning only for "--sort ...,dcacheline,...".

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Chris Phlipot <cphlipot0@gmail.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/n/tip-580cnkvftunyvt9n7unsholi@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
hifive-unleashed-5.1
Arnaldo Carvalho de Melo 2016-07-15 10:05:19 -03:00
parent 8c98abff43
commit 8811e8ea14
1 changed files with 1 additions and 1 deletions
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2
tools/perf/perf.c
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@ -503,7 +503,7 @@ void pthread__unblock_sigwinch(void)
static void cache_line_size(int *cacheline_sizep)
{
if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep))
perror("cannot determine cache line size");
pr_debug("cannot determine cache line size");
}
#endif