ARM: imx6q: add the missing esai_ahb clock
The esai_ahb clock is derived from ahb and used to provide ESAI the capability of register accessing and FSYS clock source for I2S clocks dividing. The gate bits of this esai_ahb clock are shared with the esai clock -- the baud clock, so we need to call imx_clk_gate2_shared() for these two clocks. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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@ -220,6 +220,7 @@ clocks and IDs.
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lvds2_sel 205
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lvds1_gate 206
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lvds2_gate 207
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esai_ahb 208
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Examples:
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@ -107,7 +107,7 @@ enum mx6q_clks {
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sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,
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usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,
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spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, pll4_audio_div,
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lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max
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lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, esai_ahb, clk_max
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};
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static struct clk *clk[clk_max];
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@ -140,6 +140,8 @@ static struct clk_div_table video_div_table[] = {
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{ /* sentinel */ }
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};
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static unsigned int share_count_esai;
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static void __init imx6q_clocks_init(struct device_node *ccm_node)
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{
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struct device_node *np;
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@ -358,7 +360,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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else
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clk[ecspi5] = imx_clk_gate2("ecspi5", "ecspi_root", base + 0x6c, 8);
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clk[enet] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
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clk[esai] = imx_clk_gate2("esai", "esai_podf", base + 0x6c, 16);
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clk[esai] = imx_clk_gate2_shared("esai", "esai_podf", base + 0x6c, 16, &share_count_esai);
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clk[esai_ahb] = imx_clk_gate2_shared("esai_ahb", "ahb", base + 0x6c, 16, &share_count_esai);
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clk[gpt_ipg] = imx_clk_gate2("gpt_ipg", "ipg", base + 0x6c, 20);
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clk[gpt_ipg_per] = imx_clk_gate2("gpt_ipg_per", "ipg_per", base + 0x6c, 22);
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if (cpu_is_imx6dl())
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