dmaengine: dw: apply both HS interfaces and remove slave_id usage
Instead of one request line member let's use both source and destination ones. Usually we have no such hardware except Atmel MMC controller found on AVR32 platform (see arch/avr32/mach-at32ap/at32ap700x.c and drivers/mmc/host/atmel-mci.c). This patch removes slave_id usage since it'll be removed from the generic structure in later. This breaks the non-ACPI / non-DT cases for the users of the driver, i.e. SPI and HSUART. However, these cases mean only PCI enumerated devices for now, which is anyway broken (considering more than one DMA controller in the system) and this patch series is intended to fix that eventually. The ACPI and DT cases shall be aware of the channel direction when setting request lines, but this is a minor problem that would be addressed in future. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -37,24 +37,6 @@
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* support descriptor writeback.
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*/
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static inline bool is_request_line_unset(struct dw_dma_chan *dwc)
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{
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return dwc->request_line == (typeof(dwc->request_line))~0;
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}
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static inline void dwc_set_masters(struct dw_dma_chan *dwc)
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{
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struct dw_dma *dw = to_dw_dma(dwc->chan.device);
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struct dw_dma_slave *dws = dwc->chan.private;
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unsigned char mmax = dw->nr_masters - 1;
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if (!is_request_line_unset(dwc))
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return;
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dwc->src_master = min_t(unsigned char, mmax, dwc_get_sms(dws));
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dwc->dst_master = min_t(unsigned char, mmax, dwc_get_dms(dws));
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}
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#define DWC_DEFAULT_CTLLO(_chan) ({ \
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struct dw_dma_chan *_dwc = to_dw_dma_chan(_chan); \
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struct dma_slave_config *_sconfig = &_dwc->dma_sconfig; \
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@ -158,10 +140,8 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
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cfghi |= DWC_CFGH_DST_PER(dws->dst_id);
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cfghi |= DWC_CFGH_SRC_PER(dws->src_id);
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} else {
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if (dwc->direction == DMA_MEM_TO_DEV)
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cfghi = DWC_CFGH_DST_PER(dwc->request_line);
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else if (dwc->direction == DMA_DEV_TO_MEM)
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cfghi = DWC_CFGH_SRC_PER(dwc->request_line);
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cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
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cfghi |= DWC_CFGH_SRC_PER(dwc->src_id);
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}
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channel_writel(dwc, CFG_LO, cfglo);
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@ -967,10 +947,6 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
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memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
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dwc->direction = sconfig->direction;
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/* Take the request line from slave_id member */
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if (is_request_line_unset(dwc))
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dwc->request_line = sconfig->slave_id;
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convert_burst(&dwc->dma_sconfig.src_maxburst);
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convert_burst(&dwc->dma_sconfig.dst_maxburst);
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@ -1123,8 +1099,6 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
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* doesn't mean what you think it means), and status writeback.
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*/
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dwc_set_masters(dwc);
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spin_lock_irqsave(&dwc->lock, flags);
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i = dwc->descs_allocated;
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while (dwc->descs_allocated < NR_DESCS_PER_CHANNEL) {
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@ -1182,7 +1156,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
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list_splice_init(&dwc->free_list, &list);
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dwc->descs_allocated = 0;
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dwc->initialized = false;
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dwc->request_line = ~0;
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/* Disable interrupts */
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channel_clear_bit(dw, MASK.XFER, dwc->mask);
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@ -1604,7 +1577,6 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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channel_clear_bit(dw, CH_EN, dwc->mask);
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dwc->direction = DMA_TRANS_NONE;
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dwc->request_line = ~0;
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/* Hardware configuration */
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if (autocfg) {
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@ -41,7 +41,8 @@ static bool dw_dma_of_filter(struct dma_chan *chan, void *param)
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if (chan->device != &fargs->dw->dma)
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return false;
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dwc->request_line = fargs->req;
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dwc->src_id = fargs->req;
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dwc->dst_id = fargs->req;
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dwc->src_master = fargs->src;
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dwc->dst_master = fargs->dst;
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@ -86,7 +87,8 @@ static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
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chan->chan_id != dma_spec->chan_id)
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return false;
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dwc->request_line = dma_spec->slave_id;
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dwc->src_id = dma_spec->slave_id;
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dwc->dst_id = dma_spec->slave_id;
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dwc->src_master = dwc_get_sms(NULL);
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dwc->dst_master = dwc_get_dms(NULL);
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@ -221,9 +221,10 @@ struct dw_dma_chan {
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bool nollp;
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/* custom slave configuration */
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unsigned int request_line;
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unsigned char src_master;
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unsigned char dst_master;
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u8 src_id;
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u8 dst_id;
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u8 src_master;
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u8 dst_master;
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/* configuration passed via DMA_SLAVE_CONFIG */
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struct dma_slave_config dma_sconfig;
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