sh: Add SuperH Mobile LCDC platform data for Migo-R
Add WVGA and QVGA LCD panel support to Migo-R. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
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761656e6be
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8b1285f1c1
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@ -592,6 +592,7 @@ endmenu
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source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
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source "arch/sh/boards/renesas/r7780rp/Kconfig"
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source "arch/sh/boards/renesas/sdk7780/Kconfig"
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source "arch/sh/boards/renesas/migor/Kconfig"
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source "arch/sh/boards/magicpanelr2/Kconfig"
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menu "Timer and clock configuration"
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15
arch/sh/boards/renesas/migor/Kconfig
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15
arch/sh/boards/renesas/migor/Kconfig
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@ -0,0 +1,15 @@
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if SH_MIGOR
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choice
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prompt "Migo-R LCD Panel Board Selection"
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default SH_MIGOR_QVGA
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config SH_MIGOR_QVGA
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bool "QVGA (320x240)"
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config SH_MIGOR_RTA_WVGA
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bool "RTA WVGA (800x480)"
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endchoice
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endif
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@ -1 +1,2 @@
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obj-y := setup.o
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obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o
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165
arch/sh/boards/renesas/migor/lcd_qvga.c
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165
arch/sh/boards/renesas/migor/lcd_qvga.c
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@ -0,0 +1,165 @@
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/*
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* Support for SuperH MigoR Quarter VGA LCD Panel
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*
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* Copyright (C) 2008 Magnus Damm
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*
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* Based on lcd_powertip.c from Kenati Technologies Pvt Ltd.
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* Copyright (c) 2007 Ujjwal Pande <ujjwal@kenati.com>,
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/sh_mobile_lcdc.h>
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#include <asm/migor.h>
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/* LCD Module is a PH240320T according to board schematics. This module
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* is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?)
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* Driver IC. This IC is connected to the SH7722 built-in LCDC using a
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* SYS-80 interface configured in 16 bit mode.
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*
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* Index 0: "Device Code Read" returns 0x1505.
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*/
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static void reset_lcd_module(void)
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{
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ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR);
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mdelay(2);
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ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR);
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mdelay(1);
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}
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/* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */
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static unsigned long adjust_reg18(unsigned short data)
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{
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unsigned long tmp1, tmp2;
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tmp1 = (data<<1 | 0x00000001) & 0x000001FF;
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tmp2 = (data<<2 | 0x00000200) & 0x0003FE00;
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return tmp1 | tmp2;
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}
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static void write_reg(void *sys_ops_handle,
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struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
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unsigned short reg, unsigned short data)
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{
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sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data));
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}
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static void write_reg16(void *sys_ops_handle,
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struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
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unsigned short reg, unsigned short data)
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{
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sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
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sys_ops->write_data(sys_ops_handle, adjust_reg18(data));
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}
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static unsigned long read_reg16(void *sys_ops_handle,
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struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
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unsigned short reg)
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{
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unsigned long data;
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sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
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data = sys_ops->read_data(sys_ops_handle);
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return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00);
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}
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static void migor_lcd_qvga_seq(void *sys_ops_handle,
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struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
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unsigned short const *data, int no_data)
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{
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int i;
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for (i = 0; i < no_data; i += 2)
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write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]);
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}
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static const unsigned short sync_data[] = {
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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};
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static const unsigned short magic0_data[] = {
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0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001,
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0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116,
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0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8,
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};
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static const unsigned short magic1_data[] = {
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0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202,
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0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303,
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0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102,
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0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300,
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0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000,
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0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000,
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0x0015, 0x8000,
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};
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static const unsigned short magic2_data[] = {
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0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021,
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};
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static const unsigned short magic3_data[] = {
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0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061,
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};
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int migor_lcd_qvga_setup(void *board_data, void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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unsigned long xres = 320;
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unsigned long yres = 240;
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int k;
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reset_lcd_module();
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migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
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if (read_reg16(sohandle, so, 0) != 0x1505)
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return -ENODEV;
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pr_info("Migo-R QVGA LCD Module detected.\n");
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migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
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write_reg16(sohandle, so, 0x00A4, 0x0001);
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mdelay(10);
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migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data));
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mdelay(100);
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migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data));
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write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1));
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write_reg16(sohandle, so, 0x0051, 0x00ef);
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write_reg16(sohandle, so, 0x0052, 0x0000);
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write_reg16(sohandle, so, 0x0053, xres - 1);
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migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data));
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mdelay(10);
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migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data));
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mdelay(40);
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/* clear GRAM to avoid displaying garbage */
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write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */
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write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */
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for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */
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write_reg16(sohandle, so, 0x0022, 0x0000);
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write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */
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write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */
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write_reg16(sohandle, so, 0x0007, 0x0173);
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mdelay(40);
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/* enable display */
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write_reg(sohandle, so, 0x00, 0x22);
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mdelay(100);
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return 0;
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}
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@ -19,6 +19,7 @@
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <asm/sh_keysc.h>
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#include <asm/sh_mobile_lcdc.h>
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#include <asm/migor.h>
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/* Address IRQ Size Bus Description
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@ -199,9 +200,80 @@ static struct platform_device migor_nand_flash_device = {
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}
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};
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static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
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#ifdef CONFIG_SH_MIGOR_RTA_WVGA
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.clock_source = LCDC_CLK_BUS,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = RGB16,
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.clock_divider = 2,
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.lcd_cfg = {
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.name = "LB070WV1",
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.xres = 800,
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.yres = 480,
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.left_margin = 64,
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.right_margin = 16,
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.hsync_len = 120,
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.upper_margin = 1,
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.lower_margin = 17,
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.vsync_len = 2,
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.sync = 0,
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},
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}
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#endif
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#ifdef CONFIG_SH_MIGOR_QVGA
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.clock_source = LCDC_CLK_PERIPHERAL,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = SYS16A,
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.clock_divider = 10,
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.lcd_cfg = {
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.name = "PH240320T",
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.xres = 320,
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.yres = 240,
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.left_margin = 0,
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.right_margin = 16,
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.hsync_len = 8,
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.upper_margin = 1,
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.lower_margin = 17,
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.vsync_len = 2,
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.sync = FB_SYNC_HOR_HIGH_ACT,
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},
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.board_cfg = {
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.setup_sys = migor_lcd_qvga_setup,
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},
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.sys_bus_cfg = {
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.ldmt2r = 0x06000a09,
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.ldmt3r = 0x180e3418,
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},
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}
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#endif
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};
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static struct resource migor_lcdc_resources[] = {
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[0] = {
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.name = "LCDC",
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.start = 0xfe940000, /* P4-only space */
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.end = 0xfe941fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device migor_lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(migor_lcdc_resources),
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.resource = migor_lcdc_resources,
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.dev = {
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.platform_data = &sh_mobile_lcdc_info,
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},
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};
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static struct platform_device *migor_devices[] __initdata = {
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&smc91x_eth_device,
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&sh_keysc_device,
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&migor_lcdc_device,
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&migor_nor_flash_device,
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&migor_nand_flash_device,
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};
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static int __init migor_devices_setup(void)
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{
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clk_always_enable("mstp214"); /* KEYSC */
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clk_always_enable("mstp200"); /* LCDC */
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i2c_register_board_info(0, migor_i2c_devices,
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ARRAY_SIZE(migor_i2c_devices));
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@ -248,6 +321,29 @@ static void __init migor_setup(char **cmdline_p)
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ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
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ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
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ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
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#ifdef CONFIG_SH_MIGOR_RTA_WVGA
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/* LCDC - WVGA - Enable RGB Interface signals */
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ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
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ctrl_outw(0x0000, PORT_PHCR);
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ctrl_outw(0x0000, PORT_PLCR);
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ctrl_outw(0x0000, PORT_PMCR);
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ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
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ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD);
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ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
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ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
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#endif
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#ifdef CONFIG_SH_MIGOR_QVGA
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/* LCDC - QVGA - Enable SYS Interface signals */
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ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
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ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR);
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ctrl_outw(0x0000, PORT_PLCR);
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ctrl_outw(0x0000, PORT_PMCR);
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ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
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ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD);
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ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
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ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
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#endif
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}
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static struct sh_machine_vector mv_migor __initmv = {
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@ -30,6 +30,7 @@
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#define PORT_PYCR 0xa405014a
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#define PORT_PZCR 0xa405014c
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#define PORT_PADR 0xa4050120
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#define PORT_PHDR 0xa405012e
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#define PORT_PWDR 0xa4050166
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#define PORT_HIZCRA 0xa4050158
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#define BSC_CS6ABCR 0xfec1001c
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#include <asm/sh_mobile_lcdc.h>
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int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
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struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
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#endif /* __ASM_SH_MIGOR_H */
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