Merge git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
This commit is contained in:
commit
8b1857357a
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@ -1051,7 +1051,10 @@ static s32 igb_init_hw_82575(struct e1000_hw *hw)
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/* Disabling VLAN filtering */
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hw_dbg("Initializing the IEEE VLAN\n");
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igb_clear_vfta(hw);
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if (hw->mac.type == e1000_i350)
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igb_clear_vfta_i350(hw);
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else
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igb_clear_vfta(hw);
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/* Setup the receive address */
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igb_init_rx_addrs(hw, rar_count);
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@ -117,6 +117,50 @@ static void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
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wrfl();
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}
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/* Due to a hw errata, if the host tries to configure the VFTA register
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* while performing queries from the BMC or DMA, then the VFTA in some
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* cases won't be written.
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*/
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/**
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* igb_clear_vfta_i350 - Clear VLAN filter table
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* @hw: pointer to the HW structure
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*
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* Clears the register array which contains the VLAN filter table by
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* setting all the values to 0.
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**/
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void igb_clear_vfta_i350(struct e1000_hw *hw)
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{
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u32 offset;
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int i;
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for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
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for (i = 0; i < 10; i++)
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array_wr32(E1000_VFTA, offset, 0);
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wrfl();
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}
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}
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/**
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* igb_write_vfta_i350 - Write value to VLAN filter table
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* @hw: pointer to the HW structure
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* @offset: register offset in VLAN filter table
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* @value: register value written to VLAN filter table
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*
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* Writes value at the given offset in the register array which stores
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* the VLAN filter table.
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**/
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void igb_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)
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{
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int i;
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for (i = 0; i < 10; i++)
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array_wr32(E1000_VFTA, offset, value);
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wrfl();
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}
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/**
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* igb_init_rx_addrs - Initialize receive address's
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* @hw: pointer to the HW structure
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@ -155,9 +199,12 @@ s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add)
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{
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u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
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u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
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u32 vfta = array_rd32(E1000_VFTA, index);
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u32 vfta;
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struct igb_adapter *adapter = hw->back;
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s32 ret_val = 0;
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vfta = adapter->shadow_vfta[index];
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/* bit was set/cleared before we started */
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if ((!!(vfta & mask)) == add) {
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ret_val = -E1000_ERR_CONFIG;
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@ -167,8 +214,11 @@ s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add)
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else
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vfta &= ~mask;
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}
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igb_write_vfta(hw, index, vfta);
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if (hw->mac.type == e1000_i350)
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igb_write_vfta_i350(hw, index, vfta);
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else
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igb_write_vfta(hw, index, vfta);
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adapter->shadow_vfta[index] = vfta;
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return ret_val;
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}
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@ -191,6 +241,13 @@ s32 igb_check_alt_mac_addr(struct e1000_hw *hw)
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u16 offset, nvm_alt_mac_addr_offset, nvm_data;
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u8 alt_mac_addr[ETH_ALEN];
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/*
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* Alternate MAC address is handled by the option ROM for 82580
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* and newer. SW support not required.
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*/
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if (hw->mac.type >= e1000_82580)
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goto out;
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ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
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&nvm_alt_mac_addr_offset);
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if (ret_val) {
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@ -60,6 +60,7 @@ s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
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void igb_clear_hw_cntrs_base(struct e1000_hw *hw);
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void igb_clear_vfta(struct e1000_hw *hw);
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void igb_clear_vfta_i350(struct e1000_hw *hw);
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s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add);
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void igb_config_collision_dist(struct e1000_hw *hw);
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void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
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@ -363,6 +363,7 @@ struct igb_adapter {
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u32 rss_queues;
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u32 wvbr;
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int node;
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u32 *shadow_vfta;
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};
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#define IGB_FLAG_HAS_MSI (1 << 0)
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@ -204,6 +204,7 @@ static struct pci_error_handlers igb_err_handler = {
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.resume = igb_io_resume,
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};
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static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
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static struct pci_driver igb_driver = {
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.name = igb_driver_name,
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@ -1728,63 +1729,8 @@ void igb_reset(struct igb_adapter *adapter)
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if (hw->mac.ops.init_hw(hw))
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dev_err(&pdev->dev, "Hardware Error\n");
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if (hw->mac.type > e1000_82580) {
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if (adapter->flags & IGB_FLAG_DMAC) {
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u32 reg;
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/*
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* DMA Coalescing high water mark needs to be higher
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* than * the * Rx threshold. The Rx threshold is
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* currently * pba - 6, so we * should use a high water
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* mark of pba * - 4. */
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hwm = (pba - 4) << 10;
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reg = (((pba-6) << E1000_DMACR_DMACTHR_SHIFT)
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& E1000_DMACR_DMACTHR_MASK);
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/* transition to L0x or L1 if available..*/
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reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
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/* watchdog timer= +-1000 usec in 32usec intervals */
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reg |= (1000 >> 5);
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wr32(E1000_DMACR, reg);
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/* no lower threshold to disable coalescing(smart fifb)
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* -UTRESH=0*/
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wr32(E1000_DMCRTRH, 0);
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/* set hwm to PBA - 2 * max frame size */
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wr32(E1000_FCRTC, hwm);
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/*
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* This sets the time to wait before requesting tran-
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* sition to * low power state to number of usecs needed
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* to receive 1 512 * byte frame at gigabit line rate
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*/
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reg = rd32(E1000_DMCTLX);
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reg |= IGB_DMCTLX_DCFLUSH_DIS;
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/* Delay 255 usec before entering Lx state. */
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reg |= 0xFF;
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wr32(E1000_DMCTLX, reg);
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/* free space in Tx packet buffer to wake from DMAC */
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wr32(E1000_DMCTXTH,
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(IGB_MIN_TXPBSIZE -
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(IGB_TX_BUF_4096 + adapter->max_frame_size))
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>> 6);
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/* make low power state decision controlled by DMAC */
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reg = rd32(E1000_PCIEMISC);
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reg |= E1000_PCIEMISC_LX_DECISION;
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wr32(E1000_PCIEMISC, reg);
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} /* end if IGB_FLAG_DMAC set */
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}
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if (hw->mac.type == e1000_82580) {
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u32 reg = rd32(E1000_PCIEMISC);
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wr32(E1000_PCIEMISC,
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reg & ~E1000_PCIEMISC_LX_DECISION);
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}
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igb_init_dmac(adapter, pba);
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if (!netif_running(adapter->netdev))
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igb_power_down_link(adapter);
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@ -2260,6 +2206,7 @@ static void __devexit igb_remove(struct pci_dev *pdev)
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pci_release_selected_regions(pdev,
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pci_select_bars(pdev, IORESOURCE_MEM));
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kfree(adapter->shadow_vfta);
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free_netdev(netdev);
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pci_disable_pcie_error_reporting(pdev);
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@ -2492,6 +2439,11 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter)
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((adapter->rss_queues > 1) && (adapter->vfs_allocated_count > 6)))
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adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
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/* Setup and initialize a copy of the hw vlan table array */
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adapter->shadow_vfta = kzalloc(sizeof(u32) *
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E1000_VLAN_FILTER_TBL_SIZE,
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GFP_ATOMIC);
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/* This call may decrease the number of queues */
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if (igb_init_interrupt_scheme(adapter)) {
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dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
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@ -7098,4 +7050,70 @@ static void igb_vmm_control(struct igb_adapter *adapter)
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}
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}
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static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
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{
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struct e1000_hw *hw = &adapter->hw;
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u32 dmac_thr;
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u16 hwm;
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if (hw->mac.type > e1000_82580) {
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if (adapter->flags & IGB_FLAG_DMAC) {
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u32 reg;
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/* force threshold to 0. */
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wr32(E1000_DMCTXTH, 0);
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/*
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* DMA Coalescing high water mark needs to be higher
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* than the RX threshold. set hwm to PBA - 2 * max
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* frame size
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*/
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hwm = pba - (2 * adapter->max_frame_size);
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reg = rd32(E1000_DMACR);
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reg &= ~E1000_DMACR_DMACTHR_MASK;
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dmac_thr = pba - 4;
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reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
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& E1000_DMACR_DMACTHR_MASK);
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/* transition to L0x or L1 if available..*/
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reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
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/* watchdog timer= +-1000 usec in 32usec intervals */
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reg |= (1000 >> 5);
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wr32(E1000_DMACR, reg);
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/*
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* no lower threshold to disable
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* coalescing(smart fifb)-UTRESH=0
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*/
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wr32(E1000_DMCRTRH, 0);
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wr32(E1000_FCRTC, hwm);
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reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
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wr32(E1000_DMCTLX, reg);
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/*
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* free space in tx packet buffer to wake from
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* DMA coal
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*/
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wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
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(IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
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/*
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* make low power state decision controlled
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* by DMA coal
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*/
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reg = rd32(E1000_PCIEMISC);
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reg &= ~E1000_PCIEMISC_LX_DECISION;
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wr32(E1000_PCIEMISC, reg);
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} /* endif adapter->dmac is not disabled */
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} else if (hw->mac.type == e1000_82580) {
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u32 reg = rd32(E1000_PCIEMISC);
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wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
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wr32(E1000_DMACR, 0);
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}
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}
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/* igb_main.c */
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@ -45,13 +45,13 @@
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#include "igbvf.h"
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#define DRV_VERSION "2.0.0-k"
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#define DRV_VERSION "2.0.1-k"
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char igbvf_driver_name[] = "igbvf";
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const char igbvf_driver_version[] = DRV_VERSION;
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static const char igbvf_driver_string[] =
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"Intel(R) Virtual Function Network Driver";
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"Intel(R) Gigabit Virtual Function Network Driver";
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static const char igbvf_copyright[] =
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"Copyright (c) 2009 - 2010 Intel Corporation.";
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"Copyright (c) 2009 - 2011 Intel Corporation.";
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static int igbvf_poll(struct napi_struct *napi, int budget);
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static void igbvf_reset(struct igbvf_adapter *);
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@ -2525,9 +2525,11 @@ static void igbvf_print_device_info(struct igbvf_adapter *adapter)
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struct net_device *netdev = adapter->netdev;
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struct pci_dev *pdev = adapter->pdev;
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dev_info(&pdev->dev, "Intel(R) 82576 Virtual Function\n");
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if (hw->mac.type == e1000_vfadapt_i350)
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dev_info(&pdev->dev, "Intel(R) I350 Virtual Function\n");
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else
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dev_info(&pdev->dev, "Intel(R) 82576 Virtual Function\n");
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dev_info(&pdev->dev, "Address: %pM\n", netdev->dev_addr);
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dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
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}
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static int igbvf_set_features(struct net_device *netdev, u32 features)
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@ -2864,7 +2866,7 @@ module_exit(igbvf_exit_module);
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MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
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MODULE_DESCRIPTION("Intel(R) 82576 Virtual Function Network Driver");
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MODULE_DESCRIPTION("Intel(R) Gigabit Virtual Function Network Driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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