[libata sata_mv] trim trailing whitespace
Jeff Garzik
parent
095fec887e
commit
8b260248d9
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@ -1,7 +1,7 @@
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/*
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* sata_mv.c - Marvell SATA support
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*
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* Copyright 2005: EMC Corporation, all rights reserved.
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* Copyright 2005: EMC Corporation, all rights reserved.
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*
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* Please ALWAYS copy linux-ide@vger.kernel.org on emails.
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*
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@ -84,7 +84,7 @@ enum {
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MV_FLAG_GLBL_SFT_RST = (1 << 28), /* Global Soft Reset support */
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MV_COMMON_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
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ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO),
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MV_6XXX_FLAGS = (MV_FLAG_IRQ_COALESCE |
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MV_6XXX_FLAGS = (MV_FLAG_IRQ_COALESCE |
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MV_FLAG_GLBL_SFT_RST),
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chip_504x = 0,
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@ -129,7 +129,7 @@ enum {
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SELF_INT = (1 << 23),
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TWSI_INT = (1 << 24),
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HC_MAIN_RSVD = (0x7f << 25), /* bits 31-25 */
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HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE |
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HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE |
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PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT |
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HC_MAIN_RSVD),
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@ -177,12 +177,12 @@ enum {
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EDMA_ERR_LNK_CTRL_TX = (0x1f << 21),
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EDMA_ERR_LNK_DATA_TX = (0x1f << 26),
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EDMA_ERR_TRANS_PROTO = (1 << 31),
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EDMA_ERR_FATAL = (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR |
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EDMA_ERR_FATAL = (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR |
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EDMA_ERR_DEV_DCON | EDMA_ERR_CRBQ_PAR |
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EDMA_ERR_CRPB_PAR | EDMA_ERR_INTRL_PAR |
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EDMA_ERR_IORDY | EDMA_ERR_LNK_CTRL_RX_2 |
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EDMA_ERR_IORDY | EDMA_ERR_LNK_CTRL_RX_2 |
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EDMA_ERR_LNK_DATA_RX |
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EDMA_ERR_LNK_DATA_TX |
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EDMA_ERR_LNK_DATA_TX |
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EDMA_ERR_TRANS_PROTO),
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EDMA_REQ_Q_BASE_HI_OFS = 0x10,
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@ -345,7 +345,7 @@ static struct ata_port_info mv_port_info[] = {
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},
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{ /* chip_608x */
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.sht = &mv_sht,
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.host_flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS |
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.host_flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS |
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MV_FLAG_DUAL_HC),
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.pio_mask = 0x1f, /* pio0-4 */
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.udma_mask = 0x7f, /* udma0-6 */
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@ -393,7 +393,7 @@ static inline void __iomem *mv_hc_base(void __iomem *base, unsigned int hc)
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static inline void __iomem *mv_port_base(void __iomem *base, unsigned int port)
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{
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return (mv_hc_base(base, port >> MV_PORT_HC_SHIFT) +
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MV_SATAHC_ARBTR_REG_SZ +
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MV_SATAHC_ARBTR_REG_SZ +
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((port & MV_PORT_MASK) * MV_PORT_REG_SZ));
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}
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@ -456,7 +456,7 @@ static void mv_stop_dma(struct ata_port *ap)
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} else {
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assert(!(EDMA_EN & readl(port_mmio + EDMA_CMD_OFS)));
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}
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/* now properly wait for the eDMA to stop */
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for (i = 1000; i > 0; i--) {
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reg = readl(port_mmio + EDMA_CMD_OFS);
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@ -507,7 +507,7 @@ static void mv_dump_all_regs(void __iomem *mmio_base, int port,
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struct pci_dev *pdev)
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{
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#ifdef ATA_DEBUG
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void __iomem *hc_base = mv_hc_base(mmio_base,
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void __iomem *hc_base = mv_hc_base(mmio_base,
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port >> MV_PORT_HC_SHIFT);
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void __iomem *port_base;
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int start_port, num_ports, p, start_hc, num_hcs, hc;
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@ -521,7 +521,7 @@ static void mv_dump_all_regs(void __iomem *mmio_base, int port,
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start_port = port;
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num_ports = num_hcs = 1;
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}
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DPRINTK("All registers for port(s) %u-%u:\n", start_port,
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DPRINTK("All registers for port(s) %u-%u:\n", start_port,
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num_ports > 1 ? num_ports - 1 : start_port);
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if (NULL != pdev) {
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@ -705,7 +705,7 @@ static int mv_port_start(struct ata_port *ap)
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goto err_out;
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memset(pp, 0, sizeof(*pp));
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mem = dma_alloc_coherent(dev, MV_PORT_PRIV_DMA_SZ, &mem_dma,
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mem = dma_alloc_coherent(dev, MV_PORT_PRIV_DMA_SZ, &mem_dma,
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GFP_KERNEL);
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if (!mem)
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goto err_out_pp;
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@ -715,7 +715,7 @@ static int mv_port_start(struct ata_port *ap)
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if (rc)
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goto err_out_priv;
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/* First item in chunk of DMA memory:
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/* First item in chunk of DMA memory:
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* 32-slot command request table (CRQB), 32 bytes each in size
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*/
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pp->crqb = mem;
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@ -723,7 +723,7 @@ static int mv_port_start(struct ata_port *ap)
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mem += MV_CRQB_Q_SZ;
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mem_dma += MV_CRQB_Q_SZ;
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/* Second item:
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/* Second item:
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* 32-slot command response table (CRPB), 8 bytes each in size
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*/
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pp->crpb = mem;
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@ -737,18 +737,18 @@ static int mv_port_start(struct ata_port *ap)
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pp->sg_tbl = mem;
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pp->sg_tbl_dma = mem_dma;
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writelfl(EDMA_CFG_Q_DEPTH | EDMA_CFG_RD_BRST_EXT |
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writelfl(EDMA_CFG_Q_DEPTH | EDMA_CFG_RD_BRST_EXT |
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EDMA_CFG_WR_BUFF_LEN, port_mmio + EDMA_CFG_OFS);
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writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI_OFS);
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writelfl(pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK,
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writelfl(pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK,
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port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
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writelfl(0, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
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writelfl(0, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
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writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI_OFS);
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writelfl(pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK,
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writelfl(pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK,
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port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
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pp->req_producer = pp->rsp_consumer = 0;
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@ -863,7 +863,7 @@ static void mv_qc_prep(struct ata_queued_cmd *qc)
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}
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/* the req producer index should be the same as we remember it */
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assert(((readl(mv_ap_base(qc->ap) + EDMA_REQ_Q_IN_PTR_OFS) >>
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assert(((readl(mv_ap_base(qc->ap) + EDMA_REQ_Q_IN_PTR_OFS) >>
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EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
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pp->req_producer);
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@ -875,9 +875,9 @@ static void mv_qc_prep(struct ata_queued_cmd *qc)
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assert(MV_MAX_Q_DEPTH > qc->tag);
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flags |= qc->tag << CRQB_TAG_SHIFT;
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pp->crqb[pp->req_producer].sg_addr =
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pp->crqb[pp->req_producer].sg_addr =
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cpu_to_le32(pp->sg_tbl_dma & 0xffffffff);
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pp->crqb[pp->req_producer].sg_addr_hi =
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pp->crqb[pp->req_producer].sg_addr_hi =
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cpu_to_le32((pp->sg_tbl_dma >> 16) >> 16);
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pp->crqb[pp->req_producer].ctrl_flags = cpu_to_le16(flags);
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@ -900,7 +900,7 @@ static void mv_qc_prep(struct ata_queued_cmd *qc)
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#ifdef LIBATA_NCQ /* FIXME: remove this line when NCQ added */
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case ATA_CMD_FPDMA_READ:
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case ATA_CMD_FPDMA_WRITE:
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mv_crqb_pack_cmd(cw++, tf->hob_feature, ATA_REG_FEATURE, 0);
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mv_crqb_pack_cmd(cw++, tf->hob_feature, ATA_REG_FEATURE, 0);
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mv_crqb_pack_cmd(cw++, tf->feature, ATA_REG_FEATURE, 0);
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break;
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#endif /* FIXME: remove this line when NCQ added */
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@ -966,7 +966,7 @@ static int mv_qc_issue(struct ata_queued_cmd *qc)
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pp->req_producer);
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/* until we do queuing, the queue should be empty at this point */
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assert(((in_ptr >> EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
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((readl(port_mmio + EDMA_REQ_Q_OUT_PTR_OFS) >>
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((readl(port_mmio + EDMA_REQ_Q_OUT_PTR_OFS) >>
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EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK));
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mv_inc_q_index(&pp->req_producer); /* now incr producer index */
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@ -1003,15 +1003,15 @@ static u8 mv_get_crpb_status(struct ata_port *ap)
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out_ptr = readl(port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
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/* the response consumer index should be the same as we remember it */
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assert(((out_ptr >> EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
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assert(((out_ptr >> EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
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pp->rsp_consumer);
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/* increment our consumer index... */
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pp->rsp_consumer = mv_inc_q_index(&pp->rsp_consumer);
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/* and, until we do NCQ, there should only be 1 CRPB waiting */
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assert(((readl(port_mmio + EDMA_RSP_Q_IN_PTR_OFS) >>
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EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
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assert(((readl(port_mmio + EDMA_RSP_Q_IN_PTR_OFS) >>
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EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
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pp->rsp_consumer);
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/* write out our inc'd consumer index so EDMA knows we're caught up */
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@ -1135,7 +1135,7 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
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err_mask |= AC_ERR_OTHER;
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handled++;
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}
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if (handled && ap) {
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qc = ata_qc_from_tag(ap, ap->active_tag);
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if (NULL != qc) {
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@ -1150,7 +1150,7 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
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}
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/**
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* mv_interrupt -
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* mv_interrupt -
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* @irq: unused
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* @dev_instance: private data; in this case the host structure
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* @regs: unused
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@ -1160,7 +1160,7 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
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* routine to handle. Also check for PCI errors which are only
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* reported here.
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*
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* LOCKING:
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* LOCKING:
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* This routine holds the host_set lock while processing pending
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* interrupts.
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*/
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@ -1303,12 +1303,12 @@ static void mv_eng_timeout(struct ata_port *ap)
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printk(KERN_ERR "ata%u: Entering mv_eng_timeout\n",ap->id);
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DPRINTK("All regs @ start of eng_timeout\n");
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mv_dump_all_regs(ap->host_set->mmio_base, ap->port_no,
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mv_dump_all_regs(ap->host_set->mmio_base, ap->port_no,
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to_pci_dev(ap->host_set->dev));
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qc = ata_qc_from_tag(ap, ap->active_tag);
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printk(KERN_ERR "mmio_base %p ap %p qc %p scsi_cmnd %p &cmnd %p\n",
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ap->host_set->mmio_base, ap, qc, qc->scsicmd,
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ap->host_set->mmio_base, ap, qc, qc->scsicmd,
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&qc->scsicmd->cmnd);
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mv_err_intr(ap);
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@ -1348,17 +1348,17 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
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unsigned long shd_base = (unsigned long) port_mmio + SHD_BLK_OFS;
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unsigned serr_ofs;
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/* PIO related setup
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/* PIO related setup
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*/
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port->data_addr = shd_base + (sizeof(u32) * ATA_REG_DATA);
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port->error_addr =
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port->error_addr =
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port->feature_addr = shd_base + (sizeof(u32) * ATA_REG_ERR);
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port->nsect_addr = shd_base + (sizeof(u32) * ATA_REG_NSECT);
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port->lbal_addr = shd_base + (sizeof(u32) * ATA_REG_LBAL);
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port->lbam_addr = shd_base + (sizeof(u32) * ATA_REG_LBAM);
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port->lbah_addr = shd_base + (sizeof(u32) * ATA_REG_LBAH);
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port->device_addr = shd_base + (sizeof(u32) * ATA_REG_DEVICE);
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port->status_addr =
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port->status_addr =
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port->command_addr = shd_base + (sizeof(u32) * ATA_REG_STATUS);
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/* special case: control/altstatus doesn't have ATA_REG_ address */
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port->altstatus_addr = port->ctl_addr = shd_base + SHD_CTL_AST_OFS;
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@ -1374,7 +1374,7 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
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/* unmask all EDMA error interrupts */
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writelfl(~0, port_mmio + EDMA_ERR_IRQ_MASK_OFS);
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VPRINTK("EDMA cfg=0x%08x EDMA IRQ err cause/mask=0x%08x/0x%08x\n",
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VPRINTK("EDMA cfg=0x%08x EDMA IRQ err cause/mask=0x%08x/0x%08x\n",
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readl(port_mmio + EDMA_CFG_OFS),
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readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS),
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readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));
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@ -1396,7 +1396,7 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
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void __iomem *mmio = probe_ent->mmio_base;
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void __iomem *port_mmio;
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if ((MV_FLAG_GLBL_SFT_RST & probe_ent->host_flags) &&
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if ((MV_FLAG_GLBL_SFT_RST & probe_ent->host_flags) &&
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mv_global_soft_reset(probe_ent->mmio_base)) {
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rc = 1;
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goto done;
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@ -1430,7 +1430,7 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
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writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS);
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VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x "
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"PCI int cause/mask=0x%08x/0x%08x\n",
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"PCI int cause/mask=0x%08x/0x%08x\n",
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readl(mmio + HC_MAIN_IRQ_CAUSE_OFS),
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readl(mmio + HC_MAIN_IRQ_MASK_OFS),
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readl(mmio + PCI_IRQ_CAUSE_OFS),
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@ -1470,7 +1470,7 @@ static void mv_print_info(struct ata_probe_ent *probe_ent)
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dev_printk(KERN_INFO, &pdev->dev,
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"%u slots %u ports %s mode IRQ via %s\n",
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(unsigned)MV_MAX_Q_DEPTH, probe_ent->n_ports,
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(unsigned)MV_MAX_Q_DEPTH, probe_ent->n_ports,
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scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx");
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}
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