[PATCH] Initial generic hypertransport interrupt support
This patch implements two functions ht_create_irq and ht_destroy_irq for use by drivers. Several other functions are implemented as helpers for arch specific irq_chip handlers. The driver for the card I tested this on isn't yet ready to be merged. However this code is and hypertransport irqs are in use in a few other places in the kernel. Not that any of this will get merged before 2.6.19 Because the ipath-ht400 is slightly out of spec this code will need to be generalized to work there. I think all of the powerpc uses are for a plain interrupt controller in a chipset so support for native hypertransport devices is a little less interesting. However I think this is a half way decent model on how to separate arch specific and generic helper code, and I think this is a functional model of how to get the architecture dependencies out of the msi code. [akpm@osdl.org: Kconfig fix] Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Greg KH <greg@kroah.com> Cc: Andi Kleen <ak@muc.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>hifive-unleashed-5.1
Eric W. Biederman
Linus Torvalds
parent
e78d01693b
commit
8b955b0ddd
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@ -40,6 +40,7 @@
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#include <asm/i8259.h>
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#include <asm/nmi.h>
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#include <asm/msidef.h>
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#include <asm/hypertransport.h>
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#include <mach_apic.h>
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#include <mach_apicdef.h>
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@ -2518,6 +2519,95 @@ struct msi_ops arch_msi_ops = {
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#endif /* CONFIG_PCI_MSI */
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/*
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* Hypertransport interrupt support
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*/
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#ifdef CONFIG_HT_IRQ
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#ifdef CONFIG_SMP
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static void target_ht_irq(unsigned int irq, unsigned int dest)
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{
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u32 low, high;
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low = read_ht_irq_low(irq);
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high = read_ht_irq_high(irq);
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low &= ~(HT_IRQ_LOW_DEST_ID_MASK);
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high &= ~(HT_IRQ_HIGH_DEST_ID_MASK);
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low |= HT_IRQ_LOW_DEST_ID(dest);
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high |= HT_IRQ_HIGH_DEST_ID(dest);
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write_ht_irq_low(irq, low);
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write_ht_irq_high(irq, high);
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}
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static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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unsigned int dest;
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cpumask_t tmp;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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tmp = TARGET_CPUS;
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cpus_and(mask, tmp, CPU_MASK_ALL);
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dest = cpu_mask_to_apicid(mask);
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target_ht_irq(irq, dest);
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set_native_irq_info(irq, mask);
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}
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#endif
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static struct hw_interrupt_type ht_irq_chip = {
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.name = "PCI-HT",
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.mask = mask_ht_irq,
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.unmask = unmask_ht_irq,
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.ack = ack_ioapic_irq,
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#ifdef CONFIG_SMP
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.set_affinity = set_ht_irq_affinity,
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#endif
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.retrigger = ioapic_retrigger_irq,
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};
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int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
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{
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int vector;
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vector = assign_irq_vector(irq);
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if (vector >= 0) {
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u32 low, high;
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unsigned dest;
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cpumask_t tmp;
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cpus_clear(tmp);
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cpu_set(vector >> 8, tmp);
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dest = cpu_mask_to_apicid(tmp);
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high = HT_IRQ_HIGH_DEST_ID(dest);
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low = HT_IRQ_LOW_BASE |
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HT_IRQ_LOW_DEST_ID(dest) |
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HT_IRQ_LOW_VECTOR(vector) |
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((INT_DEST_MODE == 0) ?
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HT_IRQ_LOW_DM_PHYSICAL :
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HT_IRQ_LOW_DM_LOGICAL) |
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HT_IRQ_LOW_RQEOI_EDGE |
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((INT_DELIVERY_MODE != dest_LowestPrio) ?
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HT_IRQ_LOW_MT_FIXED :
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HT_IRQ_LOW_MT_ARBITRATED) |
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HT_IRQ_LOW_IRQ_MASKED;
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write_ht_irq_low(irq, low);
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write_ht_irq_high(irq, high);
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set_irq_chip_and_handler(irq, &ht_irq_chip, handle_edge_irq);
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}
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return vector;
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}
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#endif /* CONFIG_HT_IRQ */
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/* --------------------------------------------------------------------------
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ACPI-based IOAPIC Configuration
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-------------------------------------------------------------------------- */
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@ -43,6 +43,7 @@
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#include <asm/dma.h>
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#include <asm/nmi.h>
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#include <asm/msidef.h>
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#include <asm/hypertransport.h>
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static int assign_irq_vector(int irq, cpumask_t mask);
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@ -1772,6 +1773,101 @@ struct msi_ops arch_msi_ops = {
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#endif
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/*
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* Hypertransport interrupt support
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*/
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#ifdef CONFIG_HT_IRQ
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#ifdef CONFIG_SMP
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static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
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{
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u32 low, high;
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low = read_ht_irq_low(irq);
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high = read_ht_irq_high(irq);
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low &= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK);
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high &= ~(HT_IRQ_HIGH_DEST_ID_MASK);
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low |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest);
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high |= HT_IRQ_HIGH_DEST_ID(dest);
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write_ht_irq_low(irq, low);
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write_ht_irq_high(irq, high);
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}
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static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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unsigned int dest;
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cpumask_t tmp;
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int vector;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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tmp = TARGET_CPUS;
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cpus_and(mask, tmp, CPU_MASK_ALL);
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vector = assign_irq_vector(irq, mask);
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if (vector < 0)
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return;
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cpus_clear(tmp);
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cpu_set(vector >> 8, tmp);
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dest = cpu_mask_to_apicid(tmp);
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target_ht_irq(irq, dest, vector & 0xff);
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set_native_irq_info(irq, mask);
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}
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#endif
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static struct hw_interrupt_type ht_irq_chip = {
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.name = "PCI-HT",
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.mask = mask_ht_irq,
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.unmask = unmask_ht_irq,
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.ack = ack_apic_edge,
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#ifdef CONFIG_SMP
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.set_affinity = set_ht_irq_affinity,
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#endif
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.retrigger = ioapic_retrigger_irq,
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};
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int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
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{
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int vector;
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vector = assign_irq_vector(irq, TARGET_CPUS);
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if (vector >= 0) {
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u32 low, high;
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unsigned dest;
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cpumask_t tmp;
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cpus_clear(tmp);
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cpu_set(vector >> 8, tmp);
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dest = cpu_mask_to_apicid(tmp);
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high = HT_IRQ_HIGH_DEST_ID(dest);
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low = HT_IRQ_LOW_BASE |
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HT_IRQ_LOW_DEST_ID(dest) |
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HT_IRQ_LOW_VECTOR(vector) |
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((INT_DEST_MODE == 0) ?
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HT_IRQ_LOW_DM_PHYSICAL :
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HT_IRQ_LOW_DM_LOGICAL) |
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HT_IRQ_LOW_RQEOI_EDGE |
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((INT_DELIVERY_MODE != dest_LowestPrio) ?
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HT_IRQ_LOW_MT_FIXED :
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HT_IRQ_LOW_MT_ARBITRATED);
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write_ht_irq_low(irq, low);
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write_ht_irq_high(irq, high);
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set_irq_chip_and_handler(irq, &ht_irq_chip, handle_edge_irq);
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}
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return vector;
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}
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#endif /* CONFIG_HT_IRQ */
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/* --------------------------------------------------------------------------
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ACPI-based IOAPIC Configuration
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-------------------------------------------------------------------------- */
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@ -52,3 +52,12 @@ config PCI_DEBUG
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When in doubt, say N.
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config HT_IRQ
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bool "Interrupts on hypertransport devices"
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default y
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depends on PCI_MSI
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depends on X86_LOCAL_APIC && X86_IO_APIC
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help
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This allows native hypertransport devices to use interrupts.
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If unsure say Y.
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@ -26,6 +26,7 @@ obj-$(CONFIG_PPC32) += setup-irq.o
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obj-$(CONFIG_PPC64) += setup-bus.o
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obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
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obj-$(CONFIG_X86_VISWS) += setup-irq.o
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obj-$(CONFIG_HT_IRQ) += htirq.o
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msiobj-y := msi.o
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msiobj-$(CONFIG_IA64) += msi-apic.o
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@ -0,0 +1,189 @@
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/*
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* File: htirq.c
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* Purpose: Hypertransport Interrupt Capability
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*
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* Copyright (C) 2006 Linux Networx
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* Copyright (C) Eric Biederman <ebiederman@lnxi.com>
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*/
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#include <linux/irq.h>
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#include <linux/pci.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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#include <linux/gfp.h>
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/* Global ht irq lock.
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*
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* This is needed to serialize access to the data port in hypertransport
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* irq capability.
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*
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* With multiple simultaneous hypertransport irq devices it might pay
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* to make this more fine grained. But start with simple, stupid, and correct.
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*/
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static DEFINE_SPINLOCK(ht_irq_lock);
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struct ht_irq_cfg {
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struct pci_dev *dev;
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unsigned pos;
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unsigned idx;
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};
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void write_ht_irq_low(unsigned int irq, u32 data)
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{
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struct ht_irq_cfg *cfg = get_irq_data(irq);
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unsigned long flags;
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
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pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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}
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void write_ht_irq_high(unsigned int irq, u32 data)
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{
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struct ht_irq_cfg *cfg = get_irq_data(irq);
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unsigned long flags;
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
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pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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}
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u32 read_ht_irq_low(unsigned int irq)
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{
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struct ht_irq_cfg *cfg = get_irq_data(irq);
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unsigned long flags;
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u32 data;
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
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pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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return data;
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}
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u32 read_ht_irq_high(unsigned int irq)
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{
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struct ht_irq_cfg *cfg = get_irq_data(irq);
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unsigned long flags;
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u32 data;
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
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pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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return data;
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}
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void mask_ht_irq(unsigned int irq)
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{
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struct ht_irq_cfg *cfg;
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unsigned long flags;
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u32 data;
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cfg = get_irq_data(irq);
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
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pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
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data |= 1;
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pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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}
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void unmask_ht_irq(unsigned int irq)
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{
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struct ht_irq_cfg *cfg;
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unsigned long flags;
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u32 data;
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cfg = get_irq_data(irq);
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
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pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
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data &= ~1;
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pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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}
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/**
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* ht_create_irq - create an irq and attach it to a device.
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* @dev: The hypertransport device to find the irq capability on.
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* @idx: Which of the possible irqs to attach to.
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*
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* ht_create_irq is needs to be called for all hypertransport devices
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* that generate irqs.
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*
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* The irq number of the new irq or a negative error value is returned.
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*/
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int ht_create_irq(struct pci_dev *dev, int idx)
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{
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struct ht_irq_cfg *cfg;
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unsigned long flags;
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u32 data;
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int max_irq;
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int pos;
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int irq;
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pos = pci_find_capability(dev, PCI_CAP_ID_HT);
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while (pos) {
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u8 subtype;
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pci_read_config_byte(dev, pos + 3, &subtype);
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if (subtype == HT_CAPTYPE_IRQ)
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break;
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pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT);
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}
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if (!pos)
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return -EINVAL;
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/* Verify the idx I want to use is in range */
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spin_lock_irqsave(&ht_irq_lock, flags);
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pci_write_config_byte(dev, pos + 2, 1);
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pci_read_config_dword(dev, pos + 4, &data);
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spin_unlock_irqrestore(&ht_irq_lock, flags);
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max_irq = (data >> 16) & 0xff;
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if ( idx > max_irq)
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return -EINVAL;
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cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
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if (!cfg)
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return -ENOMEM;
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cfg->dev = dev;
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cfg->pos = pos;
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cfg->idx = 0x10 + (idx * 2);
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irq = create_irq();
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if (irq < 0) {
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kfree(cfg);
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return -EBUSY;
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}
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set_irq_data(irq, cfg);
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if (arch_setup_ht_irq(irq, dev) < 0) {
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ht_destroy_irq(irq);
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return -EBUSY;
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}
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return irq;
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}
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/**
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* ht_destroy_irq - destroy an irq created with ht_create_irq
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*
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* This reverses ht_create_irq removing the specified irq from
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* existence. The irq should be free before this happens.
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*/
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void ht_destroy_irq(unsigned int irq)
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{
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struct ht_irq_cfg *cfg;
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cfg = get_irq_data(irq);
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set_irq_chip(irq, NULL);
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set_irq_data(irq, NULL);
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destroy_irq(irq);
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kfree(cfg);
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}
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EXPORT_SYMBOL(ht_create_irq);
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EXPORT_SYMBOL(ht_destroy_irq);
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@ -0,0 +1,42 @@
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#ifndef ASM_HYPERTRANSPORT_H
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#define ASM_HYPERTRANSPORT_H
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/*
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* Constants for x86 Hypertransport Interrupts.
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*/
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#define HT_IRQ_LOW_BASE 0xf8000000
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#define HT_IRQ_LOW_VECTOR_SHIFT 16
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#define HT_IRQ_LOW_VECTOR_MASK 0x00ff0000
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#define HT_IRQ_LOW_VECTOR(v) (((v) << HT_IRQ_LOW_VECTOR_SHIFT) & HT_IRQ_LOW_VECTOR_MASK)
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#define HT_IRQ_LOW_DEST_ID_SHIFT 8
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#define HT_IRQ_LOW_DEST_ID_MASK 0x0000ff00
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#define HT_IRQ_LOW_DEST_ID(v) (((v) << HT_IRQ_LOW_DEST_ID_SHIFT) & HT_IRQ_LOW_DEST_ID_MASK)
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#define HT_IRQ_LOW_DM_PHYSICAL 0x0000000
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#define HT_IRQ_LOW_DM_LOGICAL 0x0000040
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#define HT_IRQ_LOW_RQEOI_EDGE 0x0000000
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#define HT_IRQ_LOW_RQEOI_LEVEL 0x0000020
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#define HT_IRQ_LOW_MT_FIXED 0x0000000
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#define HT_IRQ_LOW_MT_ARBITRATED 0x0000004
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#define HT_IRQ_LOW_MT_SMI 0x0000008
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#define HT_IRQ_LOW_MT_NMI 0x000000c
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#define HT_IRQ_LOW_MT_INIT 0x0000010
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#define HT_IRQ_LOW_MT_STARTUP 0x0000014
|
||||
#define HT_IRQ_LOW_MT_EXTINT 0x0000018
|
||||
#define HT_IRQ_LOW_MT_LINT1 0x000008c
|
||||
#define HT_IRQ_LOW_MT_LINT0 0x0000098
|
||||
|
||||
#define HT_IRQ_LOW_IRQ_MASKED 0x0000001
|
||||
|
||||
|
||||
#define HT_IRQ_HIGH_DEST_ID_SHIFT 0
|
||||
#define HT_IRQ_HIGH_DEST_ID_MASK 0x00ffffff
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#define HT_IRQ_HIGH_DEST_ID(v) ((((v) >> 8) << HT_IRQ_HIGH_DEST_ID_SHIFT) & HT_IRQ_HIGH_DEST_ID_MASK)
|
||||
|
||||
#endif /* ASM_HYPERTRANSPORT_H */
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
#ifndef ASM_HYPERTRANSPORT_H
|
||||
#define ASM_HYPERTRANSPORT_H
|
||||
|
||||
/*
|
||||
* Constants for x86 Hypertransport Interrupts.
|
||||
*/
|
||||
|
||||
#define HT_IRQ_LOW_BASE 0xf8000000
|
||||
|
||||
#define HT_IRQ_LOW_VECTOR_SHIFT 16
|
||||
#define HT_IRQ_LOW_VECTOR_MASK 0x00ff0000
|
||||
#define HT_IRQ_LOW_VECTOR(v) (((v) << HT_IRQ_LOW_VECTOR_SHIFT) & HT_IRQ_LOW_VECTOR_MASK)
|
||||
|
||||
#define HT_IRQ_LOW_DEST_ID_SHIFT 8
|
||||
#define HT_IRQ_LOW_DEST_ID_MASK 0x0000ff00
|
||||
#define HT_IRQ_LOW_DEST_ID(v) (((v) << HT_IRQ_LOW_DEST_ID_SHIFT) & HT_IRQ_LOW_DEST_ID_MASK)
|
||||
|
||||
#define HT_IRQ_LOW_DM_PHYSICAL 0x0000000
|
||||
#define HT_IRQ_LOW_DM_LOGICAL 0x0000040
|
||||
|
||||
#define HT_IRQ_LOW_RQEOI_EDGE 0x0000000
|
||||
#define HT_IRQ_LOW_RQEOI_LEVEL 0x0000020
|
||||
|
||||
|
||||
#define HT_IRQ_LOW_MT_FIXED 0x0000000
|
||||
#define HT_IRQ_LOW_MT_ARBITRATED 0x0000004
|
||||
#define HT_IRQ_LOW_MT_SMI 0x0000008
|
||||
#define HT_IRQ_LOW_MT_NMI 0x000000c
|
||||
#define HT_IRQ_LOW_MT_INIT 0x0000010
|
||||
#define HT_IRQ_LOW_MT_STARTUP 0x0000014
|
||||
#define HT_IRQ_LOW_MT_EXTINT 0x0000018
|
||||
#define HT_IRQ_LOW_MT_LINT1 0x000008c
|
||||
#define HT_IRQ_LOW_MT_LINT0 0x0000098
|
||||
|
||||
#define HT_IRQ_LOW_IRQ_MASKED 0x0000001
|
||||
|
||||
|
||||
#define HT_IRQ_HIGH_DEST_ID_SHIFT 0
|
||||
#define HT_IRQ_HIGH_DEST_ID_MASK 0x00ffffff
|
||||
#define HT_IRQ_HIGH_DEST_ID(v) ((((v) >> 8) << HT_IRQ_HIGH_DEST_ID_SHIFT) & HT_IRQ_HIGH_DEST_ID_MASK)
|
||||
|
||||
#endif /* ASM_HYPERTRANSPORT_H */
|
||||
|
|
@ -681,6 +681,23 @@ extern int msi_register(struct msi_ops *ops);
|
|||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_HT_IRQ
|
||||
/* Helper functions.. */
|
||||
void write_ht_irq_low(unsigned int irq, u32 data);
|
||||
void write_ht_irq_high(unsigned int irq, u32 data);
|
||||
u32 read_ht_irq_low(unsigned int irq);
|
||||
u32 read_ht_irq_high(unsigned int irq);
|
||||
void mask_ht_irq(unsigned int irq);
|
||||
void unmask_ht_irq(unsigned int irq);
|
||||
|
||||
/* The functions a driver should call */
|
||||
int ht_create_irq(struct pci_dev *dev, int idx);
|
||||
void ht_destroy_irq(unsigned int irq);
|
||||
|
||||
/* The arch hook for getting things started */
|
||||
int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev);
|
||||
#endif /* CONFIG_HT_IRQ */
|
||||
|
||||
extern void pci_block_user_cfg_access(struct pci_dev *dev);
|
||||
extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue