i2c: tegra: Maintain CPU endianness
Support CPU BE mode by adding endianness conversion for memcpy interactions. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -286,6 +286,7 @@ static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)
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if (rx_fifo_avail > 0 && buf_remaining > 0) {
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if (rx_fifo_avail > 0 && buf_remaining > 0) {
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BUG_ON(buf_remaining > 3);
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BUG_ON(buf_remaining > 3);
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val = i2c_readl(i2c_dev, I2C_RX_FIFO);
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val = i2c_readl(i2c_dev, I2C_RX_FIFO);
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val = cpu_to_le32(val);
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memcpy(buf, &val, buf_remaining);
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memcpy(buf, &val, buf_remaining);
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buf_remaining = 0;
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buf_remaining = 0;
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rx_fifo_avail--;
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rx_fifo_avail--;
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@ -344,6 +345,7 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
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if (tx_fifo_avail > 0 && buf_remaining > 0) {
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if (tx_fifo_avail > 0 && buf_remaining > 0) {
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BUG_ON(buf_remaining > 3);
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BUG_ON(buf_remaining > 3);
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memcpy(&val, buf, buf_remaining);
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memcpy(&val, buf, buf_remaining);
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val = le32_to_cpu(val);
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/* Again update before writing to FIFO to make sure isr sees. */
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/* Again update before writing to FIFO to make sure isr sees. */
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i2c_dev->msg_buf_remaining = 0;
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i2c_dev->msg_buf_remaining = 0;
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