powerpc/86xx: Add power management support for MPC8610HPCD boards
This patch adds needed nodes and properties to support suspend/resume on the MPC8610HPCD boards. There is a dedicated switch (SW9) that is used to wake up the boards. By default the SW9 button is routed to IRQ8, but could be re-routed (via PIXIS) to sreset. With 'no_console_suspend' kernel command line argument specified, the board is also able to wakeup upon serial port input. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> [dts] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>hifive-unleashed-5.1
Anton Vorontsov
Kumar Gala
parent
3cfee0aaa1
commit
8c68e2f788
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@ -20,12 +20,16 @@ Required properities:
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- compatible : should be "fsl,fpga-pixis".
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- reg : should contain the address and the length of the FPPGA register
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set.
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- interrupt-parent: should specify phandle for the interrupt controller.
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- interrupts : should specify event (wakeup) IRQ.
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Example (MPC8610HPCD):
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board-control@e8000000 {
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compatible = "fsl,fpga-pixis";
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reg = <0xe8000000 32>;
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interrupt-parent = <&mpic>;
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interrupts = <8 8>;
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};
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* Freescale BCSR GPIO banks
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@ -35,6 +35,8 @@
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i-cache-line-size = <32>;
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d-cache-size = <32768>; // L1
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i-cache-size = <32768>; // L1
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sleep = <&pmc 0x00008000 0 // core
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&pmc 0x00004000 0>; // timebase
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timebase-frequency = <0>; // From uboot
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bus-frequency = <0>; // From uboot
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clock-frequency = <0>; // From uboot
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@ -60,6 +62,7 @@
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5 0 0xe8480000 0x00008000
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6 0 0xe84c0000 0x00008000
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3 0 0xe8000000 0x00000020>;
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sleep = <&pmc 0x08000000 0>;
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flash@0,0 {
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compatible = "cfi-flash";
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@ -105,6 +108,8 @@
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compatible = "fsl,fpga-pixis";
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reg = <3 0 0x20>;
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ranges = <0 3 0 0x20>;
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interrupt-parent = <&mpic>;
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interrupts = <8 8>;
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sdcsr_pio: gpio-controller@a {
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#gpio-cells = <2>;
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@ -163,6 +168,7 @@
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reg = <0x3100 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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sleep = <&pmc 0x00000004 0>;
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dfsrr;
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};
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@ -174,6 +180,7 @@
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clock-frequency = <0>;
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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sleep = <&pmc 0x00000002 0>;
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};
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serial1: serial@4600 {
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@ -184,6 +191,7 @@
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clock-frequency = <0>;
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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sleep = <&pmc 0x00000008 0>;
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};
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spi@7000 {
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@ -196,6 +204,7 @@
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interrupt-parent = <&mpic>;
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mode = "cpu";
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gpios = <&sdcsr_pio 7 0>;
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sleep = <&pmc 0x00000800 0>;
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mmc-slot@0 {
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compatible = "fsl,mpc8610hpcd-mmc-slot",
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@ -213,6 +222,7 @@
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reg = <0x2c000 100>;
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interrupts = <72 2>;
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interrupt-parent = <&mpic>;
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sleep = <&pmc 0x04000000 0>;
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};
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mpic: interrupt-controller@40000 {
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@ -241,9 +251,18 @@
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};
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global-utilities@e0000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8610-guts";
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reg = <0xe0000 0x1000>;
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ranges = <0 0xe0000 0x1000>;
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fsl,has-rstcr;
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pmc: power@70 {
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compatible = "fsl,mpc8610-pmc",
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"fsl,mpc8641d-pmc";
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reg = <0x70 0x20>;
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};
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};
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wdt@e4000 {
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@ -262,6 +281,7 @@
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fsl,playback-dma = <&dma00>;
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fsl,capture-dma = <&dma01>;
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fsl,fifo-depth = <8>;
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sleep = <&pmc 0 0x08000000>;
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};
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ssi@16100 {
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@ -271,6 +291,7 @@
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interrupt-parent = <&mpic>;
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interrupts = <63 2>;
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fsl,fifo-depth = <8>;
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sleep = <&pmc 0 0x04000000>;
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};
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dma@21300 {
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@ -280,6 +301,7 @@
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cell-index = <0>;
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reg = <0x21300 0x4>; /* DMA general status register */
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ranges = <0x0 0x21100 0x200>;
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sleep = <&pmc 0x00000400 0>;
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dma00: dma-channel@0 {
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compatible = "fsl,mpc8610-dma-channel",
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@ -322,6 +344,7 @@
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cell-index = <1>;
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reg = <0xc300 0x4>; /* DMA general status register */
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ranges = <0x0 0xc100 0x200>;
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sleep = <&pmc 0x00000200 0>;
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dma-channel@0 {
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compatible = "fsl,mpc8610-dma-channel",
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@ -369,6 +392,7 @@
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bus-range = <0 0>;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>;
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sleep = <&pmc 0x80000000 0>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <24 2>;
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@ -398,6 +422,7 @@
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bus-range = <1 3>;
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ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
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sleep = <&pmc 0x40000000 0>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <26 2>;
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@ -474,6 +499,7 @@
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0x0000 0 0 4 &mpic 7 1>;
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interrupt-parent = <&mpic>;
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interrupts = <25 2>;
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sleep = <&pmc 0x20000000 0>;
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clock-frequency = <33333333>;
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};
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};
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@ -19,6 +19,7 @@
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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@ -41,10 +42,46 @@
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#include "mpc86xx.h"
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static struct device_node *pixis_node;
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static unsigned char *pixis_bdcfg0, *pixis_arch;
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#ifdef CONFIG_SUSPEND
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static irqreturn_t mpc8610_sw9_irq(int irq, void *data)
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{
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pr_debug("%s: PIXIS' event (sw9/wakeup) IRQ handled\n", __func__);
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return IRQ_HANDLED;
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}
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static void __init mpc8610_suspend_init(void)
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{
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int irq;
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int ret;
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if (!pixis_node)
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return;
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irq = irq_of_parse_and_map(pixis_node, 0);
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if (!irq) {
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pr_err("%s: can't map pixis event IRQ.\n", __func__);
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return;
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}
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ret = request_irq(irq, mpc8610_sw9_irq, 0, "sw9/wakeup", NULL);
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if (ret) {
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pr_err("%s: can't request pixis event IRQ: %d\n",
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__func__, ret);
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irq_dispose_mapping(irq);
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}
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enable_irq_wake(irq);
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}
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#else
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static inline void mpc8610_suspend_init(void) { }
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#endif /* CONFIG_SUSPEND */
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static struct of_device_id __initdata mpc8610_ids[] = {
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{ .compatible = "fsl,mpc8610-immr", },
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{ .compatible = "fsl,mpc8610-guts", },
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{ .compatible = "simple-bus", },
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{ .compatible = "gianfar", },
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{}
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@ -55,6 +92,9 @@ static int __init mpc8610_declare_of_platform_devices(void)
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/* Firstly, register PIXIS GPIOs. */
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simple_gpiochip_init("fsl,fpga-pixis-gpio-bank");
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/* Enable wakeup on PIXIS' event IRQ. */
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mpc8610_suspend_init();
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/* Without this call, the SSI device driver won't get probed. */
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of_platform_bus_probe(NULL, mpc8610_ids, NULL);
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@ -250,10 +290,10 @@ static void __init mpc86xx_hpcd_setup_arch(void)
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diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port;
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#endif
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np = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis");
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if (np) {
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of_address_to_resource(np, 0, &r);
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of_node_put(np);
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pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis");
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if (pixis_node) {
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of_address_to_resource(pixis_node, 0, &r);
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of_node_put(pixis_node);
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pixis = ioremap(r.start, 32);
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if (!pixis) {
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printk(KERN_ERR "Err: can't map FPGA cfg register!\n");
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