mfd: imx6dl: Add LDB/IPU DI mux control register definitions for iomuxc gpr
This patch adds macros to define masks and bits for imx6dl LDB/IPU DI mux control registers. Signed-off-by: Liu Ying <victor.liu@nxp.com>5.4-rM2-2.2.x-imx-squashed
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9528afb199
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8cb7f0e456
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@ -467,6 +467,16 @@
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#define IMX6SX_GPR12_PCIE_RX_EQ_MASK (0x7 << 0)
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#define IMX6SX_GPR12_PCIE_RX_EQ_2 (0x2 << 0)
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/* For imx6dl iomux gpr register field definitions */
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#define IMX6DL_GPR3_LVDS1_MUX_CTL_MASK (0x3 << 8)
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#define IMX6DL_GPR3_LVDS1_MUX_CTL_IPU1_DI0 (0x0 << 8)
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#define IMX6DL_GPR3_LVDS1_MUX_CTL_IPU1_DI1 (0x1 << 8)
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#define IMX6DL_GPR3_LVDS1_MUX_CTL_LCDIF (0x2 << 8)
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#define IMX6DL_GPR3_LVDS0_MUX_CTL_MASK (0x3 << 6)
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#define IMX6DL_GPR3_LVDS0_MUX_CTL_IPU1_DI0 (0x0 << 6)
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#define IMX6DL_GPR3_LVDS0_MUX_CTL_IPU1_DI1 (0x1 << 6)
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#define IMX6DL_GPR3_LVDS0_MUX_CTL_LCDIF (0x2 << 6)
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/* For imx6ul iomux gpr register field define */
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#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17)
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#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18)
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