1
0
Fork 0

mfd: imx6dl: Add LDB/IPU DI mux control register definitions for iomuxc gpr

This patch adds macros to define masks and bits for imx6dl
LDB/IPU DI mux control registers.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Liu Ying 2019-08-22 14:24:06 +08:00 committed by Dong Aisheng
parent 9528afb199
commit 8cb7f0e456
1 changed files with 10 additions and 0 deletions

View File

@ -467,6 +467,16 @@
#define IMX6SX_GPR12_PCIE_RX_EQ_MASK (0x7 << 0)
#define IMX6SX_GPR12_PCIE_RX_EQ_2 (0x2 << 0)
/* For imx6dl iomux gpr register field definitions */
#define IMX6DL_GPR3_LVDS1_MUX_CTL_MASK (0x3 << 8)
#define IMX6DL_GPR3_LVDS1_MUX_CTL_IPU1_DI0 (0x0 << 8)
#define IMX6DL_GPR3_LVDS1_MUX_CTL_IPU1_DI1 (0x1 << 8)
#define IMX6DL_GPR3_LVDS1_MUX_CTL_LCDIF (0x2 << 8)
#define IMX6DL_GPR3_LVDS0_MUX_CTL_MASK (0x3 << 6)
#define IMX6DL_GPR3_LVDS0_MUX_CTL_IPU1_DI0 (0x0 << 6)
#define IMX6DL_GPR3_LVDS0_MUX_CTL_IPU1_DI1 (0x1 << 6)
#define IMX6DL_GPR3_LVDS0_MUX_CTL_LCDIF (0x2 << 6)
/* For imx6ul iomux gpr register field define */
#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17)
#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18)