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staging: mt7621-pci: add comment clarifying inverted reset lines 

To avoid people reading this code being very confused, add a comment
clarifying the need for invert resets on some chip revisions.

Suggested-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Sergio Paracuellos 2018-11-29 19:39:55 +01:00 committed by Greg Kroah-Hartman
parent f9bb840907
commit 8cfb722bd5
1 changed files with 4 additions and 0 deletions
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4
drivers/staging/mt7621-pci/pci-mt7621.c
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@ -589,6 +589,10 @@ static int mt7621_pcie_init_port(struct mt7621_pcie_port *port)
u32 slot = port->slot;
u32 val = 0;
/*
* Any MT7621 Ralink pcie controller that doesn't have 0x0101 at
* the end of the chip_id has inverted PCI resets.
*/
mt7621_reset_port(port);
val = read_config(pcie, slot, PCIE_FTS_NUM);