x86: cleanup PAT cpu validation
Move the scattered checks for PAT support to a single function. Its moved to addon_cpuid_features.c as this file is shared between 32 and 64 bit. Remove the manipulation of the PAT feature bit and just disable PAT in the PAT layer, based on the PAT bit provided by the CPU and the current CPU version/model white list. Change the boot CPU check so it works on Voyager somewhere in the future as well :) Also panic, when a secondary has PAT disabled but the primary one has alrady switched to PAT. We have no way to undo that. The white list is kept for now to ensure that we can rely on known to work CPU types and concentrate on the software induced problems instead of fighthing CPU erratas and subtle wreckage caused by not yet verified CPUs. Once the PAT code has stabilized enough, we can remove the white list and open the can of worms. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>hifive-unleashed-5.1
Thomas Gleixner
Ingo Molnar
parent
cb3f43b22b
commit
8d4a430085
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@ -6,6 +6,7 @@
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#include <linux/cpu.h>
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#include <asm/pat.h>
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#include <asm/processor.h>
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struct cpuid_bit {
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@ -48,3 +49,23 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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set_cpu_cap(c, cb->feature);
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}
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}
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#ifdef CONFIG_X86_PAT
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void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
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{
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switch (c->x86_vendor) {
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case X86_VENDOR_AMD:
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if (c->x86 >= 0xf && c->x86 <= 0x11)
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return;
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break;
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case X86_VENDOR_INTEL:
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if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
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return;
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break;
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}
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pat_disable(cpu_has_pat ?
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"PAT disabled. Not yet verified on this CPU type." :
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"PAT not supported by CPU.");
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}
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#endif
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@ -12,6 +12,7 @@
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#include <asm/mmu_context.h>
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#include <asm/mtrr.h>
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#include <asm/mce.h>
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#include <asm/pat.h>
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#ifdef CONFIG_X86_LOCAL_APIC
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#include <asm/mpspec.h>
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#include <asm/apic.h>
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@ -308,19 +309,6 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
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}
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clear_cpu_cap(c, X86_FEATURE_PAT);
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switch (c->x86_vendor) {
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case X86_VENDOR_AMD:
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if (c->x86 >= 0xf && c->x86 <= 0x11)
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set_cpu_cap(c, X86_FEATURE_PAT);
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break;
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case X86_VENDOR_INTEL:
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if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
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set_cpu_cap(c, X86_FEATURE_PAT);
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break;
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}
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}
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/*
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@ -409,18 +397,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
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init_scattered_cpuid_features(c);
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}
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clear_cpu_cap(c, X86_FEATURE_PAT);
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switch (c->x86_vendor) {
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case X86_VENDOR_AMD:
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if (c->x86 >= 0xf && c->x86 <= 0x11)
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set_cpu_cap(c, X86_FEATURE_PAT);
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break;
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case X86_VENDOR_INTEL:
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if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
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set_cpu_cap(c, X86_FEATURE_PAT);
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break;
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}
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}
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static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
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@ -651,6 +627,7 @@ void __init early_cpu_init(void)
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cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
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early_cpu_detect();
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validate_pat_support(&boot_cpu_data);
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}
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/* Make sure %fs is initialized properly in idle threads */
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@ -70,6 +70,7 @@
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#include <asm/ds.h>
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#include <asm/topology.h>
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#include <asm/trampoline.h>
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#include <asm/pat.h>
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#include <mach_apic.h>
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#ifdef CONFIG_PARAVIRT
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@ -1063,25 +1064,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
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if (c->extended_cpuid_level >= 0x80000007)
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c->x86_power = cpuid_edx(0x80000007);
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clear_cpu_cap(c, X86_FEATURE_PAT);
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switch (c->x86_vendor) {
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case X86_VENDOR_AMD:
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early_init_amd(c);
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if (c->x86 >= 0xf && c->x86 <= 0x11)
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set_cpu_cap(c, X86_FEATURE_PAT);
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break;
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case X86_VENDOR_INTEL:
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early_init_intel(c);
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if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
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set_cpu_cap(c, X86_FEATURE_PAT);
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break;
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case X86_VENDOR_CENTAUR:
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early_init_centaur(c);
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break;
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}
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validate_pat_support(c);
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}
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/*
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@ -25,31 +25,24 @@
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#include <asm/mtrr.h>
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#include <asm/io.h>
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int pat_wc_enabled = 1;
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#ifdef CONFIG_X86_PAT
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int __read_mostly pat_wc_enabled = 1;
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static u64 __read_mostly boot_pat_state;
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void __init pat_disable(char *reason)
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{
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pat_wc_enabled = 0;
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printk(KERN_INFO "%s\n", reason);
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}
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static int nopat(char *str)
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{
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pat_wc_enabled = 0;
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printk(KERN_INFO "x86: PAT support disabled.\n");
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pat_disable("PAT support disabled.");
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return 0;
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}
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early_param("nopat", nopat);
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#endif
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static int pat_known_cpu(void)
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{
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if (!pat_wc_enabled)
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return 0;
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if (cpu_has_pat)
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return 1;
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pat_wc_enabled = 0;
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printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
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return 0;
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}
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static u64 __read_mostly boot_pat_state;
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enum {
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PAT_UC = 0, /* uncached */
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@ -66,17 +59,19 @@ void pat_init(void)
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{
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u64 pat;
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#ifndef CONFIG_X86_PAT
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nopat(NULL);
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#endif
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/* Boot CPU enables PAT based on CPU feature */
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if (!smp_processor_id() && !pat_known_cpu())
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if (!pat_wc_enabled)
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return;
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/* APs enable PAT iff boot CPU has enabled it before */
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if (smp_processor_id() && !pat_wc_enabled)
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return;
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/* Paranoia check. */
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if (!cpu_has_pat) {
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printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
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/*
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* Panic if this happens on the secondary CPU, and we
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* switched to PAT on the boot CPU. We have no way to
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* undo PAT.
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*/
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BUG_ON(boot_pat_state);
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}
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/* Set PWT to Write-Combining. All other bits stay the same */
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/*
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@ -95,9 +90,8 @@ void pat_init(void)
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PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
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/* Boot CPU check */
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if (!smp_processor_id()) {
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if (!boot_pat_state)
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rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
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}
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wrmsrl(MSR_IA32_CR_PAT, pat);
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printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
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@ -4,7 +4,13 @@
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#include <linux/types.h>
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#ifdef CONFIG_X86_PAT
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extern int pat_wc_enabled;
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extern void validate_pat_support(struct cpuinfo_x86 *c);
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#else
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static const int pat_wc_enabled = 0;
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static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
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#endif
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extern void pat_init(void);
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@ -12,5 +18,7 @@ extern int reserve_memtype(u64 start, u64 end,
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unsigned long req_type, unsigned long *ret_type);
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extern int free_memtype(u64 start, u64 end);
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extern void pat_disable(char *reason);
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#endif
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