x86, acpi: Reorganize code to avoid forward declaration in boot.c
Reorganize code to avoid forward declaration in boot.c, no function changes. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Len Brown <len.brown@intel.com> Cc: Pavel Machek <pavel@ucw.cz> Link: http://lkml.kernel.org/r/1402302011-23642-5-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>hifive-unleashed-5.1
parent
a491cc902c
commit
8d7cdcb9d8
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@ -345,10 +345,123 @@ acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long e
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#endif /*CONFIG_X86_LOCAL_APIC */
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#endif /*CONFIG_X86_LOCAL_APIC */
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#ifdef CONFIG_X86_IO_APIC
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#ifdef CONFIG_X86_IO_APIC
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static void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
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#define MP_ISA_BUS 0
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u32 gsi);
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static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
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u32 gsi)
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{
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int ioapic;
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int pin;
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struct mpc_intsrc mp_irq;
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/*
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* Convert 'gsi' to 'ioapic.pin'.
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*/
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ioapic = mp_find_ioapic(gsi);
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if (ioapic < 0)
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return;
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pin = mp_find_ioapic_pin(ioapic, gsi);
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/*
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* TBD: This check is for faulty timer entries, where the override
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* erroneously sets the trigger to level, resulting in a HUGE
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* increase of timer interrupts!
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*/
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if ((bus_irq == 0) && (trigger == 3))
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trigger = 1;
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mp_irq.type = MP_INTSRC;
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mp_irq.irqtype = mp_INT;
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mp_irq.irqflag = (trigger << 2) | polarity;
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mp_irq.srcbus = MP_ISA_BUS;
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mp_irq.srcbusirq = bus_irq; /* IRQ */
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mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
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mp_irq.dstirq = pin; /* INTIN# */
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mp_save_irq(&mp_irq);
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isa_irq_to_gsi[bus_irq] = gsi;
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}
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static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
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int polarity)
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{
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#ifdef CONFIG_X86_MPPARSE
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struct mpc_intsrc mp_irq;
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struct pci_dev *pdev;
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unsigned char number;
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unsigned int devfn;
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int ioapic;
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u8 pin;
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if (!acpi_ioapic)
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return 0;
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if (!dev || !dev_is_pci(dev))
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return 0;
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pdev = to_pci_dev(dev);
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number = pdev->bus->number;
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devfn = pdev->devfn;
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pin = pdev->pin;
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/* print the entry should happen on mptable identically */
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mp_irq.type = MP_INTSRC;
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mp_irq.irqtype = mp_INT;
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mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
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(polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
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mp_irq.srcbus = number;
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mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
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ioapic = mp_find_ioapic(gsi);
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mp_irq.dstapic = mpc_ioapic_id(ioapic);
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mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
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mp_save_irq(&mp_irq);
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#endif
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return 0;
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}
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static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
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static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
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int polarity);
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int polarity)
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{
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int ioapic;
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int ioapic_pin;
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struct io_apic_irq_attr irq_attr;
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int ret;
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if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
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return gsi;
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/* Don't set up the ACPI SCI because it's already set up */
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if (acpi_gbl_FADT.sci_interrupt == gsi)
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return gsi;
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ioapic = mp_find_ioapic(gsi);
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if (ioapic < 0) {
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printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
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return gsi;
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}
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ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
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if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
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printk(KERN_ERR "Invalid reference to IOAPIC pin "
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"%d-%d\n", mpc_ioapic_id(ioapic),
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ioapic_pin);
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return gsi;
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}
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if (enable_update_mptable)
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mp_config_acpi_gsi(dev, gsi, trigger, polarity);
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set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin,
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trigger == ACPI_EDGE_SENSITIVE ? 0 : 1,
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polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
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ret = io_apic_set_pci_routing(dev, gsi_to_irq(gsi), &irq_attr);
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if (ret < 0)
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gsi = INT_MIN;
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return gsi;
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}
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static int __init
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static int __init
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acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
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acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
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@ -905,44 +1018,6 @@ static int __init acpi_parse_madt_lapic_entries(void)
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#endif /* CONFIG_X86_LOCAL_APIC */
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#endif /* CONFIG_X86_LOCAL_APIC */
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#ifdef CONFIG_X86_IO_APIC
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#ifdef CONFIG_X86_IO_APIC
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#define MP_ISA_BUS 0
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static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
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u32 gsi)
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{
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int ioapic;
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int pin;
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struct mpc_intsrc mp_irq;
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/*
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* Convert 'gsi' to 'ioapic.pin'.
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*/
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ioapic = mp_find_ioapic(gsi);
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if (ioapic < 0)
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return;
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pin = mp_find_ioapic_pin(ioapic, gsi);
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/*
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* TBD: This check is for faulty timer entries, where the override
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* erroneously sets the trigger to level, resulting in a HUGE
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* increase of timer interrupts!
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*/
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if ((bus_irq == 0) && (trigger == 3))
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trigger = 1;
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mp_irq.type = MP_INTSRC;
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mp_irq.irqtype = mp_INT;
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mp_irq.irqflag = (trigger << 2) | polarity;
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mp_irq.srcbus = MP_ISA_BUS;
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mp_irq.srcbusirq = bus_irq; /* IRQ */
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mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
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mp_irq.dstirq = pin; /* INTIN# */
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mp_save_irq(&mp_irq);
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isa_irq_to_gsi[bus_irq] = gsi;
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}
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static void __init mp_config_acpi_legacy_irqs(void)
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static void __init mp_config_acpi_legacy_irqs(void)
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{
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{
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int i;
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int i;
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@ -1009,85 +1084,6 @@ static void __init mp_config_acpi_legacy_irqs(void)
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}
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}
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}
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}
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static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
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int polarity)
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{
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#ifdef CONFIG_X86_MPPARSE
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struct mpc_intsrc mp_irq;
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struct pci_dev *pdev;
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unsigned char number;
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unsigned int devfn;
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int ioapic;
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u8 pin;
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if (!acpi_ioapic)
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return 0;
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if (!dev || !dev_is_pci(dev))
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return 0;
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pdev = to_pci_dev(dev);
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number = pdev->bus->number;
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devfn = pdev->devfn;
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pin = pdev->pin;
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/* print the entry should happen on mptable identically */
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mp_irq.type = MP_INTSRC;
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mp_irq.irqtype = mp_INT;
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mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
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(polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
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mp_irq.srcbus = number;
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mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
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ioapic = mp_find_ioapic(gsi);
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mp_irq.dstapic = mpc_ioapic_id(ioapic);
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mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
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mp_save_irq(&mp_irq);
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#endif
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return 0;
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}
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static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
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int polarity)
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{
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int ioapic;
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int ioapic_pin;
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struct io_apic_irq_attr irq_attr;
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int ret;
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if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
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return gsi;
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/* Don't set up the ACPI SCI because it's already set up */
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if (acpi_gbl_FADT.sci_interrupt == gsi)
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return gsi;
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ioapic = mp_find_ioapic(gsi);
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if (ioapic < 0) {
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printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
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return gsi;
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}
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ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
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if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
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printk(KERN_ERR "Invalid reference to IOAPIC pin "
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"%d-%d\n", mpc_ioapic_id(ioapic),
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ioapic_pin);
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return gsi;
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}
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if (enable_update_mptable)
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mp_config_acpi_gsi(dev, gsi, trigger, polarity);
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set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin,
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trigger == ACPI_EDGE_SENSITIVE ? 0 : 1,
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polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
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ret = io_apic_set_pci_routing(dev, gsi_to_irq(gsi), &irq_attr);
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if (ret < 0)
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gsi = INT_MIN;
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return gsi;
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}
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/*
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/*
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* Parse IOAPIC related entries in MADT
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* Parse IOAPIC related entries in MADT
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* returns 0 on success, < 0 on error
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* returns 0 on success, < 0 on error
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