Merge branch 'tmp'
This commit is contained in:
commit
8dd2e3bd57
|
@ -446,10 +446,61 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
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writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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}
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static void ahci_phy_reset(struct ata_port *ap)
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static int ahci_stop_engine(struct ata_port *ap)
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{
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void __iomem *mmio = ap->host_set->mmio_base;
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void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
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int work;
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u32 tmp;
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tmp = readl(port_mmio + PORT_CMD);
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tmp &= ~PORT_CMD_START;
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writel(tmp, port_mmio + PORT_CMD);
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/* wait for engine to stop. TODO: this could be
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* as long as 500 msec
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*/
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work = 1000;
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while (work-- > 0) {
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tmp = readl(port_mmio + PORT_CMD);
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if ((tmp & PORT_CMD_LIST_ON) == 0)
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return 0;
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udelay(10);
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}
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return -EIO;
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}
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static void ahci_start_engine(struct ata_port *ap)
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{
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void __iomem *mmio = ap->host_set->mmio_base;
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void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
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u32 tmp;
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tmp = readl(port_mmio + PORT_CMD);
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tmp |= PORT_CMD_START;
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writel(tmp, port_mmio + PORT_CMD);
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readl(port_mmio + PORT_CMD); /* flush */
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}
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static unsigned int ahci_dev_classify(struct ata_port *ap)
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{
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void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
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struct ata_taskfile tf;
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u32 tmp;
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tmp = readl(port_mmio + PORT_SIG);
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tf.lbah = (tmp >> 24) & 0xff;
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tf.lbam = (tmp >> 16) & 0xff;
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tf.lbal = (tmp >> 8) & 0xff;
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tf.nsect = (tmp) & 0xff;
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return ata_dev_classify(&tf);
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}
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static void ahci_phy_reset(struct ata_port *ap)
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{
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void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
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struct ata_device *dev = &ap->device[0];
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u32 new_tmp, tmp;
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@ -458,13 +509,7 @@ static void ahci_phy_reset(struct ata_port *ap)
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if (ap->flags & ATA_FLAG_PORT_DISABLED)
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return;
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tmp = readl(port_mmio + PORT_SIG);
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tf.lbah = (tmp >> 24) & 0xff;
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tf.lbam = (tmp >> 16) & 0xff;
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tf.lbal = (tmp >> 8) & 0xff;
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tf.nsect = (tmp) & 0xff;
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dev->class = ata_dev_classify(&tf);
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dev->class = ahci_dev_classify(ap);
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if (!ata_dev_present(dev)) {
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ata_port_disable(ap);
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return;
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@ -572,7 +617,6 @@ static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
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void __iomem *mmio = ap->host_set->mmio_base;
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void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
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u32 tmp;
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int work;
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if ((ap->device[0].class != ATA_DEV_ATAPI) ||
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((irq_stat & PORT_IRQ_TF_ERR) == 0))
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@ -588,20 +632,7 @@ static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
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readl(port_mmio + PORT_SCR_ERR));
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/* stop DMA */
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tmp = readl(port_mmio + PORT_CMD);
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tmp &= ~PORT_CMD_START;
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writel(tmp, port_mmio + PORT_CMD);
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/* wait for engine to stop. TODO: this could be
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* as long as 500 msec
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*/
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work = 1000;
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while (work-- > 0) {
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tmp = readl(port_mmio + PORT_CMD);
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if ((tmp & PORT_CMD_LIST_ON) == 0)
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break;
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udelay(10);
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}
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ahci_stop_engine(ap);
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/* clear SATA phy error, if any */
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tmp = readl(port_mmio + PORT_SCR_ERR);
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@ -620,10 +651,7 @@ static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
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}
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/* re-start DMA */
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tmp = readl(port_mmio + PORT_CMD);
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tmp |= PORT_CMD_START;
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writel(tmp, port_mmio + PORT_CMD);
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readl(port_mmio + PORT_CMD); /* flush */
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ahci_start_engine(ap);
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}
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static void ahci_eng_timeout(struct ata_port *ap)
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@ -101,9 +101,11 @@ enum {
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ICH5_PCS = 0x92, /* port control and status */
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PIIX_SCC = 0x0A, /* sub-class code register */
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PIIX_FLAG_AHCI = (1 << 28), /* AHCI possible */
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PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */
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PIIX_FLAG_COMBINED = (1 << 30), /* combined mode possible */
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PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */
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PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */
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PIIX_FLAG_COMBINED = (1 << 29), /* combined mode possible */
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/* ICH6/7 use different scheme for map value */
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PIIX_FLAG_COMBINED_ICH6 = PIIX_FLAG_COMBINED | (1 << 30),
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/* combined mode. if set, PATA is channel 0.
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* if clear, PATA is channel 1.
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@ -297,8 +299,8 @@ static struct ata_port_info piix_port_info[] = {
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{
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.sht = &piix_sht,
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.host_flags = ATA_FLAG_SATA | ATA_FLAG_SRST |
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PIIX_FLAG_COMBINED | PIIX_FLAG_CHECKINTR |
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ATA_FLAG_SLAVE_POSS,
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PIIX_FLAG_COMBINED_ICH6 |
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PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 */
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@ -309,8 +311,9 @@ static struct ata_port_info piix_port_info[] = {
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{
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.sht = &piix_sht,
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.host_flags = ATA_FLAG_SATA | ATA_FLAG_SRST |
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PIIX_FLAG_COMBINED | PIIX_FLAG_CHECKINTR |
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ATA_FLAG_SLAVE_POSS | PIIX_FLAG_AHCI,
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PIIX_FLAG_COMBINED_ICH6 |
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PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS |
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PIIX_FLAG_AHCI,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 */
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@ -680,6 +683,7 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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struct ata_port_info *port_info[2];
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unsigned int combined = 0;
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unsigned int pata_chan = 0, sata_chan = 0;
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unsigned long host_flags;
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if (!printed_version++)
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dev_printk(KERN_DEBUG, &pdev->dev,
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@ -692,7 +696,9 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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port_info[0] = &piix_port_info[ent->driver_data];
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port_info[1] = &piix_port_info[ent->driver_data];
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if (port_info[0]->host_flags & PIIX_FLAG_AHCI) {
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host_flags = port_info[0]->host_flags;
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if (host_flags & PIIX_FLAG_AHCI) {
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u8 tmp;
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pci_read_config_byte(pdev, PIIX_SCC, &tmp);
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if (tmp == PIIX_AHCI_DEVICE) {
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@ -702,16 +708,35 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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}
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if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) {
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if (host_flags & PIIX_FLAG_COMBINED) {
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u8 tmp;
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pci_read_config_byte(pdev, ICH5_PMR, &tmp);
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if (tmp & PIIX_COMB) {
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combined = 1;
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if (tmp & PIIX_COMB_PATA_P0)
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if (host_flags & PIIX_FLAG_COMBINED_ICH6) {
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switch (tmp) {
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case 0:
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break;
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case 1:
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combined = 1;
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sata_chan = 1;
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else
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break;
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case 2:
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combined = 1;
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pata_chan = 1;
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break;
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case 3:
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dev_printk(KERN_WARNING, &pdev->dev,
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"invalid MAP value %u\n", tmp);
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break;
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}
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} else {
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if (tmp & PIIX_COMB) {
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combined = 1;
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if (tmp & PIIX_COMB_PATA_P0)
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sata_chan = 1;
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else
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pata_chan = 1;
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}
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}
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}
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@ -721,7 +746,7 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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* MSI is disabled (and it is disabled, as we don't use
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* message-signalled interrupts currently).
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*/
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if (port_info[0]->host_flags & PIIX_FLAG_CHECKINTR)
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if (host_flags & PIIX_FLAG_CHECKINTR)
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pci_intx(pdev, 1);
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if (combined) {
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@ -1535,6 +1535,41 @@ void ata_port_probe(struct ata_port *ap)
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ap->flags &= ~ATA_FLAG_PORT_DISABLED;
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}
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/**
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* sata_print_link_status - Print SATA link status
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* @ap: SATA port to printk link status about
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*
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* This function prints link speed and status of a SATA link.
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*
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* LOCKING:
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* None.
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*/
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static void sata_print_link_status(struct ata_port *ap)
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{
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u32 sstatus, tmp;
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const char *speed;
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if (!ap->ops->scr_read)
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return;
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sstatus = scr_read(ap, SCR_STATUS);
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if (sata_dev_present(ap)) {
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tmp = (sstatus >> 4) & 0xf;
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if (tmp & (1 << 0))
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speed = "1.5";
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else if (tmp & (1 << 1))
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speed = "3.0";
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else
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speed = "<unknown>";
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printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
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ap->id, speed, sstatus);
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} else {
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printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
|
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ap->id, sstatus);
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}
|
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}
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|
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/**
|
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* __sata_phy_reset - Wake/reset a low-level SATA PHY
|
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* @ap: SATA port associated with target SATA PHY.
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@ -1569,27 +1604,14 @@ void __sata_phy_reset(struct ata_port *ap)
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break;
|
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} while (time_before(jiffies, timeout));
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|
||||
/* TODO: phy layer with polling, timeouts, etc. */
|
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sstatus = scr_read(ap, SCR_STATUS);
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if (sata_dev_present(ap)) {
|
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const char *speed;
|
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u32 tmp;
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/* print link status */
|
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sata_print_link_status(ap);
|
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|
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tmp = (sstatus >> 4) & 0xf;
|
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if (tmp & (1 << 0))
|
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speed = "1.5";
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else if (tmp & (1 << 1))
|
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speed = "3.0";
|
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else
|
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speed = "<unknown>";
|
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printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
|
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ap->id, speed, sstatus);
|
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/* TODO: phy layer with polling, timeouts, etc. */
|
||||
if (sata_dev_present(ap))
|
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ata_port_probe(ap);
|
||||
} else {
|
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printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
|
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ap->id, sstatus);
|
||||
else
|
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ata_port_disable(ap);
|
||||
}
|
||||
|
||||
if (ap->flags & ATA_FLAG_PORT_DISABLED)
|
||||
return;
|
||||
|
|
|
@ -985,9 +985,13 @@ static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc, const u8 *sc
|
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if (dev->flags & ATA_DFLAG_LBA) {
|
||||
tf->flags |= ATA_TFLAG_LBA;
|
||||
|
||||
if (dev->flags & ATA_DFLAG_LBA48) {
|
||||
if (n_block > (64 * 1024))
|
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goto invalid_fld;
|
||||
if (lba_28_ok(block, n_block)) {
|
||||
/* use LBA28 */
|
||||
tf->command = ATA_CMD_VERIFY;
|
||||
tf->device |= (block >> 24) & 0xf;
|
||||
} else if (lba_48_ok(block, n_block)) {
|
||||
if (!(dev->flags & ATA_DFLAG_LBA48))
|
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goto out_of_range;
|
||||
|
||||
/* use LBA48 */
|
||||
tf->flags |= ATA_TFLAG_LBA48;
|
||||
|
@ -998,15 +1002,9 @@ static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc, const u8 *sc
|
|||
tf->hob_lbah = (block >> 40) & 0xff;
|
||||
tf->hob_lbam = (block >> 32) & 0xff;
|
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tf->hob_lbal = (block >> 24) & 0xff;
|
||||
} else {
|
||||
if (n_block > 256)
|
||||
goto invalid_fld;
|
||||
|
||||
/* use LBA28 */
|
||||
tf->command = ATA_CMD_VERIFY;
|
||||
|
||||
tf->device |= (block >> 24) & 0xf;
|
||||
}
|
||||
} else
|
||||
/* request too large even for LBA48 */
|
||||
goto out_of_range;
|
||||
|
||||
tf->nsect = n_block & 0xff;
|
||||
|
||||
|
@ -1019,8 +1017,8 @@ static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc, const u8 *sc
|
|||
/* CHS */
|
||||
u32 sect, head, cyl, track;
|
||||
|
||||
if (n_block > 256)
|
||||
goto invalid_fld;
|
||||
if (!lba_28_ok(block, n_block))
|
||||
goto out_of_range;
|
||||
|
||||
/* Convert LBA to CHS */
|
||||
track = (u32)block / dev->sectors;
|
||||
|
@ -1139,9 +1137,11 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, const u8 *scsicm
|
|||
if (dev->flags & ATA_DFLAG_LBA) {
|
||||
tf->flags |= ATA_TFLAG_LBA;
|
||||
|
||||
if (dev->flags & ATA_DFLAG_LBA48) {
|
||||
/* The request -may- be too large for LBA48. */
|
||||
if ((block >> 48) || (n_block > 65536))
|
||||
if (lba_28_ok(block, n_block)) {
|
||||
/* use LBA28 */
|
||||
tf->device |= (block >> 24) & 0xf;
|
||||
} else if (lba_48_ok(block, n_block)) {
|
||||
if (!(dev->flags & ATA_DFLAG_LBA48))
|
||||
goto out_of_range;
|
||||
|
||||
/* use LBA48 */
|
||||
|
@ -1152,15 +1152,9 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, const u8 *scsicm
|
|||
tf->hob_lbah = (block >> 40) & 0xff;
|
||||
tf->hob_lbam = (block >> 32) & 0xff;
|
||||
tf->hob_lbal = (block >> 24) & 0xff;
|
||||
} else {
|
||||
/* use LBA28 */
|
||||
|
||||
/* The request -may- be too large for LBA28. */
|
||||
if ((block >> 28) || (n_block > 256))
|
||||
goto out_of_range;
|
||||
|
||||
tf->device |= (block >> 24) & 0xf;
|
||||
}
|
||||
} else
|
||||
/* request too large even for LBA48 */
|
||||
goto out_of_range;
|
||||
|
||||
if (unlikely(ata_rwcmd_protocol(qc) < 0))
|
||||
goto invalid_fld;
|
||||
|
@ -1178,7 +1172,7 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, const u8 *scsicm
|
|||
u32 sect, head, cyl, track;
|
||||
|
||||
/* The request -may- be too large for CHS addressing. */
|
||||
if ((block >> 28) || (n_block > 256))
|
||||
if (!lba_28_ok(block, n_block))
|
||||
goto out_of_range;
|
||||
|
||||
if (unlikely(ata_rwcmd_protocol(qc) < 0))
|
||||
|
|
|
@ -313,4 +313,16 @@ static inline int ata_ok(u8 status)
|
|||
== ATA_DRDY);
|
||||
}
|
||||
|
||||
static inline int lba_28_ok(u64 block, u32 n_block)
|
||||
{
|
||||
/* check the ending block number */
|
||||
return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
|
||||
}
|
||||
|
||||
static inline int lba_48_ok(u64 block, u32 n_block)
|
||||
{
|
||||
/* check the ending block number */
|
||||
return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
|
||||
}
|
||||
|
||||
#endif /* __LINUX_ATA_H__ */
|
||||
|
|
|
@ -35,7 +35,8 @@
|
|||
#include <linux/workqueue.h>
|
||||
|
||||
/*
|
||||
* compile-time options
|
||||
* compile-time options: to be removed as soon as all the drivers are
|
||||
* converted to the new debugging mechanism
|
||||
*/
|
||||
#undef ATA_DEBUG /* debugging output */
|
||||
#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
|
||||
|
@ -71,6 +72,38 @@
|
|||
}
|
||||
#endif
|
||||
|
||||
/* NEW: debug levels */
|
||||
#define HAVE_LIBATA_MSG 1
|
||||
|
||||
enum {
|
||||
ATA_MSG_DRV = 0x0001,
|
||||
ATA_MSG_INFO = 0x0002,
|
||||
ATA_MSG_PROBE = 0x0004,
|
||||
ATA_MSG_WARN = 0x0008,
|
||||
ATA_MSG_MALLOC = 0x0010,
|
||||
ATA_MSG_CTL = 0x0020,
|
||||
ATA_MSG_INTR = 0x0040,
|
||||
ATA_MSG_ERR = 0x0080,
|
||||
};
|
||||
|
||||
#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
|
||||
#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
|
||||
#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
|
||||
#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
|
||||
#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
|
||||
#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
|
||||
#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
|
||||
#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
|
||||
|
||||
static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
|
||||
{
|
||||
if (dval < 0 || dval >= (sizeof(u32) * 8))
|
||||
return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
|
||||
if (!dval)
|
||||
return 0;
|
||||
return (1 << dval) - 1;
|
||||
}
|
||||
|
||||
/* defines only for the constants which don't work well as enums */
|
||||
#define ATA_TAG_POISON 0xfafbfcfdU
|
||||
|
||||
|
@ -362,6 +395,8 @@ struct ata_port {
|
|||
unsigned int hsm_task_state;
|
||||
unsigned long pio_task_timeout;
|
||||
|
||||
u32 msg_enable;
|
||||
|
||||
void *private_data;
|
||||
};
|
||||
|
||||
|
@ -648,9 +683,9 @@ static inline u8 ata_wait_idle(struct ata_port *ap)
|
|||
|
||||
if (status & (ATA_BUSY | ATA_DRQ)) {
|
||||
unsigned long l = ap->ioaddr.status_addr;
|
||||
printk(KERN_WARNING
|
||||
"ATA: abnormal status 0x%X on port 0x%lX\n",
|
||||
status, l);
|
||||
if (ata_msg_warn(ap))
|
||||
printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
|
||||
status, l);
|
||||
}
|
||||
|
||||
return status;
|
||||
|
@ -742,7 +777,8 @@ static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
|
|||
|
||||
status = ata_busy_wait(ap, bits, 1000);
|
||||
if (status & bits)
|
||||
DPRINTK("abnormal status 0x%X\n", status);
|
||||
if (ata_msg_err(ap))
|
||||
printk(KERN_ERR "abnormal status 0x%X\n", status);
|
||||
|
||||
/* get controller status; clear intr, err bits */
|
||||
if (ap->flags & ATA_FLAG_MMIO) {
|
||||
|
@ -760,8 +796,10 @@ static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
|
|||
post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
|
||||
}
|
||||
|
||||
VPRINTK("irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
|
||||
host_stat, post_stat, status);
|
||||
if (ata_msg_intr(ap))
|
||||
printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
|
||||
__FUNCTION__,
|
||||
host_stat, post_stat, status);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue