ASoC: fsl-ssi: set bitclock in master mode from hw_params
The fsl_ssi driver uses the .set_sysclk callback to configure the bitclock for master mode. This is unnecessary since the bitclock is known in hw_params. This patch configures the bitclock from .hw_params. .set_dai_sysclk now sets a bitclock frequency which is preferred over the default calculated bitclock frequency. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Tested-By: Michael Grzeschik <mgr@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -166,6 +166,7 @@ struct fsl_ssi_private {
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spinlock_t baudclk_lock;
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struct clk *baudclk;
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struct clk *clk;
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unsigned int bitclk_freq;
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struct snd_dmaengine_dai_dma_data dma_params_tx;
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struct snd_dmaengine_dai_dma_data dma_params_rx;
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struct imx_pcm_fiq_params fiq_params;
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@ -236,6 +237,12 @@ static bool fsl_ssi_is_ac97(struct fsl_ssi_private *ssi_private)
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return !!(ssi_private->dai_fmt & SND_SOC_DAIFMT_AC97);
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}
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static bool fsl_ssi_is_i2s_master(struct fsl_ssi_private *ssi_private)
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{
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return (ssi_private->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) ==
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SND_SOC_DAIFMT_CBS_CFS;
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}
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/**
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* fsl_ssi_isr: SSI interrupt handler
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*
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@ -509,7 +516,7 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
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}
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/**
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* fsl_ssi_set_dai_sysclk - configure Digital Audio Interface bit clock
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* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
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*
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* Note: This function can be only called when using SSI as DAI master
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*
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@ -517,8 +524,9 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
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* freq: Output BCLK frequency = samplerate * 32 (fixed) * channels
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* dir: SND_SOC_CLOCK_OUT -> TxBCLK, SND_SOC_CLOCK_IN -> RxBCLK.
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*/
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static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq, int dir)
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static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai,
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struct snd_pcm_hw_params *hw_params)
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{
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struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
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struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
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@ -526,6 +534,13 @@ static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i;
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unsigned long flags, clkrate, baudrate, tmprate;
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u64 sub, savesub = 100000;
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unsigned int freq;
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/* Prefer the explicitly set bitclock frequency */
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if (ssi_private->bitclk_freq)
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freq = ssi_private->bitclk_freq;
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else
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freq = params_channels(hw_params) * 32 * params_rate(hw_params);
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/* Don't apply it to any non-baudclk circumstance */
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if (IS_ERR(ssi_private->baudclk))
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@ -583,7 +598,7 @@ static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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mask = CCSR_SSI_SxCCR_PM_MASK | CCSR_SSI_SxCCR_DIV2 |
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CCSR_SSI_SxCCR_PSR;
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if (dir == SND_SOC_CLOCK_OUT || synchronous)
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || synchronous)
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write_ssi_mask(&ssi->stccr, mask, stccr);
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else
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write_ssi_mask(&ssi->srccr, mask, stccr);
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@ -604,6 +619,16 @@ static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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return 0;
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}
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static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
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ssi_private->bitclk_freq = freq;
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return 0;
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}
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/**
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* fsl_ssi_hw_params - program the sample size
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*
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@ -627,6 +652,7 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
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snd_pcm_format_width(params_format(hw_params));
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u32 wl = CCSR_SSI_SxCCR_WL(sample_size);
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int enabled = read_ssi(&ssi->scr) & CCSR_SSI_SCR_SSIEN;
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int ret;
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/*
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* If we're in synchronous mode, and the SSI is already enabled,
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@ -635,6 +661,12 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
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if (enabled && ssi_private->cpu_dai_drv.symmetric_rates)
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return 0;
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if (fsl_ssi_is_i2s_master(ssi_private)) {
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ret = fsl_ssi_set_bclk(substream, cpu_dai, hw_params);
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if (ret)
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return ret;
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}
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/*
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* FIXME: The documentation says that SxCCR[WL] should not be
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* modified while the SSI is enabled. The only time this can
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