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V4L/DVB (6064): cx88: Add symbolic names for the PCI interrupt bits

Used for the PCI_INTMSK and PCI_INT_STAT registers.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
hifive-unleashed-5.1
Trent Piepho 2007-08-18 06:57:55 -03:00 committed by Mauro Carvalho Chehab
parent 7c03a4488b
commit 8ddac9ee4b
8 changed files with 49 additions and 21 deletions

View File

@ -149,9 +149,11 @@ static int _cx88_start_audio_dma(snd_cx88_card_t *chip)
/* reset counter */
cx_write(MO_AUDD_GPCNTRL,GP_COUNT_CONTROL_RESET);
dprintk(1,"Enabling IRQ, setting mask from 0x%x to 0x%x\n",chip->core->pci_irqmask,(chip->core->pci_irqmask | 0x02));
dprintk(1, "Enabling IRQ, setting mask from 0x%x to 0x%x\n",
chip->core->pci_irqmask,
chip->core->pci_irqmask | PCI_INT_AUDINT);
/* enable irqs */
cx_set(MO_PCI_INTMSK, chip->core->pci_irqmask | 0x02);
cx_set(MO_PCI_INTMSK, chip->core->pci_irqmask | PCI_INT_AUDINT);
/* Enables corresponding bits at AUD_INT_STAT */
@ -184,7 +186,7 @@ static int _cx88_stop_audio_dma(snd_cx88_card_t *chip)
cx_clear(MO_AUD_DMACNTRL, 0x11);
/* disable irqs */
cx_clear(MO_PCI_INTMSK, 0x02);
cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
cx_clear(MO_AUD_INTMSK,
(1<<16)|
(1<<12)|
@ -273,7 +275,8 @@ static irqreturn_t cx8801_irq(int irq, void *dev_id)
int loop, handled = 0;
for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x02);
status = cx_read(MO_PCI_INTSTAT) &
(core->pci_irqmask | PCI_INT_AUDINT);
if (0 == status)
goto out;
dprintk( 3, "cx8801_irq\n" );
@ -282,8 +285,7 @@ static irqreturn_t cx8801_irq(int irq, void *dev_id)
handled = 1;
cx_write(MO_PCI_INTSTAT, status);
if (status & 0x02)
{
if (status & PCI_INT_AUDINT) {
dprintk( 2, " ALSA IRQ handling\n" );
cx8801_aud_irq(chip);
}
@ -293,7 +295,7 @@ static irqreturn_t cx8801_irq(int irq, void *dev_id)
dprintk( 0, "clearing mask\n" );
dprintk(1,"%s/0: irq loop -- clearing mask\n",
core->name);
cx_clear(MO_PCI_INTMSK,0x02);
cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
}
out:

View File

@ -2063,7 +2063,9 @@ struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr)
atomic_inc(&core->refcount);
core->pci_bus = pci->bus->number;
core->pci_slot = PCI_SLOT(pci->devfn);
core->pci_irqmask = 0x00fc00;
core->pci_irqmask = PCI_INT_RISC_RD_BERRINT | PCI_INT_RISC_WR_BERRINT |
PCI_INT_BRDG_BERRINT | PCI_INT_SRC_DMA_BERRINT |
PCI_INT_DST_DMA_BERRINT | PCI_INT_IPB_DMA_BERRINT;
mutex_init(&core->lock);
core->nr = nr;

View File

@ -498,7 +498,7 @@ int cx88_core_irq(struct cx88_core *core, u32 status)
{
int handled = 0;
if (status & (1<<18)) {
if (status & PCI_INT_IR_SMPINT) {
cx88_ir_irq(core);
handled++;
}

View File

@ -167,7 +167,7 @@ static void cx88_ir_start(struct cx88_core *core, struct cx88_IR *ir)
schedule_work(&ir->work);
}
if (ir->sampling) {
core->pci_irqmask |= (1 << 18); /* IR_SMP_INT */
core->pci_irqmask |= PCI_INT_IR_SMPINT;
cx_write(MO_DDS_IO, 0xa80a80); /* 4 kHz sample rate */
cx_write(MO_DDSCFG_IO, 0x5); /* enable */
}
@ -177,7 +177,7 @@ static void cx88_ir_stop(struct cx88_core *core, struct cx88_IR *ir)
{
if (ir->sampling) {
cx_write(MO_DDSCFG_IO, 0x0);
core->pci_irqmask &= ~(1 << 18);
core->pci_irqmask &= ~PCI_INT_IR_SMPINT;
}
if (ir->polling) {

View File

@ -148,7 +148,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
/* enable irqs */
dprintk( 1, "setting the interrupt mask\n" );
cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04);
cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_TSINT);
cx_set(MO_TS_INTMSK, 0x1f0011);
/* start dma */
@ -166,7 +166,7 @@ static int cx8802_stop_dma(struct cx8802_dev *dev)
cx_clear(MO_TS_DMACNTRL, 0x11);
/* disable irqs */
cx_clear(MO_PCI_INTMSK, 0x000004);
cx_clear(MO_PCI_INTMSK, PCI_INT_TSINT);
cx_clear(MO_TS_INTMSK, 0x1f0011);
/* Reset the controller */
@ -413,7 +413,8 @@ static irqreturn_t cx8802_irq(int irq, void *dev_id)
int loop, handled = 0;
for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04);
status = cx_read(MO_PCI_INTSTAT) &
(core->pci_irqmask | PCI_INT_TSINT);
if (0 == status)
goto out;
dprintk( 1, "cx8802_irq\n" );
@ -424,7 +425,7 @@ static irqreturn_t cx8802_irq(int irq, void *dev_id)
if (status & core->pci_irqmask)
cx88_core_irq(core,status);
if (status & 0x04)
if (status & PCI_INT_TSINT)
cx8802_mpeg_irq(dev);
};
if (MAX_IRQ_LOOP == loop) {

View File

@ -582,6 +582,28 @@
/* ---------------------------------------------------------------------- */
/* various constants */
// DMA
/* Interrupt mask/status */
#define PCI_INT_VIDINT (1 << 0)
#define PCI_INT_AUDINT (1 << 1)
#define PCI_INT_TSINT (1 << 2)
#define PCI_INT_VIPINT (1 << 3)
#define PCI_INT_HSTINT (1 << 4)
#define PCI_INT_TM1INT (1 << 5)
#define PCI_INT_SRCDMAINT (1 << 6)
#define PCI_INT_DSTDMAINT (1 << 7)
#define PCI_INT_RISC_RD_BERRINT (1 << 10)
#define PCI_INT_RISC_WR_BERRINT (1 << 11)
#define PCI_INT_BRDG_BERRINT (1 << 12)
#define PCI_INT_SRC_DMA_BERRINT (1 << 13)
#define PCI_INT_DST_DMA_BERRINT (1 << 14)
#define PCI_INT_IPB_DMA_BERRINT (1 << 15)
#define PCI_INT_I2CDONE (1 << 16)
#define PCI_INT_I2CRACK (1 << 17)
#define PCI_INT_IR_SMPINT (1 << 18)
#define PCI_INT_GPIO_INT0 (1 << 19)
#define PCI_INT_GPIO_INT1 (1 << 20)
#define SEL_BTSC 0x01
#define SEL_EIAJ 0x02
#define SEL_A2 0x04

View File

@ -67,7 +67,7 @@ static int cx8800_start_vbi_dma(struct cx8800_dev *dev,
q->count = 1;
/* enable irqs */
cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
cx_set(MO_VID_INTMSK, 0x0f0088);
/* enable capture */
@ -91,7 +91,7 @@ int cx8800_stop_vbi_dma(struct cx8800_dev *dev)
cx_clear(VID_CAPTURE_CONTROL,0x18);
/* disable irqs */
cx_clear(MO_PCI_INTMSK, 0x000001);
cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
cx_clear(MO_VID_INTMSK, 0x0f0088);
return 0;
}

View File

@ -423,7 +423,7 @@ static int start_video_dma(struct cx8800_dev *dev,
q->count = 1;
/* enable irqs */
cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
/* Enables corresponding bits at PCI_INT_STAT:
bits 0 to 4: video, audio, transport stream, VIP, Host
@ -456,7 +456,7 @@ static int stop_video_dma(struct cx8800_dev *dev)
cx_clear(VID_CAPTURE_CONTROL,0x06);
/* disable irqs */
cx_clear(MO_PCI_INTMSK, 0x000001);
cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
cx_clear(MO_VID_INTMSK, 0x0f0011);
return 0;
}
@ -1604,7 +1604,8 @@ static irqreturn_t cx8800_irq(int irq, void *dev_id)
int loop, handled = 0;
for (loop = 0; loop < 10; loop++) {
status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01);
status = cx_read(MO_PCI_INTSTAT) &
(core->pci_irqmask | PCI_INT_VIDINT);
if (0 == status)
goto out;
cx_write(MO_PCI_INTSTAT, status);
@ -1612,7 +1613,7 @@ static irqreturn_t cx8800_irq(int irq, void *dev_id)
if (status & core->pci_irqmask)
cx88_core_irq(core,status);
if (status & 0x01)
if (status & PCI_INT_VIDINT)
cx8800_vid_irq(dev);
};
if (10 == loop) {