x86: Geode MFGPT clock event device support
Add support for an MFGPT clock event device; this allows us to use MFGPTs as the basis for high-resolution timers. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andres Salomon <dilinger@debian.org> Cc: Andi Kleen <ak@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>hifive-unleashed-5.1
Andres Salomon
Thomas Gleixner
parent
83d7384f8d
commit
8f36881b3c
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@ -1009,6 +1009,10 @@ and is between 256 and 4096 characters. It is defined in the file
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meye.*= [HW] Set MotionEye Camera parameters
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See Documentation/video4linux/meye.txt.
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mfgpt_irq= [IA-32] Specify the IRQ to use for the
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Multi-Function General Purpose Timers on AMD Geode
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platforms.
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mga= [HW,DRM]
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mousedev.tap_time=
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@ -1206,6 +1206,16 @@ config SCx200HR_TIMER
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processor goes idle (as is done by the scheduler). The
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other workaround is idle=poll boot option.
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config GEODE_MFGPT_TIMER
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bool "Geode Multi-Function General Purpose Timer (MFGPT) events"
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depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
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default y
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help
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This driver provides a clock event source based on the MFGPT
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timer(s) in the CS5535 and CS5536 companion chip for the geode.
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MFGPTs have a better resolution and max interval than the
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generic PIT, and are suitable for use as high-res timers.
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config K8_NB
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def_bool y
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depends on AGP_AMD64
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@ -48,6 +48,12 @@ static struct mfgpt_timer_t {
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#define MFGPT_HZ (32000 / MFGPT_DIVISOR)
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#define MFGPT_PERIODIC (MFGPT_HZ / HZ)
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#ifdef CONFIG_GEODE_MFGPT_TIMER
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static int __init mfgpt_timer_setup(void);
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#else
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#define mfgpt_timer_setup() (0)
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#endif
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/* Allow for disabling of MFGPTs */
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static int disable;
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static int __init mfgpt_disable(char *s)
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@ -82,6 +88,9 @@ int __init geode_mfgpt_detect(void)
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}
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}
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/* set up clock event device, if desired */
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i = mfgpt_timer_setup();
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return count;
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}
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@ -195,3 +204,159 @@ int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner)
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return -1;
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}
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#ifdef CONFIG_GEODE_MFGPT_TIMER
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/*
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* The MFPGT timers on the CS5536 provide us with suitable timers to use
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* as clock event sources - not as good as a HPET or APIC, but certainly
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* better then the PIT. This isn't a general purpose MFGPT driver, but
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* a simplified one designed specifically to act as a clock event source.
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* For full details about the MFGPT, please consult the CS5536 data sheet.
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*/
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
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static u16 mfgpt_event_clock;
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static int irq = 7;
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static int __init mfgpt_setup(char *str)
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{
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get_option(&str, &irq);
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return 1;
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}
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__setup("mfgpt_irq=", mfgpt_setup);
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static inline void mfgpt_disable_timer(u16 clock)
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{
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u16 val = geode_mfgpt_read(clock, MFGPT_REG_SETUP);
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geode_mfgpt_write(clock, MFGPT_REG_SETUP, val & ~MFGPT_SETUP_CNTEN);
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}
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static int mfgpt_next_event(unsigned long, struct clock_event_device *);
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static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
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static struct clock_event_device mfgpt_clockevent = {
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.name = "mfgpt-timer",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = mfgpt_set_mode,
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.set_next_event = mfgpt_next_event,
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.rating = 250,
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.cpumask = CPU_MASK_ALL,
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.shift = 32
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};
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static inline void mfgpt_start_timer(u16 clock, u16 delta)
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{
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geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
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geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
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geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
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MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
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}
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static void mfgpt_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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mfgpt_disable_timer(mfgpt_event_clock);
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if (mode == CLOCK_EVT_MODE_PERIODIC)
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mfgpt_start_timer(mfgpt_event_clock, MFGPT_PERIODIC);
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mfgpt_tick_mode = mode;
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}
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static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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mfgpt_start_timer(mfgpt_event_clock, delta);
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return 0;
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}
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/* Assume (foolishly?), that this interrupt was due to our tick */
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static irqreturn_t mfgpt_tick(int irq, void *dev_id)
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{
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if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
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return IRQ_HANDLED;
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/* Turn off the clock */
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mfgpt_disable_timer(mfgpt_event_clock);
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/* Clear the counter */
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geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
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/* Restart the clock in periodic mode */
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if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
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geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
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MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
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}
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mfgpt_clockevent.event_handler(&mfgpt_clockevent);
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return IRQ_HANDLED;
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}
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static struct irqaction mfgptirq = {
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.handler = mfgpt_tick,
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.flags = IRQF_DISABLED | IRQF_NOBALANCING,
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.mask = CPU_MASK_NONE,
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.name = "mfgpt-timer"
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};
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static int __init mfgpt_timer_setup(void)
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{
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int timer, ret;
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u16 val;
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timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING,
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THIS_MODULE);
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if (timer < 0) {
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printk(KERN_ERR
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"mfgpt-timer: Could not allocate a MFPGT timer\n");
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return -ENODEV;
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}
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mfgpt_event_clock = timer;
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/* Set the clock scale and enable the event mode for CMP2 */
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val = MFGPT_SCALE | (3 << 8);
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geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
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/* Set up the IRQ on the MFGPT side */
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if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
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printk(KERN_ERR "mfgpt-timer: Could not set up IRQ %d\n", irq);
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return -EIO;
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}
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/* And register it with the kernel */
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ret = setup_irq(irq, &mfgptirq);
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if (ret) {
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printk(KERN_ERR
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"mfgpt-timer: Unable to set up the interrupt.\n");
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goto err;
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}
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/* Set up the clock event */
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mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
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mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
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&mfgpt_clockevent);
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mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
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&mfgpt_clockevent);
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printk(KERN_INFO
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"mfgpt-timer: registering the MFGT timer as a clock event.\n");
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clockevents_register_device(&mfgpt_clockevent);
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return 0;
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err:
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geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
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printk(KERN_ERR
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"mfgpt-timer: Unable to set up the MFGPT clock source\n");
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return -EIO;
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}
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#endif
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